Future work

The effect of nucleation layer thickness for Ge integration has not been investigated yet. The Ge integration conditions also need to be optimized, especially surface morphology for further devices processing. In the future, due to the Ge surface roughness is still a problem, we think that integrate Ge Fin on GaAs/Si substrate using the non-coalesced aspect-ratio-trapping hetero epitaxy involves the heterogeneous epitaxial growth inside trenches trapping the threading dislocations that originate at the heterostructure interface and propagate into the epitaxy region along the <111> directions [66]. The GaAs/Si smooth surface could be an perfect substrate for this application, the threading dislocation is expected to be lower than direct Ge on Si account for the close lattice constant of Ge and GaAs. Furthermore, the thin GaAs layer which has higher band gap also can serve as a good barrier layer to confine carrier in the Ge active layer, then the device performance should be better.

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