Chapter 2 Experiments of Al/HfO 2 and HfAlO x /Si MIS capacitor
4.2 Constant voltage stress (CVS)
To study the reliability of thin films, we can stress the samples with a constant voltage or a constant current, which are useful methods. The mechanism of CVS is the charge trapped by the interfacial trap density which is caused by stress for a long
28
time. In addition, the increasing interface trap density would cause new leakage path to add leakage current. In our experiments, we use constant voltage stress (CVS) to test the reliability of the thin film.
Fig. 4-10 shows gate current shift of p-type HfSiOx gate dielectrics treated with N2 plasma treatment and CF4 plasma treatment during CVS with Vg = 5 V. It indicated that the thin film with plasma treatment which current shift was smaller than the original one. The sample with N2 plasma and CF4 plasma treatment also had much smaller current shift but had large leakage current. Fig. 4-11 shows gate current shift of p-type HfSiOx gate dielectrics treated with N2 plasma treatment and CF4 plasma treatment during CVS with Vg = 5 V. It indicated that the thin film with plasma treatment which current shift was smaller than the original one. The sample with N2O plasma and CF4 plasma treatment also had much smaller current shift but had large leakage current. Fig. 4-12 shows gate current shift of p-type HfSiOx gate dielectrics treated with NH3 plasma treatment and CF4 plasma treatment during CVS with Vg = 5 V. It indicated that the thin film with plasma treatment which current shift was smaller than the original one. The sample with N2 plasma and CF4 plasma treatment also had much smaller current shift but had large leakage current.
The gate leakage shift level of the samples with or not nitridation differed about 3 to 4 orders, so nitridation process could decrease the trap density effectively. It might be a good way to incorporate N atoms in the thin film to improve the reliability of the gate dielectrics.
Chapter 5
Conclusions and future work
5.1 Conclusions
In this thesis, characteristics and reliability of HfSiOx gate dielectrics with the post-deposition annealing (PDA) and the post plasma treatment (PNA) have been investigated. These methods could be improved that the quality of HfSiOx thin film.
The plasma treatment conditions are N2, N2O, NH
3
and CH4 plasma for 30 sec, 60 sec, 90 sec and 120 sec individually. After the post-deposition annealing (PDA), the plasma treatment and the post plasma treatment (PNA), our experimental data revealed low leakage current density and good thermal stability. We find several important phenomena and they would be summarized as follows.First, improvement in the electrical characteristics of Al-Ti-HfSiOx-Si MIS capacitors after post-deposition-annealing has been demonstrated in this work. The HfSiOx thin film after PDA would become dense and we could find their capacitance would increase and gate leakage current would decrease.
Second, all of the samples after plasma treatment can promote the electrical characteristics and reliability until the plasma damage happened. Among these treatments, the sample treated by N2 plasma treatment for 60 sec, N2O plasma treatment for 60 sec, NH3 plasma treatment for 30 sec and CF4 plasma treatment for 60 sec for HfSiOx represented a fairly great improvement, such as good capacitance ( 25~40% increasing for HfSiOx ), reduced leakage current ( about 1~2 order
30
reduction for all samples ). It was showed that the interfacial layer could be suppressed and the weak structure of interface has been repaired by N2 and NH3
plasma respectively. However, N2O plasma treatment also can provide good effects on electrical characteristics. The samples treated N2O plasma treatment would introduce oxygen bonding to form additional interfacial layer, so the capacitance would be decreased a little. The sample treated by CF4 plasma also showed excellence promotion about reliability issues, such as smaller hysteresis ( < 15 mV ) and better CVS curve.
Finally, in this thesis, it has been indicated that combined two kinds of plasma, such as N2, NH3 and N2O plasma and then did the CF4 plasma treatment could improve stress stability of HfSiOx thin film. Simultaneously, and the reliability of the film after nitridation and fluorination also represented better electronic characteristics.
The most suitable way for post-deposition treatment by plasma to improve electrical characteristics on MIS structure has been observed.
5.2 Future work
In this experiment, the HfSiOx film was deposited by MOCVD system. In the future, the ALCVD ( Atomic Layer CVD ) system will become another important deposition technology. Further experiment and analysis are required to clarify if the same treatment condition is also suitable for ALCVD film. On the other hand, the MOSFET will be fabricated by the same treatment condition to verify the effect on device characteristics, such as mobility, subthreshold swing, and transonductance.
The interfacial layer between high-k/Si would be increased by increasing post-deposition-annealing temperature. In order to suppress the growth of the interfacial layer, we could use some pre-treatment methods to introduce a thin oxide
or nitride layer by HDP-PECVD or chemical deposition. Furthermore, we might have to understand the mechanism of leakage current of thin film and thick film individually. Finally, the mechanism of the generation of the defects in the high-k bulk or interface still needs to be solved.
32
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Table
Table 1-1 High-performance Logic Technology Requirements Roadmap.
( ITRS：2006 updae )
38
Table 1-2 Characteristics of various high-k materials.
Figure-chapter 1
Fig. 1-1 Conduction mechanism in oxide for the MOS structure.
Fig1-2 Roadmap of the gate dielectric
.
40
Fig. 1-3 Measured and simulated Ig-Vg characteristics under inversion condition for nMOSFETs. The dotted line indicates the 1A/cm2 limit for the leakage current. [14]
Fig. 1-4 Power consumption and gate leakage current density comparing to the potential reduction in leakage current by an alternative
dielectric exhibiting the same equivalent oxide thickness [15].
Figure-chapter 2
Fig. 2-1 Scaling limits of MOCVD HfO2 and ZrO2.
(International SEMATECH Confidential and Supplier Sensitive, 2002)
42
Fig 2-2 The ICP plasma system that was used in this experiment.
Fig 2-3 The E-gun system that was used in this experiment.
1. Standard RCA cleaning
2. MOCVD deposited HfSiO
x2nm
3. Post-deposition-annealing (500
oC 60 seconds)
4. Plasma treatment with N
2, N
2O, NH
3or CF
4(30seconds, 60 seconds, 90 seconds, 120 seconds)
HDP-CVD ICP Power P-type silicon wafer
N F
N
N O
O
O F
44
5. Post-nitridation-annealing (600
oC 30seconds)
6. Thermally evaporate 400nm Aluminum as top electrode
7. Lithography：Define top electrode Wet etch undefined Ti and Al
8. Thermally evaporate 500nm Aluminum as bottom electrode
Fig. 2-4 The fabrication flow of the experiment
Figure-chapter 3
Fig. 3-1 The capacitor C-V characteristics of HfSiOx for different RTA temperatures and times with Al gate electrode
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5
Ti 200A + Al 4000A no treatment Ti 200A + Al 4000A 500oC30sec Ti 200A + Al 4000A 500oC60sec Ti 200A + Al 4000A 600oC30sec
Fig. 3-2 The capacitor C-V characteristics of HfSiOx for different RTA temperatures and times with Al and Ti or Al gate electrode
46
Fig. 3-3 The I-V characteristics of HfSiOx for different RTA temperatures and times with Al gate electrode
Ti 200A + Al 4000A no treatment Ti 200A + Al 4000A 500oC30sec Ti 200A + Al 4000A 500oC60sec Ti 200A + Al 4000A 600oC30sec
Fig. 3-4 The I-V characteristics of HfSiOx for different RTA temperatures and times with Al and Ti or Al gate electrode
-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 3-5 The C-V characteristics of HfSiOx for N2 plasma treatment compare with different times
Fig. 3-6 The C-V characteristics of HfSiOx for N2O plasma treatment compare with different times
48
Fig. 3-7 The C-V characteristics of HfSiOx for NH3 plasma treatment compare with different times
Fig. 3-8 The C-V characteristics of HfSiOx for CF4 plasma treatment compare with different times
-2.0 -1.5 -1.0 -0.5 0.0
Fig. 3-9 The I-V characteristics of HfSiOx for N2 plasma treatment compare with different times
Fig. 3-10 The I-V characteristics of HfSiOx for N2O plasma treatment compare with different times
50
Fig. 3-11 The I-V characteristics of HfSiOx for NH3 plasma treatment compare with different times
Fig. 3-12 The I-V characteristics of HfSiOx for CF4 plasma treatment compare with different times
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5
Fig. 3-13 The C-V characteristics of 3 nm HfSiOx gate dielectric Compared with different plasma treatments
Fig. 3-14 The C-V characteristics of 5 nm HfSiOx gate dielectric Compared with different plasma treatments
52
Fig. 3-15 The I-V characteristics of 3 nm HfSiOx gate dielectric Compared with different plasma treatments
Fig. 3-16 The I-V characteristics of 5 nm HfSiOx gate dielectric Compared with different plasma treatments
-1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 3-17 The C-V characteristics of HfSiOx for N2 plasma treatment then CF4 plasma treatment
Fig. 3-18 The C-V characteristics of HfSiOx for N2Oplasma treatment then CF4
plasma treatment
54
Fig. 3-19 The C-V characteristics of HfSiOx for NH3 plasma treatment then CF4
plasma treatment
Fig. 3-20 The I-V characteristics of HfSiOx for N2 plasma treatment then CF4 plasma treatment
-2.0 -1.5 -1.0 -0.5 0.0
Fig. 3-21 The I-V characteristics of HfSiOx for N2Oplasma treatment then CF4
plasma treatment
Fig. 3-22 The I-V characteristics of HfSiOx for NH3 plasma treatment then CF4
plasma treatment
56
Fig. 4-1 The hysteresis of HfSiOx gate dielectrics without RTA and plasma treatment
-1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 4-2 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds
-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 4-3 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and N2
plasma 60 seconds
Fig. 4-4 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and N2O plasma 60 seconds
58
Fig. 4-5 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and NH3 plasma 30 seconds
Fig. 4-6 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and CF4 plasma 60 seconds
-1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 4-7 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and N2
plasma 60 seconds then CF4 plasma 60 seconds
-1.5 -1.0 -0.5 0.0 0.5 1.0
Fig. 4-8 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and N2O plasma 60 seconds then CF4 plasma 60 seconds
60
Fig. 4-9 The hysteresis of HfSiOx gate dielectrics with RTA 500oC 60 seconds and NH3 plasma 30 seconds then CF4 plasma 60 seconds
0 20 40 60 80 100 120
Fig. 4-10 Gate current shift of HfSiOx gate dielectrics treated with N2 and CF4 plasma treatment during Vg = 5V CVS
0 20 40 60 80 100 120
Fig. 4-11 Gate current shift of HfSiOx gate dielectrics treated with N2Oand CF4
plasma treatment during Vg = 5V CVS
0 20 40 60 80 100 120
Fig. 4-12 Gate current shift of HfSiOx gate dielectrics treated with NH3 and CF4
plasma treatment during Vg = 5V CVS