Chapter 2 Experiments of Al/HfO 2 and HfAlO x /Si MIS capacitor
2.3 Plasma treatment system
When the PDA (Post-Deposition-Annealing) was finished, some samples were subjected to an additional plasma treatment in order to improve the electrical properties of gate dielectric. There were various source gas (N2, N2O, NH3, CF3) and process time (30~120 seconds) as the experiment conditions. Parallel plate high-density plasma reactor employing an ICP source was a single-wafer treated and computer-controlled system.
Fig. 2.2 illustrates ICP system that was used in this experiment. 13.56 MHz RF power was coupled to the top electrode through a matching network. After the sample load to reactor, the system was pumped down to keep the chamber clean enough.
Subsequently, the source gas was become radical by the plasma system, as the
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chamber pressure was 100 mTorr and the substrate temperature was 300℃ so that to achieve the goal of low temperature process. The power of working plasma was kept constant at 200W and the flow rate of source gas was 100 sccm. While the process of plasma treatment was finished, these samples were brought to thermal treatment to reduce plasma damage.
2.4 E-gun
After plasma treatment and PNA, we deposited Ti and Al as electrical by E-gun.
And finished all manufacturing process, we used E-gun deposited Al as back electrical too.
Figure 2-3 shows E-gun work theorem, the system is always in vacuity, and the materials which we wanted to deposited was in the boat. We melt down the materials by heating, and using the electron-beam to bombard the materials to proceed evaporation. The chamber pressure was 10-6 mTorr when we deposited. After the deposited Ti and Al we could proceed lithography and etching.
2.5 MIS capacitors fabrication process
In this thesis, Al-Ti-HfSiOx-Si MIS capacitors were fabricated to study ultra thin HfSiOx gate dielectrics. Figure 2-4 shows the fabrication flow of this experiment. The starting wafer was four inch (100) orientated p-type wafer. It was one side polished and its resistivity was 5~10 ohm-cm.
After standard initial RCA cleaning, wafers were put into chamber and grew HfSiOx layer with atomic layer deposition system. After the thin films were prepared, some samples were annealed after deposition (post-deposition anneal) and then
subjected to an additional plasma treatment at the substrate temperature of 300℃
while the pressure was 100 mTorr and the plasma power was 200W. The plasma treatment conditions were in pure N2, N2O, NH3, and CF3 for 30~120 seconds respectively and the flow rate were 100 sccm. After nitridation, we also annealed these samples to reduce the plasma damage. Finally, pure Ti and Al films were thermally evaporated on the top side of wafers. Mask defined the top electrode. Then, we used wet etching to etch undefined Al, Ti and HfSiOx films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows.
1. Initial RCA cleaning.
2. Atomic layer deposition HfSiOx .
3. Post-deposition anneal with 500℃ 60 seconds for HfSiOx .
4. Plasma treatment with N2，N2O, NH3 and CF3 plasma for 30~90 seconds respectively.
5. Post-nitridation annealing with 600℃ 30seconds.
6. Thermally evaporate 200 Å titanium 4000 Å aluminum as the top electrode.
7. Mask: define top electrode and then wet etch undefined Al, Ti and HfSiOx films.
8. Strip backside native oxide and coat 4000 Å aluminum as bottom electrode.
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After the Al/ Ti/ HfO2 /Si MIS capacitors were prepared, we used semiconductor parameter analyzer (HP4156A) and C-V measurement (HP4284) to analysis electric characteristics (i.e. I-V, C-V, EOT, leakage current density etc.). Then we tested their reliability, including constant voltage stress (CVS), Hysteresis effect.
Chapter 3
Electrical characteristics of Al-Ti- HfSiO x -Si MIS capacitors
3.1 Electrical characteristics of capacitors with different post-deposition annealing temperature
3.1.1 Capacitance-voltage characteristics for HfSiO x with different gate electrodes
In order to measure the C-V characteristics of our MIS capacitors, we used HP 4284A precision LCR meter in our experiments. We swept the gate bias from accumulation region to inversion region to obtain the curve at the frequency of 50 kHz from -2V to 1V. Then, the effects of different post deposition annealing (PDA) temperature (i.e. 500oC, 600oC, 800oC) and different post deposition annealing times (i.e. 30seconds, 60seconds, 90seconds, 120seconds) and different plasma treatment source (i.e. N2, N2O, NH3, CF4) will be discussed.
Fig. 3-1 shows the capacitance-voltage (C-V) characteristic of HfSiOx gate dielectrics and Al gate electrode treated with different annealing temperatures for different process time. PDA could reduce the flat-band voltage and make the thin film dense. And we could see that the suitable annealing condition is 500oC 60seconds.
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Fig. 3-2 shows the C-V characteristic of HfSiOx gate dielectrics and A+Til gate electrode treated with different annealing temperatures for different process time. In this case, the capacitances treated with PDA 500oC 60 seconds had the best capacitance too.
3.1.2 Leakage current-voltage characteristics for HfSiO x with different gate electrodes
The leakage current of our MIS capacitors were analyzed from the current -voltage (I-V) characteristics measured by an HP4156A semiconductor parameter analyzer.
Fig. 3-3 shows the I-V characteristics of HfSiOx gate dielectrics and Al gate electrode treated with different annealing temperatures for different process time from 0V to -2V. The gate leakage current density of these samples after PDA could be decreased, because the film became dense after PDA. And the lowest condition is PDA at 500oC 30 seconds.
Fig. 3-4 shows the I-V characteristics of HfSiOx gate dielectrics and Al+Ti gate electrode treated with different annealing temperatures for different process time from 0V to -2V. The gate leakage current density of these samples after PDA could be decreased, because the film became dense after PDA. And the lowest condition is PDA at 500oC 30 seconds.
We compared two gate electrodes, Ti-Al gate had larger capacitance and lower leakage current than Al gate. It is maybe Ti match HfSiOx rather Al.
3.2 Electrical characteristics capacitors with different plasma treatment for different process time
There are three kinds of plasma treatment with different source gas (i.e. N2, N2O, NH3 and CF4) and they were treated for different process time (i.e. 30 seconds, 60 seconds, 90 seconds and 120 seconds). And, the relationship of difference process time in one kind of plasma treatment will be discussed.
3.2.1 Capacitance-voltage characteristics for HfSiO x
Fig 3-5 shows the capacitance-voltage (C-V) characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment of 200W for different process time. The capacitor treated for 60 seconds shows the maximum capacitance among three conditions of process time. Furthermore, the capacitor treated with N2 plasma both show the good capacitance values which are larger than the capacitor which was not treated by N2 plasma.
Fig. 3-6 shows the capacitance-voltage (C-V) characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2O plasma treatment of 200W for different process time. At this condition, the capacitor treated for 90 seconds shows the maximum capacitance among four conditions of process time. But for the capacitance treated with N2O plasma for 60 seconds shows the best C-V curve.
Fig. 3-7 shows the capacitance-voltage (C-V) characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with NH3 plasma treatment of 200W for different process time. Just like the samples of N2 plasma treatment. The improvement of capacitance could be seen. At this condition, the capacitance treated with NH3 plasma for 30 seconds shows the largest value. By the way, all the samples which use NH3 plasma have larger capacitance than the sample without treatment. It
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is indicated that NH3 plasma treatment is also a practicable method to improve the capacitance -voltage characteristics of HfSiO2 gate dielectrics.
Fig 3-8 shows the capacitance-voltage (C-V) characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with CF4 plasma treatment of 200W for different process time. The capacitor treated for 60 seconds and 90 seconds all shows the maximum capacitance among three conditions of process time.
Furthermore, the capacitors after post plasma annealing treated show the larger capacitance values and show the better than the capacitors which have no annealing treatment after plasma.
When the N2 plasma process time over 90 sec, the C value will become smaller, we think that it is may be caused by the growing of interfacial oxide in the plasma process time. The same phenomenon is also found on N2O, NH3 and CF4 plasma.
3.2.2 Leakage current-voltage characteristics for HfSiO x
Fig. 3-9 shows the I-V characteristics of p-type HfSiOx capacitors after PDA at 500oC 60 seconds and treated by N2 plasma of 200W with different process time from 0V to -2V. We observed that the gate leakage current density is suppressed while N2
plasam treatment. It is indicated that N2 plasma treatment supply an effective barrier against the leakage current. The film after N2 plasma treatment became dense and strong, so the leakage current could be effectively decreased, especially for capacitor which treated with N2 plasma 30 seconds has the lowest leakage. Gate leakage current density of no treatment insulator at Vg = -1V is about 7 10-2 A/cm2. However, gate leakage current density of the capacitor treated for 30 sec N2 plasma at Vg = -1V is about 5 10-5 A/cm2. It has less gate leakage than no treatment insulator about 2~3 order.
Fig. 3-10 shows the I-V characteristics of p-type HfSiOx capacitors after PDA at 500oC 60 seconds and treated by N2O plasma of 200W with different process time from 0V to -2V. After N2O plasma treatment, we could see the reduction of leakage current in contrast of no treatment samples. However, the sample of plasma treated for 60 seconds got the smallest gate leakage current and a good C-V curve from Fig 3-6.
Fig. 3-11 shows the I-V characteristics of p-type HfSiOx capacitors after PDA at 500oC 60 seconds and treated by NH3 plasma of 200W with different process time from 0V to -2V. After NH3 plasma treatment, we could see the reduction of leakage current in contrast of no treatment samples. However, the sample of plasma treated for 90 seconds got the smallest gate leakage current. Compare with the sample which no treated by plasma, the leakage current would lower about 3 order.
Fig. 3-12 shows the I-V characteristics of p-type HfSiOx capacitors after PDA at 500oC 60 seconds and treated by CF4 plasma of 200W with different process time from 0 V to -2V. After CF4 plasma treatment, we can see much reduction of leakage current in contrast of no treatment samples. It is worthy to be noticed that all the capacitors treated by CF4 plasma have a low leakage current about 2×10-4 A/cm2 at Vg = -1V. We can clearly see the F element will effectively repair defect, can let leakage current seriously decrease.
As a consequence, the N2, N2O, NH3 CF4 plasma treatment all shows better electrical properties than no treatment sample. Furthermore, the N element, O element and F element all could fix the interface and improve the electrical properties include of C-V curve and I-V curve.
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3.3 Electrical characteristics of capacitors with different gate dielectric thickness
We have four kinds of plasma treatment with different source gas (i.e. N2, N2O, NH3) and treated for different process time (i.e. 30 seconds, 60 seconds and 90 seconds). Then we compare the effect of different source gas with different thickness.
3.3.1 Capacitance-voltage characteristics for HfSiO x
Fig. 3-13 shows C-V characteristics of 3nm HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment for 60 seconds, N2O plasma treatment for 60 seconds and NH3 plasma treatment for 30 seconds. It is indicated that the capacitances treated with N2 plasma for 60 seconds and NH3 plasma for 30 seconds show the most excellent value (i.e. 30% increasing about capacitance).
Among these samples, the reason why the sample treated with N2O plasma has lower capacitance than N2 and NH3 plasma treatment is complex. It is may be the growing of interfacial oxide made the C value smaller and this interfacial layer also made the gate leakage current smaller. But for the reason of oxidation caused by oxygen radical, the N2O plasma treatment samples show the lower C value.
Fig. 3-14 shows C-V characteristics of 5nm HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment for 60 seconds, N2O plasma treatment for 60 seconds and NH3 plasma treatment for 30 seconds. It is indicated that the capacitance treated with NH3 plasma for 30 seconds shows the most excellent value (i.e. 60% increasing about capacitance).
3.3.2 Leakage current-voltage characteristics for HfSiO x
Fig. 3-15 and Fig. 3-16 show I-V characteristics of 3nm and 5nm HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment for 60 seconds, N2O plasma treatment for 60 seconds and NH3 plasma treatment for 30 seconds. It is indicated that the capacitances treated with plasma show the lower leakage current. Especially for capacitor which treated with N2 plasma 30 seconds has the lowest leakage.
3.4 Electrical characteristics of capacitors combined with two plasma treatment for different process Time
Final, we try to combined two plasma treatment for different process time to see the electrical characteristics of P-type capacitors.
3.4.1 Capacitance-voltage characteristics for HfSiO x
Fig. 3-17 shows C-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment of 200W for 60 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that the capacitance treated with CF4 plasma for 30~60 seconds will increase effectively. And the C-V curve became better. But the capacitance treated with CF4 plasma for 90~120 seconds will decrease, the result is maybe too long plasma treatment would cause plasma damage. It let the capacitance become lower. However, the N element and F element have a good collocation.
Fig. 3-18 shows C-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2O plasma treatment of 200W for 60 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that the
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capacitance treated with CF4 plasma for 60 seconds will increase effectively. And the C-V curve became better. But same to N2 plasma, the capacitance treated with CF4
plasma for 120 seconds will decrease, the result is maybe too long plasma treatment would cause plasma damage. It let the capacitance become lower. However, the N and O element and F element have a good collocation.
Fig. 3-19 shows C-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with NH3 plasma treatment of 200W for 30 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that the capacitance treated with CF4 plasma for 60 seconds will increase effectively. And the C-V curve became better than others. However, the N element and F element have a good collocation.
3.4.2 Leakage current-voltage characteristics for HfSiO x
Fig. 3-20 shows I-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2 plasma treatment of 200W for 60 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that after N2
plasma treatment only, the leakage current shows the lowest leakage current. But had CF4 plasma will increase, this is maybe that the F element would etch HfSiOx, causing the oxide became thinner and let the leakage current increase. The sample treated wit h CF4 plasma 120 seconds was the most obvious.
Fig. 3-21 shows I-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with N2O plasma treatment of 200W for 60 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that after N2O plasma treatment only, the leakage current shows the lowest leakage current. But had CF4 plasma will increase, this is maybe that the F element would etch HfSiOx,
causing the oxide became thinner and let the leakage current increase. The sample treated with CF4 plasma 90~120 seconds was the most obvious.
Fig. 3-22 shows I-V characteristics of HfSiOx gate dielectrics after PDA at 500oC 60 seconds and treated with NH3 plasma treatment of 200W for 60 seconds, then treated with CF4 plasma treatment for 30 or 120 seconds. It is indicated that after NH3 plasma treatment only and with short time CF4 plasma like 30 seconds, the leakage current shows the lowest leakage current. But had long time CF4 plasma will increase, this is maybe that the F element would etch HfSiOx, causing the oxide became thinner and let the leakage current increase. The sample treated with CF4 plasma 90~120 seconds was the most obvious.
After plasma treatment we always did post deposition annealing and post plasma treatment annealing, the sample without nitridation can not sustain the high temperature annealing, so nitridation can improve the thermal stability of high-k film.
The sample without PDA and treated by plasma treatment directly is distorted at high negative bias voltages owing to the crystallization. It might be cause by plasma damage, therefore we must add the post-nitridation anneal step to restore the plasma damage. We could see that after post deposition anneal, nitridation could effectively improve the thermal stability of the thin film. We can find the same result, the sample with nitridation after PDA can effectively decrease gate leakage current. It is good evidence to show that the thin film treated by plasma treatment after post-deposition anneal can make the thin film sustain high thermal stress.