Motivation

techniques, such as surface nitridation or Si passivation, have been developed to improve the quality of gate insulator/Ge interface [14]. It was also reported that high-performance Ge MOSFET could be realized by careful control of interfacial GeO2 formation [8]. In my thesis, a low-temperature supercritical CO2 (SCCO2) fluid technology is proposed as a post-gate dielectric treatment at 150°C to improve the dielectric/Ge interface after high-temperature PDA process.

The supercritical fluid (SCF), which exists above its critical pressure and temperature, as shown in Fig 1-1 [15, 16]. It provides good liquid-like solvency and high gas-like diffusivity, giving it excellent transport capacity [17]. Table 1-1 shows critical pressure and temperature for some common fluids. CO2 is most attractive to be as supercritical fluid, because of it is easy to achieve supercritical state, low critical temperature (room temperature at 30℃) and not high critical pressure (1072psi = 72.8 atm), non-toxic, non-flammable, and inexpensive. The oxidant is also easily dissolved in SCCO2 fluid with specific surfactants. It is thereby allowed for SCCO2 fluid to transport the oxidant and penetrate the dielectric layer for trap passivation and interface oxidation at low temperature [18-20].

1.2 Motivation

To achieve a low temperature process on Ge-MOS device, high-k material is a good candidate to be gate dielectric for Germanium substrate. There are least four requirements to form gate dielectric on Germanium. First, enough high dielectric constant (>20). Second, must be thermodynamic stable with Ge, the high-k material does not react with the Ge during depositing, because a low-k interfacial layer will be form during depositing, to reduced the dielectric constant of high-k material. Third,

4 

large enough band offset with Ge (>1eV), enough barrier high between Ge and gate dielectric to prevent the leakage by carriers get thermal energy to overcome the barrier between Ge and gate oxide and to create leakage. Forth, form a good interface with Ge. The hafnium oxide (HfO2) and the zirconium oxide (ZrO2) are meeting the above four conditions, and have been widely studied. For high-k metal gate, HfO2 is widely used in 45nm processing; because of it has better thermodynamic stability than ZrO2

on silicon. However, for germanium as the channel material, ZrO2 is more compatible than HfO2, because of less interfacial layer which is low k layer form after post-deposition annealing due to Ge intermixing in ZrO2 [21]. In addition, very high-k (k~37) ZrO2 have been proposed via Ge incorporation into ZrO2 [22]. Therefore, ZrO2

is a good high-k material deposited on Ge, we choose ZrO2 as our research high-k material.

Among several metal oxide films formations, in general, low temperature deposition is prefer, because of low thermal budget and low costs. However, the low-temperature deposited films have poor interfacial properties and larger leakage current due to numerous traps inside the metal oxide film. Proper annealing can reduced leakage and remove oxide charges and interface traps in the ZrO2. But for germanium substrate, the GeO2 thermal stability is a critical problem to form a good Ge-MOS. Because PDA or following high-temperature processes could induced Ge decomposition into gate dielectric, to create leakage source enhance the leakage current after annealing. On my thesis, we use the low-temperature (150℃) technique supercritical fluid (SCF) to transport the oxidant and penetrate the dielectric layer for trap passivation and interface oxidation at low temperature. And by leakage current fitting to see how leakage mechanism transfers after SCF treats.

1.3 Organization of the Thesis

In chapter 2, we first study conventional SiO2 deposited by LPCVD on epi-Germanium substrate. Discussing thermal stability and SCF treatment as deposited LP-oxide. Various analysis techniques, such as material analysis like high-resolution transmission electron microscopy (HRTEM), x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD), were performed to characteristic the cross section of device and surface morphology. For electrical analysis, like capacitance-voltage (CV) and current density-voltage (JV) by Agilent 4980 and Keithley 4200 were perform to characteristic the device performance and analysis the interface and bulk quality of gate dielectric.

In chapter 3, we introduced the ZrO2 as high-k gate dielectric, as well as deposited GeO2 between gate insulator and Si to enlarge the GeO2 decomposition problems which lead to deterioration of the devices after post deposition annealing.

Furthermore, we study the effects of SCF treatment after post dielectric annealing, by analyzing CV and JV curve which helped us to understand the recovery of Ge decomposition in Al/ZrO2/GeO2/Si capacitor before and after SCF treatment. Also, by current fitting to realize the leakage current mechanism transformation after SCF treated.

Finally, in chapter 4, gave the conclusions and suggestions of the thesis for the future work.

Fig. 1-1 Phase diagram for CO

2.

Table 1-1 Critical temperature and pressure for some common fluids.

6 

Chapter 2

Effects of Supercritical Fluid (SCF) and Post-Deposition Annealing (PDA) on the SiO

2

/Ge MOS Capacitor

 

2.1 Fabrication of Metal Oxide Semiconductor Capacitor and Experiment Process

 

A 0.5 ohm-cm p-type (100) Si wafer was cleaned with standard RCA clean process and immediately loaded into the Applied Materials reduced-pressure chemical vapor deposition (RP-CVD) reactor. The initial 600 nm-thick Ge film was grown at 400°C with a GeH4 partial pressure of 8 Pa. Annealing under H2 ambient was then performed at 825°C for 40 min. The growth temperature was ramped to 600°C for the deposition of another 1.4 μm-thick Ge layer at 8 Pa, followed by a 15-min H2 bake at 750°C. This epitaxial Ge (epi-Ge) layer is p-type with an electrically activated concentration of 4×10¹⁵ cm^-3. The wafer was immediately loaded into a low-pressure chemical vapor deposition (LPCVD) furnace with 300 mTorr and a thin silicon dioxide (SiO2) layer was deposited at 300°C on top of the epi-Ge layer, as the gate insulator of the following Ge-MOS device. It was followed that the samples were divided into two groups for study in this work. In the first group, the SCF treatment was performed right after the gate SiO2 deposition to enhance the Ge-MOS device performance. The sample was placed in a SCF system at 150°C for 1 hr, where was injected with 2000~3000 psi of SCCO2 fluid that were mixed with 5 vol.% of propyl alcohol and 5 vol.% of pure H2O. The propyl alcohol acts as a surfactant between nopolar-SCCO2 fluid and polar-H2O molecules, such that the H2O molecules are uniformly distributed in SCCO2 fluid and delivered into the gate SiO2 film to passivate defect states [28]. The supercritical fluid system is shown in Fig. 2-1.

8 

In the second group, the influence of PDA on the Ge MOS device characteristics was studied further. The sample after the gate SiO2 deposition was subjected to a PDA process at 450°C for 30 min in a vacuum furnace with 1×10^-7 torr, and then the SCF pos-treatment was implemented with the same conditions as mentioned above. Finally, aluminum electrodes were thermally evaporated on the top surface of SiO2 film with an electrode area of 7.07×10^-4 cm² and the back side of silicon wafer to fabricate Ge-MOS capacitors. The material analysis of X-ray photoelectron spectroscopy (XPS) on epi-Ge channel layer was also performed to examine the evolution of chemical bonding before and after SCCO2 treatment. In order to clearly distinguish the gate insulator/epi-Ge interface for signal collection, the SCCO2 process was applied to a stack structure of 13nm-thick HfO2/epi-Ge layers. It is noted that the HfO2 layer was in-situ removed by Ar⁺ sputtering process before XPS spectra collection. Therefore, the information of chemical bonding at the epi-Ge surface can be obtained after SCF treatment. The experiment processes of SiO2/epi-Ge capacitor with various treatments are exhibited in Fig. 2-2.

2.2 Effects of SCF on the Intrinsic SiO

2

/Ge Interface

 

2.2.1 High-Resolution Transmission Electron Microscopy Analysis

Fig. 2-3 (a) and (b) show the cross-sectional HRTEM images of LPCVD-SiO2 on epi-Ge substrate before and after the SCCO2 post-gate dielectric treatment, respectively. In Fig. 2-3(a), the thickness of as-deposited SiO2 film is observed to be about 13.5 nm. After immersion of SCCO2 fluids with oxidant (H2O molecule) at 150°C for 1 hr, the dielectric thickness above the Ge layer is increased to about 16.6 nm in total, and a clear and even interface is exhibited, as shown in Fig. 2-3(b). It is

inferred that the increase of dielectric thickness and the even interface formed are originated from the formation of interfacial germanium oxide (GeOx) during the SCF treatment with excellent permeability. The following XPS analysis results will support the inference.

2.2.2 CV Characteristics with Various SCF Treatments

The frequency dependence of capacitance-voltage (C-V) curves for the Ge-MOS device with various post-treatments is studied at 300K, as depicted in Fig. 2-4. It is observed that the inversion capacitance which occurs at positive gate bias for p-type Ge exhibits frequency dispersion in different levels. The frequency dispersion behavior is attributed to the response of minority carrier generation from interface defect states to measuring frequencies. The fast minority-carrier response can be achieved at low frequency [23]. Compared with the case of lower interface state densities, the Ge-MOS capacitor with higher interface state densities also will present a larger inversion capacitance, and the gap of the inversion capacitances between both cases shrinks as the increase of measuring frequencies. In this work, the inversion capacitance of Ge-MOS device with SCF treatment declines fastest and approaches to an ideal minimum capacitance as compared to the one without SCF treatment, especially in the high measuring frequency of 500 KHz. In addition, it was shown that the C-V frequency dispersion decreased with increasing the SCF pressure. It is reasonably believed that with the pressure increasing the density of CO2 will follow denser, on the other hand, the solubility of oxidant (H2O) and surfactant (propyl alcohol) are increased with increasing the CO2 pressure. Fig. 2-5 is shown the projections of the phase diagram of carbon dioxide.

10 

2.2.3 X-ray Photoelectron Spectroscopy (XPS) Analysis

Fig. 2-6 shows XPS spectra of Ge 3d signal on the interface between gate dielectric layers and epi-Ge before and after SCF treatment. The detected signal of Ge 3d spectra primarily comes from the surface of epi-Ge channel layer, since the gate dielectric layer was in-situ removed previously by Ar⁺ sputtering before XPS spectra collection. The signals of GeOx and GeO2 bonding were observed for both samples from the XPS analysis. For the sample without SCF process, it is inferred that the species of oxygen will oxidize the Ge surface to form loose native oxide layer during the early stage of gate dielectric film deposition. After SCF treatment, higher signal intensity of GeO2 bonding at the epi-Ge surface is observed obviously. The results reasonably explain that the oxidation at the gate dielectric/epi-Ge interface has occurred by adding oxidant (H2O molecules) to the SCCO2 fluid with excellent transport capacity. The formation of interfacial GeO2 layer can smoothen the epi-Ge surface and alleviate frequency dispersion of inversion capacitance.

Fig. 2-7 shows the  transporting mechanism for SCCO2 fluids taking H2O molecule into dielectric film. It shows how the SCCO2 can take oxidant (H2O) and surfactant (propyl alcohol) through the dielectric film to the dielectric/epi-Ge interface to oxidize the Germanium and passivate the defects.

2.3 The Thermal Stability and the Effects of SCF Treatment on PDA-Treated SiO

2

/epi-Ge MOS

 

2.3.1 Effects of the Thermal Stability on SiO2/epi-Ge Capacitor

The thermal stability and the effects of SCF treatment on PDA-treated Ge-MOS device are investigated further for realistic Ge-MOSFET fabrication consideration.

Fig. 2-8 shows C-V characteristics of 450°C PDA-treated Ge-MOS devices before and after SCCO2 post-treatment. The inset of Fig. 2-8 also depicts the leakage current characteristics of the PDA-treated Ge-MOS devices before and after SCCO2

post-treatment. The least accumulation capacitance is observed in the PDA-treated Ge-MOS device, about a 66% reduction compared with the control sample (without PDA process). The significant reduction of the accumulation capacitance due to poor charge holding capability can be attributed to the large leakage current of PDA-treated Ge MOS device, as shown in the inset of Fig. 2-8. It was reported that thermal process induces Ge decomposition and desorption into gate dielectric layer. Fig. 2-9 and Fig.

2-10 shows the mechanism of Ge decomposition with the GeO2 which stacks on the Ge, after high temperature annealing, and the direct evidence GeO2 desorption and consume the Ge substrate cause extremely uneven surface [24]. Also, the incorporation of Ge in dielectric insulator is believed to act as defect traps and thereby causes an increased gate leakage current [8, 11, 14].

2.3.2 Effects of SCF Treatment on PDA-Treated Ge-MOS

In this study, the implementation of SCF treatment after PDA process significantly reduces leakage current of gate insulator and recovers the C-V characteristic to a similar state as the initial Ge-MOS device without PDA process (control sample). This indicates again that oxidant (H2O molecule) is effectively transported into SiO2 film by the high-pressure SCF and passivates the defect states generated in the Ge-MOS device during high-temperature thermal PDA process.

12 

2.4 Summary

 

In summary, a low-temperature SCCO2 process at 150°C has been proposed to treat the gate oxide/epi-Ge interface and restore Ge-MOS device degradation after a high-temperature PDA process. It is observed that the uneven and poor interface was easily formed during thermal deposition processes on epi-Ge layer. After the SCF treatment, a smooth GeO2 interface layer is formed and the frequency dispersion of inversion capacitance is alleviated. Furthermore, electrical degradation of Ge-MOS device after 450°C PDA process leads to the reduction of accumulation capacitance and the increase of gate leakage current. The SCF treatment also can transport the oxidant into the gate dielectric layer and passivate the Ge-related defect states generated by PDA process. Electrical characteristics of Ge-MOS device are effectively recovered to an extent similar to the one before PDA process.

High-pressure Syringe Pump B (Co-solvent)

Co-solvent Syringe CO₂ Syringe

Reaction

Fig. 2-1 The supercritical fluid system.

Si

2. 2 μm Ge film epitaxially grown by CVD 3. 13nm SiO₂was deposited on Ge by LPCVD 4.

Fig. 2-2 The experiment processes of SiO

2/epi-Ge.

Fig. 2-3 Cross-sectional HRTEM images of LPCVD-SiO2 on epi-Ge

substrate (a) before and (b) after the SCCO₂ post-gate dielectric treatment

Fig. 2-4 The C-V characteristics of Ge-MOS devices with various SCF

treatments.

14 

Fig. 2-5 The projections of the phase diagram of carbon dioxide.

Fig. 2-6 XPS spectra of Ge 3d signal on the interface between gate

dielectric layers and epi-Ge before and after SCF treatment.

CO₂molecule

H₂O molecule attract H₂O part

attract CO₂part

HO – C – C – C –H H

H H

H H

H

propyl alcohol molecule

Oxygen molecule

Hydrogen molecule

+

-Dipole, which could attract negative/positive charge

16 

     

Dielectric

Ge surface SCF elements

Fig. 2-7 The transporting mechanism for SCCO

2 fluids taking H₂O molecule into dielectric film.

Fig. 2-8 C-V characteristics of 450°C PDA-treated Ge-MOS devices

before and after SCCO₂ post-treatment.

The inset of Fig. 2-8 depicts the leakage current characteristics of the PDA-treated Ge-MOS devices before and after SCCO₂ post-treatment.

Fig. 2-9 Schematic model of the mechanism of GeO desorption from the

GeO₂/Ge stacks.

Fig. 2-10 Direct evidence of Ge decomposition

18 

Chapter 3

Effects and mechanisms of PDA and following SCF treated on the ZrO

₂

/GeO

₂

/Si MOS capacitor

3.1 Fabrication of ZrO

2

/GeO

2

Stack with MOS Capacitor and Experiment Process

A 0.5 ohm-cm p-type (100) Si wafer was cleaned with standard RCA clean process and immediately loaded into the E-gun evaporator chamber. As the chamber pressure reached to the 5×10^-6 torr, heater was opened and temperature was setting on 250°C. At the temperature was achieved to the 250°C, the initial 1nm GeO2 film was grown at 250°C by E-gun evaporator, 20 min temperature holding after deposition was completed. Turn the heater off and waiting for 1 hr let chamber temperature to cold down to room temperature. In situ., opened the heater to reach to 250°C, the second 10nm ZrO2 film was grown at 250°C by E-gun evaporator, 20 min temperature holding after deposition was completed. Turn the heater off, and waiting temperature cold down to the room temperature. The sample was subjected to the post deposition annealing, under 400°C and 500°C 30min in a vacuum furnace, 600°C 30sec. in a rapid temperature annealing (RTA), separately. The SCF treatment was performed right after the PDA to repair the device performance. The sample was placed in a SCF system at 150°C for 1 hr, where was injected with 2500 psi of SCCO2

fluid that were mixed with 5 vol.% of propyl alcohol and 5 vol.% of pure H2O. Finally, 500nm aluminum electrodes were thermally evaporated on the top surface of ZrO2

film with an electrode area of 7.07×10^-4 cm² and the back side of silicon wafer to

fabricate MOS capacitors. The IV and CV curve to see the MOS-capacitor properties, and by current fitting to comprehend the mechanism of Ge-related defects enhancing the leakage. The experiment flows of ZrO2/GeO2 capacitor with various treatments are exhibited in Fig. 3-1.

Second part, we want to see the effects of independent SCCO2 and H2O treatment on ZrO2 thin films, to confirm the validity after SCF treated on the ZrO2

films. A 0.5 ohm-cm p-type (100) Si wafer was cleaned with standard RCA clean process. 10nm ZrO2 deposited on Si immediately by E-gun evaporator, and then there are high pressure treating after dielectric depositing. Finally, 500nm aluminum electrodes were thermally evaporated on the top surface of ZrO2 film with an electrode area of 7.07×10^-4 cm² and the back side of silicon wafer to fabricate MOS capacitors. The IV and CV curve to see the MOS-capacitor properties. The experiment flows with various SCF-liked treatments are exhibited in Fig. 3-2. The results will show in section 3.4.

3.2 Effects of PDA on the ZrO

2

/GeO

2

/Si MOS Capacitor

 

3.2.1 Parameter Description

There are three parameters represent the characteristics of MOS capacitors.

¾ Effective Oxide Thickness (EOT)

(3-1)

Eq. (3-2) represents the effective oxide thickness (EOT) related to the dielectric constant of ZrO2. For the Eq. (3-2), the less EOT represents the value of k is higher.

Where εSiO2 is dielectric constant of SiO2, εZrO2 is dielectric constant of ZrO2, dthick is the Vfb near the zero bias, the less oxide charges existing inside the dielectric. Where φms is the work function difference between gate and substrate, Q0 is the number of oxide charges in the dielectric.

¾ Hysteresis (△Vfb)

Hysteresis represents the quality of interface between the dielectric and substrate, smaller △Vfb indicate better interface quality.

3.2.2 Characteristics of CV and IV Curves

Fig. 3-3 indicate the EOT verses various temperatures annealing. The dark square is pure ZrO2 stack on Si. The red square is ZrO2/GeO2 stacks on Si. As annealing temperature increasing, the EOT is shrinking; represent the higher k values of ZrO2 along with temperature increasing. At 500~600°C we can find the good annealing temperature. But at higher temperature annealing (> 600°C), the EOT uplift due to the low k interfacial layer have been formed.

Fig. 3-4 is shown the Vfb verse various temperature annealing. For pure ZrO2

stack, the Vfb reduced along with annealing temperature increased, the PDA treatment can effective remove the oxide charges in the high-k films. For ZrO2/GeO2 stacks, the

22 

Vfb generally reduced with temperature increased, expect the 400°C condition, the Vfb

shift to the negative is due to the Ge²⁺ typed defects creation [24]. Fig. 3-5 shows the impacts with band edge photo-absorption of GeO2 films of thermal treatments on GeO2 film properties evaluated by the spectroscopic ellipsometry. From the literature, it indicates the tailing states formation at the GeO2 band edge after annealing. Because of Ge decomposition or GeO desorption enhanced the oxygen-deficiency in GeO2

films to induce the defects like neutral oxygen vacancy or Ge²⁺, cause the Vfb shift to the negative bias [24,25].

Fig. 3-6 shows the delta Vfb verse the various annealing temperature. No matter the pure ZrO2 or ZrO2/GeO2 stacks, the hysteresis can effectively be reduced via PDA, showing the appropriate annealing can improve the interface quality.

Fig. 3-7 (a) and (b) show the leakage current density at the electric filed is 4×10⁶ (V/cm). We separate tow parts to discuss, the positive and negative bias. For the positive bias, the electron-hole pairs are generated by thermal excitation in deep depletion region to as leakage source. The current is limited by generation rate of minority carriers. Also, the traps near the interface contribute to the saturation current.

So the interface quality will affect the leakage current of positive bias, the current increases with the number of density of interface traps in the interface [26]. Fig. 3-7 (a)

So the interface quality will affect the leakage current of positive bias, the current increases with the number of density of interface traps in the interface [26]. Fig. 3-7 (a)

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