Motivation

Nitrogen incorporation in CoTiO3 gate dielectrics

According to recent reports [11-25], optimized treatments which incorporate nitrogen have resulted in a significant improvement in the high-κ dielectric properties.

Nitridation of the silicon surface can reduce the growth of an interfacial layer. Plasma nitridation after deposition of the high-κ dielectric can recover the degraded mobility.

The advantages of nitrogen incorporation are the increase of the κ-value, the increase of the temperature of crystallization, the reduction of the leakage, reasonable VFB, and reduced boron penetration [11-24].

The material and electrical properties of CoTiO3 high-κ dielectrics have been investigated in earlier reports [26, 27]. In present work, nitrogen incorporation using N2+/N⁺ ion implantation or N2O plasma treatment to improve this CoTiO3 films are investigated. It is found that the nitrogen incorporation using either ion implantation or plasma treatment can significantly improve the electrical performance of CoTiO3

high-κ dielectrics.

Hf-silicate gate dielectrics deposited by MOCVD

HfO2 crystallizes at low temperatures and it is desirable to find a gate dielectric which remains amorphous during device processing where temperatures can reach as high as 1050 °C [28]. Increasing the Si concentration in hafnium silicate increases the crystallization temperature and the silicon/dielectric barrier height but reduces the dielectric constant. It has been estimated that SiO2 mole fractions, ([SiO2]/([SiO2]+[HfO2]) will be required to be > 75 mol% to avoid phase separation and crystallization [29] and films with 81 mol% SiO2 were shown to be amorphous

and thermally stable in a silicon-capped structure upon heating to 1050 °C [30]. The incorporation of nitrogen reduces significantly the required mole fraction of SiO2 [31]

but it remains to be demonstrated that such high N concentrations can be incorporated without introducing other electrical defects [32].

Gordon et al. [33] have shown that tetrakis-(diethylamido) hafnium (TDEAH) can be used with tris(t-butoxy)silanol (TBOS) to produce Hf silicate by atomic layer deposition (ALD) and surmised that similar reactions would occur between other alkylamides and tris(t-alkoxy) silanols. Deposition rates, higher than expected from a bulky precursor like TBOS, were reported along with SiO2 mole fractions as high as 75 mol%. This was explained by a mechanism that involves the absorption of two TBOS molecules for each molecule of the alkylamide [34]. However, TBOS is difficult to use because it is a solid at room temperature with a vapor pressure of ~15 Torr at 115 °C [35].

In this work, we report the use of two novel silanol precursors for metal-organic chemical vapor deposition (MOCVD) and ALD with TDEAH. Both silanol precursors are liquids at room temperature and were vaporized using a simple bubbler. The first, t-butyldimethyl silanol (BDMS), has been used to produce low silica content hafnium silicate films by MOCVD [36]. The second, tris(t-pentoxy) silanol (TPOS), is an analogue of TBOS but with a higher vapor pressure. In fact, TBOS is a solid at room temperature which melts at 63-65 °C and boils at 205-210 °C while TPOS is a liquid which boils at 96-99 °C (at 2.5 Torr).

around surface nucleation centers [23]. Since then the resulted HSG structure has been widely adopted in the dynamic random-access-memory (DRAM) devices [37] to enhance their capacitive charge-storage densities [38]. Recent studies by Akazawa have suggested that, after a long annealing time (3 hours), the growth of HSG Si would saturate, and a self-limiting, highly-uniform size distribution could be obtained regardless of the annealing temperature [39, 40].

In this study, Si nanocrystals fabricated by the thermal agglomeration technique are investigated. Ultrathin a-Si layers are deposited on a thin tunnel-oxide layer and then annealed in situ using a rapid thermal annealing (RTA) setup under UHV. The a-Si deposition and the thermal agglomeration behaviors are monitored by an in-situ x-ray photoelectron spectroscopy (XPS) machine. The surface morphology and the nanocrystal structures are analyzed by atomic force microscopy (AFM), scanning electron microscope (SEM), and transmission electron microscope (TEM). A theoretical model is then established to fit the in-situ XPS results and estimate the agglomerated dot size and density.

Nonvolatile memories with hemispherical Si-nanocrystal floating gates

In this chapter, Si-nc nonvolatile memory devices are fabricated using a thermal agglomeration technique. Si islands have been produced by annealing ultrathin a-Si [41-43] or silicon-on-insulator (SOI) [23, 37, 44-47] films under UHV conditions. It is suggested that the surface energy instabilities play an important role in the thermal agglomeration, or de-wetting, of the ultrathin films. A thermodynamic model based on the calculation of surface energy has been developed by Danielson et al. [48], in which the agglomeration instabilities observed in ultrathin SOI films were discussed. The general implications of their surface-energy-driven de-wetting theory are also suitable to explain the agglomeration behavior of a-Si thin films and the

nanocrystal formation. Although theoretical studies have provided insights of the agglomeration mechanism [42, 48], the electrical characterizations of such agglomerated Si dots are still lacking.

In this study, ultrathin a-Si films are deposited using electron-beam evaporation and then annealed in situ under UHV. Hemispherical Si nanocrystals are obtained through the thermal agglomeration process. The nanocrystals are formed on a thin tunnel-oxide layer and then covered by a control-oxide layer. Memory devices including metal-oxide-semiconductor (MOS) capacitors and field effect transistors (MOSFETs) are fabricated with the embedded Si-nanocrystal floating gates. Their electrical characteristics are investigated. This thermal agglomeration method is considered compatible with the conventional top-down process because the ultrathin a-Si film can be patterned prior to the vacuum annealing. In between the ex-situ processing and the vacuum annealing, however, the a-Si surfaces need to be cleaned and kept free of native oxide in order to ensure the Si agglomeration.