Organization of the Thesis

In chapter 1, the general background and the research motivation of the dissertation are reviewed and elucidated.

In chapter 2, the experimental apparatuses are introduced. The MOCVD system used to deposit high-κ gate dielectrics is described. Meanwhile, XPS, TEM, and MEIS employed for physical analysis are discussed. The setting of electrical

implantation of N2+ can improve the electrical properties in terms of gate leakage, breakdown voltage and time-to-breakdown (TBD). To reduce the impinging mass of implanted ion species, N⁺ ion implantation has been used. The same trends can be found as those produced using N2+. A N2O plasma treatment is also an excellent method to improve the electrical properties, exhibiting better-behaved C-V curves, lower gate leakage currents and higher breakdown voltages.

In chapter 4, two silanol precursors, BDMS and TPOS, are evaluated as silicon precursors for hafnium silicate deposition with TDEAH. BDMS has one OH group, which should react with chemisorbed TDEAH. However, the other t-butyl and methyl groups can passivate the substrate surface, and stop the further absorption of TDEAH. Carbon-free hafnium silicate thin-films are deposited by MOCVD using alternative pulses of TDEAH and TPOS precursors. Hafnium silicates with high silicon contents (Hf1-xSixO2, x >0.5) are deposited at 250 °C without additional oxidants. MOS capacitors are fabricated for electrical characterizations. A forming gas anneal can improve the hafnium silicate interface quality. This low-temperature process could be promising for TFT or optoelectronic applications.

In chapter 5, hemispherical Si nanocrystals are self-assembled using a thermal agglomeration technique. Ultrathin (0.9–3.5 nm) a-Si films are deposited on a 4-nm tunnel-oxide layer using electron-beam evaporation. XPS analysis has verified a layer-by-layer deposition mode for the a-Si film. After the deposition, an in-situ annealing can activate the thermal agglomeration of Si and transform the ultrathin a-Si films into Si nanocrystals. The Si agglomeration process is evaluated with variables such as annealing temperatures, surface oxide conditions, and initial Si film thickness. Also, it is demonstrated that XPS measurements can effectively provide the information of the nanocrystal agglomeration. Calculations are made based on the photoelectron attenuation theories [49], and a simple model is proposed. Comparisons

between the calculated results and the experimental data have shown a fairly good match. Therefore the nanocrystal features can be reasonably estimated by this model using in-situ XPS measurements.

In chapter 6, the fabrication of a Si nanocrystal-embedded nonvolatile memory has been demonstrated using a thermal agglomeration technique. MOS capacitors and MOSFETs embedded with hemispherical Si nanocrystals are fabricated and characterized. A stored charge density of 4.1×10¹² cm^-2 (electron + hole) is obtained with a highest nanocrystal density of 3.9×10¹¹ cm^-2. Uniform FN tunneling is used to program and erase the Si nanocrystal floating-gate n-MOSFETs. A Vt window of 0.9 V is achieved under P/E voltages of ±10 V for 0.02/0.1 s. The memory device also shows good endurance and charge retention behaviors after 10000 P/E cycles.

Increasing P/E voltages to ±15 V creates a large memory window (>2.7 V) with the proposed memory device. After a retention test for 100 hours, a memory window of 1 V is maintained. The retention characteristics have shown little temperature dependence with the Si nanocrystal memories, indicating that the charge-loss process is determined by the direct tunneling from nanocrystals into the oxide/Si-substrate interface states.

Finally, the important experimental results of each chapter are summarized in chapter 7. Some thoughts and suggestions for future research work are also provided.

Fig. 1.1 Moore’s law for microprocessors. Exponential increase of transistor counts as a function of time for generations of microprocessors has been substantiated [2].

Fig. 1.2 Estimated voltage (Vdd : input voltage / Vth : threshold voltage) and power consumption ( PLEAK : power induced by leakage current / PDYNAMIC : dynamic power consumption) trends. All parameters are taken from ITRS 2001 [4].

Fig. 1.3 Gate leakage current density (Jg) versus equivalent oxide thickness (EOT) of the SiOxNy and SiO2 gate dielectrics [8]. Corresponding gate channel lengths of the data points (Lg) are marked.

Chapter 2

Experimental Techniques

2.1 Ultrahigh Vacuum in-situ Processing (ISP) System

An ultra-high vacuum (UHV) system is essential for the surface study on ultra-thin films, because surface reaction is mostly affected by gas exposure. 100 mm Si(100) wafers were used as substrates for the Hf silicate depositions and for the Si nanocrystal agglomeration experiments. Normally samples were prepared by a standard HF-last RCA clean prior to insertion into an UHV multi-chamber in-situ processing (ISP) system depicted in Figure 2.1.

The UHV system consists of an entrance load-lock, an MOCVD chamber, an in-situ XPS chamber, a chamber for in-situ high vacuum rapid thermal annealing and Si e-beam evaporation, and a metal evaporator chamber. All working chambers are separated by three high vacuum tunnels and the CVD and e-beam evaporation chambers have ion-pumped buffer chambers. The vacuum of the UHV system is maintained at the level of 10^-10 Torr by ion pumps. Deposition processing, post-deposition treatments, and XPS analysis can be done without any vacuum break.

2.2 Metal Organic Chemical Vapor Deposition (MOCVD)

The hafnium precursor used for this work is tetrakis (diethylamido) hafnium (TDEAH, [(C2H5)2N]4Hf ) with a chemical structure illustrated in Figure 2.2. Hf metal is bonded with four nitrogen atoms that have two ethyl radicals. No oxygen is contained in this precursor, but nitrogen in it. This nitrogen is expected to incorporate

into the high-k film during CVD growth.

Figure 2.3 shows the schematic structure of the MOCVD system. The TDEAH precursor dissolved in octane with the concentration of 0.1 M was introduced into the reactor with a liquid injection system (LDS-300B produced by ATMI). The liquid injection system pumped the liquid solution through a nickel frit into the vaporizer of which temperature was held at 140 °C. The precursor was pumped at a rate of 0.2 ml/min (the lowest stable flow rate in our system) and carried by 50 sccm of Ar through the vaporizer. The other gases (N2 and O2) or precursors (BDMS or TPOS) were introduced into a separate gas distribution ring. The hafnium silicates were grown by pulse-mode deposition in which each deposition cycle consists of several steps controlled by solenoid valves. Gas flows were controlled by mass flow controllers present just before the gas inlet into the CVD chamber. The Si precursors were introduced by delivering the carrier gas (N2) through a heated bubbler containing the precursor. The total deposition pressure was in the range 3-11 mTorr where gas-phase collisions were rare. The sample stage temperature was controlled with a quartz-halogen heater-thermocouple combination. The base pressure of the MOCVD chamber was around 10^-9 Torr.

2.3 Material Characterization Techniques

2.3.1 X-ray Photoelectron Spectroscopy (XPS)

X-ray photoelectron spectroscopy (XPS) was used to characterize the

chemical bonding information about given elements. Figure 2.4 shows relevant energy levels for XPS measurements [50]. Binding energies of photoelectrons can be obtained from Equation (2.1), based on Figure 2.4.

Ekin = hν − E^b− Ø^spec, (2.1)

where Ekin is kinetic energy of the photoelectron, h is Plank’s constant, ν is the frequency of the photon, Eb is the binding energy, and Øspec is the work-function of the spectrometer.

The in-situ XPS system is a PHI 5000 instrument with a non-monochromatic Mg Kα X-ray (hν = 1253.6 eV) source in the standard 54 ° geometry (X-ray source 9 ° off-normal and the electron spectrometer 45 ° off normal). The pass energy for XPS survey spectra is 117.4 eV, and that for multiplex is 46.95 eV. Films were also analyzed ex-situ by XPS depth profiling using a PHI 5500 system with a mono chromatic Al Kα X-ray (hν = 1486.6 eV) source in standard 90 ° geometry (X-ray source and electron spectrometer 45 ° off normal). Depth profiling was performed with intermittent Ar⁺ sputtering at 4 keV or 1 keV, 50 nA and 45 ° incidence. The peak positions were referenced to the substrate Si 2p3/2 peak at 99.3 eV or C 1s from atmospheric contamination at 284.8 eV [51, 52]. In-situ XPS was used to determine chemical bonding and compositions of the films using standard sensitivity factors of O, N, Hf for the O 1s, N 1s, and Hf 4f peaks, respectively, which were obtained from the empirical data of the spectrometer equipped with an Omni Focus III lens supplied by Perkin-Elmer.

2.3.2 High Resolution Transmission Electron Microscopy (HRTEM)

HRTEM was utilized for structural analysis. Cross-sectional bar shaped samples were taken from the wafer and glued together surface-to-surface. The sample

is cut and placed into a 3 mm – diameter titanium disk, and then dimpled from both sides with 3 μm diamond paste until the center of the disc is ~20 μm thick. Polishing with 1 μm diamond paste follows to get a smooth surface. The final step in sample preparation is a low-angle ion milling with a beam-energy of 6 keV for perforation. A Philips EM-430T microscope was used. The maximum electron beam energy and magnification is 300 keV, and ×650000 respectively and the corresponding point resolution is 0.228 nm. A JEOL 2100F TEM/STEM with a Schottky field emission gun was also used. This microscope is operated at 200 keV and equipped with a Gatan Tridiem energy filter for electron energy loss spectroscopy (EELS) analysis and an Oxford Instrument energy dispersive spectrometer (EDS). An annular dark-field (ADF) imaging and spatially resolved spectroscopy were performed with a scanning transmission electron microscope (STEM) probe size of approximately 0.2-0.3 nm.

Figure 2.5 shows a schematic view of a STEM system equipped with EDS and EELS.

Fig. 2.1 UHV processing facility for 4 inch wafer.

Fig. 2.2 Chemical bonding structure of the tetrakis diethyl-amido hafnium (TDEAH) precursor.

Fig. 2.3 Schematic view of MOCVD system.

Fig. 2.4 Schematic of the relevant energy levels for XPS binding energy measurements. Ekin is kinetic energy of the photoelectron, h is Plank’s constant, ν is

Fig. 2.5 Schematic view of the STEM system equipped with EDS and EELS.

Chapter 3

Performance Improvement of CoTiO3 High-κ Dielectrics with Nitrogen Incorporation

3.1 Introduction

The thickness of the conventional silicon dioxide (SiO2) gate dielectrics has been scaled down to around 1.5 nm to meet the high drive requirements of high-performance (CMOS) [53]. The most serious problem we face today for this ultrathin gate dielectric is the huge gate leakage due to the direct tunneling of carriers from the channel of metal oxide semiconductor field-effect transistors (MOSFET)s [54], which reduces the transconductance of devices, and increases the standby power.

This is not adequate for low-power applications in portable equipment. For a long time, high dielectric constant (high-κ) gate materials such as Si3N4 [55, 56], Al2O3

[57-59], HfO2 [60-62], and ZrO2 [63-65] have been proposed to replace the conventional ultrathin SiO2 to solve this problem. For the same equivalent-oxide-thickness (EOT), the thickness of high-κ gate dielectrics can be increased many times. Hence, the direct tunneling current can be significantly reduced.

The choice of high-κ material is based on the following requirements:

1. The κ-value should be in the range 20–50, as high as possible but low enough to avoid the fringing-induced barrier lowering effect in

3. The interface state density should be less than 10¹¹ cm⁻² eV⁻¹ to maintain a well-behaved sub-threshold characteristic.

4. Low trap densities are required in the film to avoid Frankel-Poole tunneling.

5. The dielectric should have good thermal stability during the high-temperature processing.

6. It should have high breakdown voltage, low-leakage, and small hysteresis.

In previous work, a new high-κ dielectric CoTiO3 has been proposed for application in MOSFETs and dynamic random access memories (DRAMs) [38]. The dielectric constant for this CoTiO3 with the bottom oxide layer can be as high as 50, which makes this high-κ dielectric become very promising after the current medium κ value (15–25) materials, such as HfO2 and ZrO2, have reached their useful limit.

However, some issues still remain when high-κ materials are used. The most important issues are:

1. The interfacial layer of SiO2 or silicate remaining after deposition of high-κ materials.

2. The high fixed charge in the bulk of high-κ dielectrics which results in flat-band voltage (VFB) shifts.

3. The degradation of mobility.

4. A low crystallization temperature.

5. Boron penetration for p-MOSFETs.

According to recent reports [11-25], optimized treatments which incorporate nitrogen have resulted in a significant improvement in the high-κ dielectric properties.

Nitridation of the silicon surface can reduce the growth of an interfacial layer. Plasma nitridation after deposition of the high-κ dielectric can recover the degraded mobility.

The advantages of nitrogen incorporation are the increase of the κ-value, the increase of the temperature of crystallization, the reduction of the leakage, reasonable VFB, and reduced boron penetration [11-24]. The material and electrical properties of CoTiO3

high-κ dielectrics have been investigated in earlier reports [26, 27]. In present work, nitrogen incorporation using N2+/N⁺ ion implantation or N2O plasma treatment to improve this CoTiO3 films are investigated. It is found that the nitrogen incorporation using either ion implantation or plasma treatment can significantly improve the electrical performance of CoTiO3 high-κ dielectrics.

3.2 Experimental

Capacitors were fabricated on n-type 150 mm Si(100) wafers with a resistivity of 2-7 Ω-cm. After the growth of a 550 nm thick field oxide, the active region of capacitors were defined and etched by buffered oxide etch (BOE, NH4F: HF = 6:1).

Wafers underwent a standard RCA cleaning process and were put into the low-pressure chemical vapor deposition (LPCVD) tube in a pure NH3 ambient to grow an ultra-thin nitride ~1.0 nm thick on the Si-surface. The thickness of the nitride was measured by Ellipsometry. The purpose of this NH3-grown ultrathin nitride film is to prevent the reaction of the following sputtered Ti and then Co (Co/Ti) metal films, and also to retard the oxidation of silicon during the oxidation of Co/Ti layer.

The Co (5 nm) and Ti (5 nm) films were deposited by sputtering at a power of 500 W and a sputtering rate of 0.9 nm/sec. Then wafers underwent the N2+ or N⁺ ion

850 and 900 °C, and the oxidation time was 10 min.

Some wafers without nitrogen implantation underwent N2O plasma treatment in a plasma enhanced chemical vapor deposition (PECVD) system. The flow rate of N2O was 60 sccm, the temperature was 350 °C, the power was set at 10, 15, or 20 W, and the processing time was 5 minutes. The purpose of this N2O plasma treatment is to passivate the oxygen vacancies in the bulk film, and also to incorporate nitrogen in the dielectrics. Then the plasma-treated samples (and the untreated control sample as well) went through an additional rapid thermal annealing (RTA) at 880 °C for 40 seconds in N2 ambient. This RTA step was aimed to repair any plasma-induced damages in the CoTiO3 dielectrics. The top electrode for electrical measurements was a 500 nm Al film which was deposited by physical vapor deposition (PVD). The capacitance-voltage (C-V) curves of the capacitors were measured with an HP 4284A impedance meter at 100 kHz. The areas of the capacitors were 2.5×10^-5 cm² (50 × 50 μm) and 1×10^-4 cm² (100 × 100 μm). The current-voltage (I-V) curves were measured using an HP 4156A semiconductor parameter analyzer. The physical properties of CoTiO3 high-κ dielectrics with and without nitrogen incorporation were analyzed by transmission electron microscopy (TEM), secondary-ion mass spectrometry (SIMS), and x-ray diffraction (XRD).

3.3 Results and Discussion

A. N2+ Ion Implantation

The thickness of all CoTiO3 samples was first measured by TEM. Figures 3.1(a) and (b) show one set of the TEM pictures for samples of CoTiO3 oxidized at 800 °C for 10 min without and with nitrogen ion implantation, respectively. The physical thickness of both samples was in the range 24–25 nm. It was observed that

the oxidation of the Co/Ti films increases the thickness of the interfacial layer. This indicates that the ultrathin nitride film was not thick enough to retard the diffusion of oxygen. Compared with the sample without nitrogen implantation, smaller grains and a less diffuse boundary profile between high-κ and interfacial layers were found for the N2+-implanted sample. C-V curves at a high frequency of 100 kHz are shown in Fig. 3.2. The C-V curve of the sample oxidized at 800 °C for 10 min without nitrogen implantation was not obtained due to a large leakage current during measurement.

This may be due to the non-fully oxidized Co/Ti in the bulk of dielectrics at lower temperature for a short oxidation time of 10 min. It is found that the capacitance Cox

in the accumulation region decreases with the increasing oxidation temperature, which is due to the abundant oxygen incorporation during the oxidation step. The extracted equivalent-oxide-thickness (EOT), interfacial silicate thickness, high-κ dielectric thickness, total thickness, effective κ-value and flat-band voltage are summarized in Table 3.1. The existence of interfacial layers degrades the effective κ-value. However, the intrinsic bulk dielectric constant for CoTiO3 has been estimated using the same processes [38]. The intrinsic bulk dielectric constant was estimated as high as 50 [38], excluding the interfacial layer. It is found that the EOT increases as the oxidation temperature increased. As a result, the effective κ-value deduced from the C-V results and TEM measurements decreases as the temperature is increased. The flat-band voltage shifts to a negative value for the sample oxidized at 900 °C with nitrogen implantation. This may be due to nitrogen diffusion into the interfacial layer which creates positive charges in the film.

of gate leakage currents at Vg = 1 V. Capacitors with nitrogen implantation have a tighter distribution and smaller leakage currents than those without. Figure 3.3(c) shows the Weibull distribution of breakdown voltages. Once again, the capacitors with nitrogen implantation have higher breakdown voltages.

The samples with and without nitrogen implantation are also subjected to a constant-voltage (Vg = 2V) stress, and the results are shown in Figures 3.4(a) and (b).

For the capacitors without nitrogen implantation, a significant increase of gate leakage was found after stressed for 100 s, as shown in Fig. 3.4(a). On the other hand, the samples with nitrogen implantation exhibited no significant increase in gate leakage currents, as shown in Fig. 3.4(b), when compared to those without nitrogen implantation.

Figure 3.5 shows the x-ray diffraction spectra for a CoTiO3 film oxidized at 850 °C with and without nitrogen implantation. For the sample without nitrogen implantation, a clear peak intensity was found around 34° for the CoTiO3 (311) phase.

However, the peak is not so clear for the sample with nitrogen implantation. This implies that the nitrogen implantation of the Co/Ti films can retard the crystallization of CoTiO3.

B. N⁺ Ion Implantation

To reduce the possible damages caused by the nitrogen ion implantation, two approaches can be adopted. The first approach is to reduce the mass of implanted species by using N⁺ ions instead of N2+. Figure 3.6(a) shows the result. The oxidation temperature was 850 °C with a reduced oxidation time of 5 min. This can reduce the oxygen encroachment during the high temperature oxidation. The leakage current decreased as the nitrogen dose increased. The Weibull distributions of gate leakage currents and breakdown voltages are shown in Figures 3.6(b) and (c), respectively. It

can be seen that high nitrogen doses improve the electrical properties of the capacitors.

C. N2O Plasma Treatment

The second approach to avoid the damage from ion implantation is generally to use the N2O plasma treatments [69, 70] or post-deposition annealing (PDA) in nitrogen-related ambient, such as N2, NO, N2O , or NH3 [71, 72]. In present study, the N2O plasma treatment (at powers of 10, 15, and 20 W) was applied after the oxidation step. Some samples without nitrogen ion implantation underwent the N2O plasma treatment before the gate-metal deposition. This treatment can passivate the oxygen vacancies (by oxygen radicals in N2O plasma) in the dielectric bulk and also introduce nitrogen (radicals of nitrogen in the N2O plasma) into the bulk.

Figures 3.7 shows SIMS profiles for a sample treated with N2O plasma (20 W).

It is found that nitrogen atoms pile up at the high-κ/Si interface after the N²O plasma treatment. This profile is different from the report using N2 plasma in which the nitrogen has diffused uniformly into the bulk after annealing at 700 °C [70]. However, this result is similar to the resultant nitrogen profile in ultrathin gate oxide (or oxy-nitride) formed by N2O oxidation or annealing [73]. Another advantage using N2O plasma instead of N2 plasma is the oxygen radicals introduced into the bulk of the high-κ film.

The oxygen profiles for all samples are measured and shown in Fig. 3.8. It is clear that samples with N2O plasma treatments exhibit higher oxygen concentrations

As a result, the increase of oxygen by the N2O plasma treatment is also helpful to

As a result, the increase of oxygen by the N2O plasma treatment is also helpful to