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For portable wireless communication devices has given great push to the development of a next generation of low power radio frequency integrated circuits (RFIC) product. Such as wireless phones, cordless and cellular, global positioning satellite (GPS), pagers, wireless modems, wireless local area network (LAN), and RF ID tags, etc., require more low cost, low noise and high power efficiency solutions to supply the demand for low-price product [6].

Chapter 2 discusses the basic concepts in RF design. Chapter 3 presents the basic low-noise amplifiers design for UWB. Chapter 4 discusses the design procedures of this circuit by using of the band pass filter , the current buffer configuration, the shunt-LC resonance, Current-Reused Technique to get a good input and output matching, broadband, a low power consumption, and also reveals the simulations and the measurements .The last chapter, Chapter 5 is the summary.

Chapter 2

Basic Concepts in RFIC Design

---2.1 Noise Sources in MOSFETs

2.1.1 Drain Current Noise

There are three main sources which contribute the thermal noise of MOSFETs [7]. And the dominate noise source of RF MOSFETs is the drain current noise which is expressed as:

i

nd2

= 4 KT γ g

d0

Δ f

(2.1) where gd0 is the drain-source conductance at zero VDS. The coefficient γ has a vale of unity at zero VDS and, in long channel devices, decrease toward a value of 2/3 in saturation [8]. Some measurements show that short-channel devices exhibit noise considerably in excess of values predicted by long-channel theory, sometimes by an order of magnitude in extreme cases. Some of the literature attributes this excess noise to carrier heating by the large electric fields commonly encountered in such devices.

In this view, the high fields produce carriers with abnormally high energies. No longer in quasi-thermal equilibrium with the lattice, these hot carriers produce abnormal amount of noise. But in contrast to other groups, we find only a moderate enhancement of the drain current noise for short-channel MOSFETs by our good

measurements.

2.1.2 Substrate Thermal Noise

substrate C

cb

R

sub

drain source

gate

substrate C

cb

R

sub

drain source

gate

Figure 2-1 Substrate thermal noise

Figure 2-1 shows a simplified picture of how the thermal noise associated with the substrate resistance can produce measurable effect at the main terminals of the devices. At frequencies low enough that we may ignore Ccb (open), the thermal noise of Rsub modulates the potential of the back gate, contributing some noisy drain current:

i

nd2 ,sub

= 4 KTR

sub

g

mb2

Δ f

(2.2) Depending on bias conditions – and also on the magnitude of the effective substrate resistance and size of the back-gate transconductance – the noise generated by this mechanism may actually exceed the thermal noise contribution of

the ordinary channel charge. In this regime, layout strategies that reduce the substrate resistance have a noticeable and beneficial effect on noise.

At frequencies well above the pole formed by Ccb and Rsub, however, the substrate thermal noise becomes unimportant, as is readily apparent from inspection of the physical structure and the corresponding frequency-dependent expression for the substrate noise contribution [8]:

f

The characteristics of many IC processes are such that this pole is often around 1 GHz.

Excess noise produced by this mechanism consequently will be most noticeable below about 1 GHz.

2.1.3 Drain Induced Gate Noise

2

Figure 2.2 Drain induced gate noise

2

i

ngng2

g

g

C

gs

i g

g

C

gs

Figure 2.3 Equivalent circuits

In addition to drain noise, the thermal agitation of channel charge has another important consequence: gate noise. The fluctuating channel potential couples capacitively into the gate terminal, leading to a noisy gate current (see Figure 2-2).

Noisy gate current may also be produced by thermally noisy resistive gate material.

But this noise source will be separately discussed later, even though it is more and more important in nano-scale devices. Although the drain-induced-gate-noise is negligible at low frequencies, it can dominate at radio frequencies. Van der Ziel has shown that the drain-induced-gate-noise may be expressed as:

i

ng2

= 4 KT δ g

g

Δ f

(2.4) where the parameter gg is:

0 2 2

5

d

gs

g

g

g ω C

=

(2.5)

Van der Ziel gives a value of 4/3 (twice γ) for the gate noise coefficient, δ, in long channel devices [8].

The circuit model for the drain-induced-gate-noise is a conductance

connected between gate and source, shunted by a noise current source (see Figure 2-3).

This noise current clearly has a spectral density that is not constant. In fact, it increases with frequency, so perhaps it ought to be called “blue noise” to continue the optical analogy. Because the drain thermal current noise and the drain-induced-gate-noise do share a common origin, they are correlated. That is, there is a component of the gate noise current that is proportional to the drain noise current on an instantaneous basis.

Although the noise behavior of long-channel devices is fairly well understood, the precise behavior of δ and γ in the short-channel regime is still unknown at present. That’s why we have to do more research on the thermal noise of MOSFETs. Thermal noise of deep sub-micrometer MOSFETs has received considerable attention lately, which is mainly triggered by publications that report a severe enhancement of the thermal noise with respect to long-channel theory [9]-[10].

In the earliest of these publications [9], thermal noise was found to be enhanced by a factor up to 12 in n-channel devices with 0.7μm gate length and hot electrons were proposed to explain these results. Evidently, the reported noise enhancements would seriously limit the viability of RF CMOS and a detailed study is called for. Therefore, in this paper, we perform an extensive study of the RF noise in 0.18μm RF CMOS technology.

2.2 Noise Analysis

2.2.1 The Concept of Noise Figure

Noise is usually generated by the random motions of charges or charge carriers in devices and materials. Because the noise process is random, one cannot identify a specific value of voltage at a particular time, and the only recourse is to characterize the noise with statistical measures, such as the mean-square or root-mean-square values. Because of having various noise sources in the circuit, we need to simplify calculation of the total noise at the output [11]. Obviously, the output-referred noise does not allow a fair comparison of the performance of different circuits because it depends on the gain. According the circuit theory, we can use the input-referred noise of circuits to represent the noise of behavior in the circuits.

The signal-to-noise ratio (SNR), defined as the ratio of the signal power to the total noise power, is an important parameter. In RF circuit, most of the front-end receiver blocks are characterized in terms of their “noise figure” rather than the input-referred noise. Noise figure has many different definitions. The most commonly accepted definition is noise figure

out in

SNR

= SNR , (2.6)

Noise figure is a measure of how much the SNR degrades as the signal passes through a circuit. If a circuit has no noise source, the SNRout = SNRin, regardless of the gain.

Noise added by electronics will be directly added to the noise from the

input. Thus, for reliable detection, the previously calculated minimum detectable signal level must be modified to include the noise from the active circuitry. Noise from the electronics is described by noise factor F, which is a measure of how much the signal-to-noise ratio is degraded through the system. We note that

S

S . We derive the following equation for the noise factor:

) originating at the source, and is the noise at the output added by electronic circuitry, then we can write:

)

(total o source o added

o

N N

N = +

(2.9)

Noise factor can be written in several useful alternative forms:

)

This shows that the minimum possible noise factor, which occurs if the electronics add no noise, is equal to 1.Noise figure NF is related to noise factor F by

F

NF = 10 log

10 (2.11) Thus, while noise factor is at least 1, noise figure is at least 0 dB. In other words,

an electronic system that adds no noise has a noise figure of 0 dB.

In the receiver chain, for components with loss (such as switches and filters), the noise figure is equal to attenuation of the signal. For example, a filter with 3 dB of loss has a noise figure of 3 dB. This is explained by noting that output noise is approximately equal to input noise, but signal is attenuated by 3 dB. Thus, there has degradation of SNR by 3 dB [12].

2.2.2 Linearity in RF Circuits

Mathematically, any nonlinear transfer function can be written as series expansion of power terms unless the system contains memory. While many RF circuits can be approximated with a linear model to obtain their response to small signals, nonlinearities often lead to interesting and important phenomena. For

simplicity, we assume that:

3

...

One common way of characterizing the linearity of a circuit is called the two-tone test. In this test, an input consisting of two sine waves is applied to the circuit.

When this tone is applied to the transfer function given in (2.12), the result is a

number of terms:

These terms can be further broken down into various frequency components.

For instance, the term has a zero frequency (dc) component and another at the second harmonic of the input:

X12

The second-order terms can be expands as follows:

( ) N

where second-order terms are composed of second harmonics HD2, and mixing components, here labeled IM2 for second-order intermodulation. The mixing components will appear at the sum and difference frequencies of the two input signals.

Note also that second-order terms cause an additional dc term to appear.

The third-order terms can be expanded as follows:

( ) N N

Third-order nonlinearity results in third harmonics HD3 and third-order intermodulation IM3. Expansion of both the HD3 and IM3 terms shows output signals appearing at the input frequencies. The effect is that third-order nonlinearity can change the gain, which is seen as gain compression. This is summarized in Table 2.1.

Note that in the case of an amplifier, only the terms at the input frequency are desired. Of all the unwanted terms, the last two at frequencies 2ω1−ω2 and

1

2 −ω are the most troublesome, since they can fall in the band of desired output if

ω is close in frequency to 1 ω and therefore cannot be easily filtered out. These two 2 tone are usually referred to as third-order intermodulation terms (IM3 products)

2.2.3 Third-Order Intercept point and The 1-dB Compression Point

One of the most common ways to test the linearity of a circuit is to apply two signals at the input, having equal amplitude and offset by some frequency, and plot fundamental output and intermodulation output power as function of input power as show in Figure 2-5. From the plot, the third-order intercept point (IP3) is determined. The third-order intercept point is a theoretical point where the amplitudes of the fundamental tones at 2ω1−ω2 and 2ω2−ω1 are equal to the amplitudes of the fundamental tones at ω and 1 ω . 2

From Table 2.1, if v1 =v2 =vi, then the fundamental is given by

fund= 1 3 3 The linear component of (2.19) given by

fund=

k

1

v

i (2.20) can be compared to the third-order intermodulation term given by

IM3= 3 3

4 3

v

i

k

(2.21)

The small , the fundamental rise linearity (20dB/decade) and that the IM3 terms rise as the cube of the input (60dB/decade). A theoretical voltage at which these two tones will be equal can be defined:

vi

That (2.23) gives the input voltage at the third-order intercept point. The input power at this point is called the input third-order intercept point (IIP3). If IP3 is specified at the output, it is called the output third-order intercept point (OIP3).

The third-order intercept point cannot actually be measured directly, since by the time the amplifier reached this point, it would be heavily overloaded. Therefore,

it is useful to describe a quick way to extrapolate it at a given power level. Assume that a device with power gain G has been measured to have an output power of at the fundamental frequency and a power of at the IM3 frequency for a given input power of , as illustrated in Figure 2-5. On a log plot of and versus , the IM3 terms have a slope of 3 and the fundamental terms have a slope of 1. Therefore,

P1

since subtracation on a log scale amounts to division of power.

Also note that

P

i

P IIp

OIP

G = 3 − 3 =

1

(2.26)

These equations can be solved to given

[

1 3

] [

1 3

]

In addition to measuring the IP3 of a circuit, the 1-dB compression point (Figure 2-4) is another common way to measure linearity. This point is more directly measurable than IP3 and requires only one tone rather than two. The 1-dB compression point is simply the power level, specified at either the input or the output, where the output power is 1dB less than it would have been in an ideally linear device.

It is also marked in Figure 2-5[12].

2.3 Cascaded Nonlinear Stages

Since in RF systems, signals are processed by cascaded stages, it is important to know how the nonlinearity of each stage is referred to the input of the cascade. Consider two nonlinear stages in cascade, as shown in Figure2-6. Assuming that the input-output relationship is

y

1

( t ) = α

1

x ( t ) + α

2

x

2

( t ) + α

3

x

3

( t )

(2.28)

y

2

( t ) = β

1

y

1

( t ) + β

2

y

12

( t ) + β

3

y

13

( t )

(2.29) Substitute (2.28) into (2.29) results in the relation

)

If we consider only the first- and third-order terms, then

From equation (2.31) can be simplified if the two sides are inverted and squared:

where AIP3,1 and AIP3,2 represent the input IP3 points of the first and second stages, respectively. From the above result, we note that as α increases, the overall IP1 3

decreases. This is because with higher gain in the first stage, the second stage senses larger input levels, thereby producing much greater IM3 products [13].

Figure 2-4 Definition of the 1-dB compression point

Figure 2-5 Plot of input output power of fundamental and IM3 versus input power.

1

IIP

3,

IIP

3,2

Figure 2-6 Cascaded nonlinear stages

Table 2.1

Frequency Component Amplitude

dc

(

2 22

)

Chapter 3

General Consideration in LNA Circuit Design ---

3.1 Low Noise Amplifier Basic

Low noise amplifier is the first gain stage in the receive path so its noise figure directly adds to that of the system. Therefore, there are several common goals in the design of LNA. These include minimizing noise figure of the amplifier, providing enough gain with sufficient linearity and providing a stable 50 ohm input impedance to terminate an unknown length of transmission line which delivers signal from antenna to the amplifier [9]. Among LNA architectures, inductive source degeneration is the most popular method since it can achieve noise and power matching simultaneously, as shown in Figure 3-1. The following analysis in 3.2 is based on this architecture. The LNA basic considerations are introduced as follows.

Figure 3-1 Common-source input stage with inductive source degeneration.

3.1.1 Impedance Matching Network

The need for impedance matching network becomes more important. In order to deliver maximum power to a load, it must be properly terminated at both the input and the output ports. The input impedance of a circuit can be any values in order to have the best power transfer into the circuit. It is necessary to match this impedance to the impedance of the source driving the circuit. The output impedance also must be similarly matched in order to deliver maximum power to the 50 ohm load, it must have the terminations ZS and ZL. The input matching network is designed to transforms the generator impedance to the source impedance ZS, and the output matching network transforms the 50 ohm termination to the load impedance ZL. Consider the RF system shown in Figure 3-2. Here the source and load terminations are 50ohm, as the transmission lines leading up to the circuit for optimum power transfer, prevention of ringing and radiation, and good noise behavior. For example, we needs the circuit input and output impedances matched to the system. In general, some matching circuit must almost always be added to the circuit, as shown in Figure 3-3.Typically, reactive matching circuits are used because they are lossless, adding no noise to the circuit, and will only be matched over a range of frequencies and not at others. If a broadband matching is required, then other techniques may need to be used. An example of matching a transistor amplifier with a capacitive input is shown

in Figure 3-4. The series inductance adds an impedance of jωL to cancel the input capacitive impedance. Note that, in general, when the impedance is complex

( )

,

then to match it, the impedance must be driven from its complex conjugate . jX R+

(

R jX

)

The input, output impedance of a circuit is very common in using reactive components to achieve impedance transformation, as they will not absorb any power or add any noise. Thus, series or parallel inductance or capacitance can be added to the circuit to provide an impedance transformation. Series components will move the impedance along a constant resistance circle on the Smith Chart. Parallel components will move the admittance along a constant conductance circle. Table 3.1 summarizes the effect of each component.

With the proper choice of two reactive components, any impedance can be moved to a desired point on the Smith Chart. There are eight possible two-components matching networks, also known as Ell networks, as shown in Figure 3-5. Each will have a region in which a match is possible and a region in which a match is not possible.

Figure 3-2 Circuit embedded in a 50 ohm system

Figure 3-3 Circuit embedded in a 50 ohm system with matching circuit

Figure 3-4 Example of a very samplematching circuit network

Figure 3-5The eight possible impedance-matching networks with two reactive components

Table 3.1

Component Added Effect Description of Effect

Series inductor zz+ jωL Move clockwise along a resistance circle

Series capacitor zzj ωC

Smaller capacitance increases impedance

(

j ωC

)

to move

counterclockwise along a conductance circle

Parallel inductor yyj ωL

Smaller inductance increases admittance

(

j ωL

)

to move counterclockwise along a conductance circle

Parallel capacitor yy+ jωC

Move clockwise along a conductance circle

3.1.2 Stability

The stability of an amplifier is a very important consideration in a design and can be determined from the S parameters, the matching networks, and the terminations. A two-port network to be unconditionally stable can be derived from

(3.1) to (3.4) .

The two-port network is shown in Figure 3-6. For unconditional stability any passive load or source in the network must produce a stable condition. The solution of (3.1) to (3.4) gives the required conditions for the two-port network to be unconditionally stable [4].

2 21 A convenient way of expressing the necessary and sufficient conditions for

unconditional stability is

k > 1

(3.7)

Figure 3-6 Stability of two-port networks

3.2 Low Noise Amplifier Architecture Analysis

Cgs

Figure 3-7 Equivalent noise model of Figure 3-1 In Figure 3-7, the input impedance can be expressed as

gs

as shown in equation (3.9), the input impedance is equal to the multiplication of cutoff

frequency of the device and source inductance at resonant frequency. Therefore it can be set to 50 ohm for input matching while resonant frequency is designed to be equal to the operating frequency.

According to prior introduction, the equivalent noise model of common-source LNA with inductive source degeneration can be expressed as Figure 3-7, where is the parasitic resistance of the inductor and is the gate resistance of the device.

Note that the overlap capacitance C

Rl

Rg

gd has also been neglected in the interest of simplicity. Then the noise figure can be obtained by computing the total output noise power and output noise power due to input source. To find the output noise, we first evaluate the trans-conductance of the input stage. With the output current proportional to the voltage no Cgs and noting that the input circuit takes the form of series-resonant

gd has also been neglected in the interest of simplicity. Then the noise figure can be obtained by computing the total output noise power and output noise power due to input source. To find the output noise, we first evaluate the trans-conductance of the input stage. With the output current proportional to the voltage no Cgs and noting that the input circuit takes the form of series-resonant

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