Chapter 1 Introduction
1.2 Motivation
Semiconductor control circuits have been used extensively in radars, communication systems, electronic warfare, wireless applications, instruments and other systems for controlling the signal flow or to adjust the phase and amplitude of the signal. At RF, microwave, and millimeter-wave frequencies, many of the problems of bandwidth, switching speed, power handling, high dynamic range, low voltage operations and high operating frequency have already been solved. One of the most suitable MMIC components is the switching circuit. When MMIC technology first received acceptance, switch products played a key role. In microwave systems, the transmitter and receiver portion is called a transceiver, and it requires several switches (low and high power). Low-power switches are used in phase shifters and attenuators [19].
Transmitter (TX)/Receiver (RX) switches have always been a key component of radar and communication systems. It is being an important role between TX and RX port. Fig. 1.1 shows the diagram. RF Switch controls the signal through the low noise amplifier (LNA) or power amplifier (PA) in the T/R module. Therefore, the design of switch is the key performances of the whole transceiver circuit.
Today, most RF switch modules are implemented using GaAs technology, because it has bandwidths of multi-gigahertz and high power handling capabilities. However, the rapid technology evolution of Si MOSFET is beneficial for IC design with higher device speed and cost reduction. Besides the advantages on digital performance, the scaling of CMOS technology has largely improvement along with CMOS technology scaling is the large RF gain, higher cut-off frequency (ft) and maximum oscillation frequency (fmax). This has made CMOS device technology the prime choice for Mixed-Signal/RF system-on-chip (SoC) application such as WCDMA, W-LAN, and UWB wireless communication.
Considering the cost down and system integration, high-frequency circuits can be implemented in standard CMOS process. However, the characteristics of low mobility, high substrate conductivity, low breakdown voltage and various parasitic parameters of CMOS processes, it is challenging to design CMOS switches to achieve low insertion loss, high isolation, wide bandwidth and high power handling capability. As CMOS technology is scaled down, the speed improvement furthers the RF performance and makes it suitable for higher frequency applications.
Fig. 1.1 Transceiver front end diagram.
Chapter 2
General Concepts of Switch 2.1 Introduction
RF Switch is an important component in transceiver circuit. Therefore its
performance decides the whole communication system. Because of finite impedance of the switching devices and finite losses of the connecting circuitry, the fabricated switch circuits do not have ideal performance. The following contents describe the RF Switch of insertion loss, isolation and power handling capability.
2.2 Insertion Loss
Switch controls the signal through the transmitter path or receiver path to the Antenna port. The insertion loss of switch will impact the performance of system, it would influences noise figure of receive path directly and data accuracy of transmit path. It is defined as the ratio of the power delivered to the load in the “ON” state of the ideal switch to the actual power delivered by the practical switch, in the ON state. Low insertion loss is importance parameter when we design switch circuit. In the RF circuits, we measure insertion loss with S-parameter and the unit is dB.
2.3 Isolation
Because switch simultaneously connects TX port and RX port, the signal in one port interfere another port is possible. So signal should only transmit signal from TX port to antenna, it would not through switch flow to RX port; in the same way, signal would not through switch flow to TX port if it should receive signal from antenna to RX port. The parameter of judging whether signals influencing other port is called isolation. It is defined as the ratio of the power delivered to the load for an ideal switch in the ON state to the actual power delivered to the load when the switch is in the
“OFF” state. In the RF circuits, we measure insertion loss with S-parameter and the unit is dB. The value we hope more higher and higher.
2.4 Power Handling Capability and 1-dB Compression Point
In the transmit mode, signal through switch from PA to antenna, therefore, T/R switch need to handle the great power signal from transmitter in order to avoid signal distortion. In the RF circuits, we measure power handling capability with observing the 1-dB compression point and the unit is dBm. The high P1dB value means high power capability. In RF circuits, “1-dB compression point,＂defined as the input signal level that causes the small-signal gain to drop by 1 dB. The output level falls below its ideal value by 1 dB at the 1-dB compression point [1], shown in Fig. 2.1.
When operating within the linear region of a component, gain through that component is constant for a given frequency. As the input signal is increased in power, a point is reached where the power of the signal at the output is not amplified by the same amount as the smaller signal. At the point where the input signal is amplified by an amount 1 dB less than the small signal gain, the 1 dB Compression Point has been reached. A rapid decrease in gain will be experienced after the 1 dB compression point is reached. If the input power is increased to an extreme value, the component will be destroyed.
Fig. 2.1 Definition of the 1-dB compression point.
Chapter 3
Concepts of Switch Circuit Design 3.1 Introduction
With the development of silicon technology, radio frequency circuits can be implemented in standard CMOS process. RF Switch circuit can be one of these circuits with system integration. Therefore, many techniques have been proposed achieve low insertion loss, high isolation and high power handling capability. The following contents describe the methods of how to design a good switch.
3.2 Architecture
There are three basic configurations that may be used for a simple switch designed to control the flow of microwave signals between various ports. These are shown in Fig.
3.1 for a SPDT switch, which consists of series, shunt, and series-shunt configurations.
In Fig. 3.1(a), the equivalent circuit model of an on-state transistor is a small resistor.
For the off-state transistor, it is represented as a small capacitor. When operating frequency increases, equivalent impedance will become smaller, see eq.3.1. Isolation will become worse between transmit and receive end.
C Z j
ω
= 1
（3.1）In Fig. 3.1(b), the shunt configuration requires a 4λ line in each arm. In a shunt configuration, when a device is in high-impedance state in one arm, the device in the second arm is in low-impedance state. With a 50 ohm 4λ line, the low impedance is transformed to high impedance at the input, while the parallel combination of device’s high impedance and 50 ohm terminal impedance does not affect the input impedance.
Thus a 4λ line reduces the effect of device’s low impedance on the input impedance of the switch and keeps the switch circuit matched to 50 ohm at the input under both the ON and OFF states.
(a)
(b)
(c)
Fig. 3.1 Switch configurations,(a) series, (b) shunt, and (c) series-shunt.
The schematic of the ordinary switch is shown in Fig. 3.1(c). It is series-shunt type [2]. Transistors M1, M2, M3 and M4 perform the main switch function. A high control voltage turns M1 and M4 on, which enable the path between the antenna and transmitter. Similarly, the receiver path is turned on when the control voltage is low.
Two transistors (M1 and M2) in series form a single-pole-double-throw switch. M3 and M4 are two shunt transistors which improve the switch isolation because they provide a way to let signal insert to ground. Therefore, the off path signal will flow to ground and do not interfere the signal of on path.
V
ctrlThe switch is ON when the series device is in the low-impedance state and the shunt device is in the high-impedance state. In the OFF state of the switch, the series device is in the high-impedance state and the shunt device is in the low-impedance state.
Isolation obtained with a series-shunt configuration is much better (more than twice in decibels) than that for either series or shunt switch. The insertion loss for the series-shunt configuration is worse than that for a shunt switch but better than that for a series switch. It looks surprising that a switch using two (lossy) devices can have an insertion loss smaller than that with a single device. However, use of a series-shunt switch reduces the reflection loss (compared to that for a series switch) and thereby improves the insertion loss. Using a combination of series-shunt devices eliminates the
The simple equivalent circuit model of an on-state transistor is a small resistor. For the off-state transistor, it is represented as a small capacitor. In this method, we can understand the basic operating state of switch circuit. When operating frequency increases, equivalent impedance will become smaller. From eq. 3.1 we know series-shunt type has the problem that signal loss on off-state path will become worse as frequency increasing. The effect of capacitor coupling is the reasons why insertion loss and isolation performance degraded in high frequency.
3.3 High Power Handling Capability
3.3.1 Introduction
For several communication and radar applications one needs high-power-handling switches. The maximum power handling of switches depends on the maximum voltage that can be applied safely on the device in the OFF state and the maximum current limit of the FET in the ON state. Typical CMOS switches have poor linearity and power handling capability, primarily due to drain and source parasitic diodes. Fig. 3.2 shows the simple equivalent circuit of an off-NMOS transistor.
Fig. 3.2 Equivalent circuit of off-NMOS transistor.
Due to small on-resistance of the series MOSFET, the source and drain are kept almost at the same potential under the on-state. The parasitic drain and source diodes are thus always kept reverse biased even when there are strong voltage swings at the drain and source respectively. Nevertheless, the sources of the shunt MOSFETs are grounded, a negative voltage swing on the drain can push the two back-to-back parasitic diodes into a forward bias region. So the voltage on the drain is clamped to a certain value in the negative region by these forward-biased diodes, leading to distortion in the output signal and then the power handling capability, linearity and insertion loss are degraded. Consequently we know the parasitic diode is the major
3.3.2 Techniques of Improving Power Handling Capability
There are many ways to solve the power-handling capability issue. From the paper [3], it used stacked series transistors to share power, so power-handling capability can be improved. The power handling capacity of FET switches is improved by using FETs having large gate periphery and by stacking N-FETs in series. If the RF swing voltage is evenly divided within the stacked of N-FETs, the power handling capability increases approximately as the square of the number of FETs stacked in a series, and the maximum power is given [19] by
0
gate-drain (or gate-source) breakdown and the pinch-off voltage of the FET, respectively.
Z0 VB Vp
Similarly when the operating voltage ( ) is low and for FETs stacked
in a series, the maximum power is given by
Vc VB >>Vc
Moreover, the switch uses an LC-tuned substrate biasing technique to dramatically improve the power-handling capability [4]. The body of transistor is series a resonant circuit with capacitance shunt inductance, as shown in Fig. 3.3. It can improve
power-handling capability in the specific frequency range. On the other hand, it can be used only on narrow band. Body-floating technique is body series a large resistor about 5kΩ, as shown in Fig.3.4. It has the same operating mode with LC-tuned substrate biasing technique, but it can improve power-handling capability in a wide band.
Besides, it can also decrease insertion loss for on-state switch [5] [6]. A 15-GHz T/R switch is reported in [7], the impedance matching network was employed to improve the linearity, while the isolation performance is degraded. The linearity can also be improved by using differential architectures [13] because due to the absence of shunt arm, see Fig. 3.5.
Fig. 3.4 Body series large resistor type.
[13]
Fig. 3.5 Architecture of differential T/R switch.
3.3.3 Body-Floating Technique
The goals of T/R switch performance are low insertion loss, high isolation and high power-handling capability.To improve the insertion loss, the substrate resistance RB should be extremely large. If the substrate resistance becomes very large, the path of signal flowing to ground will become not easy and the loss can reduce. Therefore, it is important to let RB be large enough. Furthermore, the parasitic capacitance associated with the body will seriously affect the impedance of the switch when the body of the transistor is connected to ground. For these reasons, the body is connected to ground with a large resistor. The large resistor provides an open circuit for the RF signal to improve the insertion loss without affecting the impedance of the switch.
For improve the power performance of the CMOS switch, we can use the body-floating technique [5] [6]. The circuit schematic of a shunt transistor is shown as Fig. 3.6(a). For the off-state NMOS transistor, its simple equivalent circuit is a small capacitance shunt with the two back-to-back parasitic diodes (body to source and body to drain). The equivalent circuit model under off-state is shown in Fig. 3.6(b). In general, body without connecting large resistance and the high input power signal will turn on the diode between body and drain. The diode can be equivalent to a small resistor. A small resistor will cause the current from ground to drain increasing quickly.
power-handling capability as shown in Fig. 3.6(c). If using body-floating technique, the body of the transistor is connected to ground with a large resistor. The high input power signal will still turn on the diode between body and drain. The diode also can be equivalent to a small resistor. But the resistor between body and ground is becoming very large, the current from ground to drain will increase smoothly, see Fig. 3.6(d). For this reason, power-handling capability can be improved by using body-floating technique.
In fact, the technique that body floated and negatively biased simultaneously can have better result about increasing the switch’s linearity and power handling capability [16], see Fig. 3.7. It shows the floating body of the shunt MOSFET is biased using a negative dc voltage via the body bias resistor. Since there is no current flow through large body resistor, the dc potential of the bulk node is kept the same as the negative bias. Therefore, the source parasitic diode is always in the reverse bias and the drain parasitic diode can bear a strong negative voltage which larger than ordinary body floating circuit. So using the negative body bias technique can lead to a larger power handling for T/R switch.
(a) (b)
(c) (d)
Fig.3.6. (a) Circuit schematic of shunt transistor. (b) The equivalent model in the
Fig. 3.7 Equivalent circuit of shunt MOSFET with bulk negatively biased.
3.3.4 Asymmetric-LDD MOS Transistor for Switch Circuit Design
The power handling capability can be improved by applying a positive dc potential to the drain of the shunt MOSFET [16]. This technique is useful when the RF signal entering the RX or leaving the TX port has a positive dc offset.
The rapid technology evolution of Si MOSFET is beneficial for IC design with higher device speed and cost reduction. However, the low drain breakdown voltage of CMOS transistors limits the use of CMOS for power amplifiers. This limitation for high voltage operation significantly reduces the maximum output power and efficiency for CMOS devices. To overcome the low breakdown voltage issue and improve the RF
power performance, we use asymmetric-lightly-doped-drain (LDD) MOS transistor for high frequency RF power application [11].
This new asymmetric MOSFET is fully embedded in the conventional foundry logic process without any additional process step or extra cost. The asymmetric-LDD MOS transistor has higher drain breakdown voltage. The structure comparison of (a) the new asymmetric-LDD MOS transistor and (b) conventional MOS transistor are shown schematically in Fig. 3.8. The LDD region at the drain size was removed that is the major difference to conventional MOS. This large improvement of breakdown voltage is due to the designed wide depletion region beneath the spacer region and between the drain and substrate. Such wide depletion region in the new design can support significantly larger reverse-biased drain voltage than conventional case. Figure 3.9 shows the comparison of DC drain breakdown voltage for conventional and asymmetric-LDD MOS transistor. For conventional MOS, the breakdown voltage is 3.5V. In sharp contrast, the breakdown voltage of asymmetric-LDD MOS is increased to 6.9V. So we can use the asymmetric-LDD MOS in our switch design to improve power-handling capability because we could apply higher dc voltage to the drain of the shunt MOSFET.
(a)
(b)
Fig. 3.8 Device structures of (a) an asymmetric-LDD MOS transistor and (b) a conventional MOS transistor.
0 1 2 3 4 5 6 7 8 0.00
0.02 0.04 0.06 0.08 0.10
Drain Current (μA/μm)
Drain Voltage (V)
C onven tional A sym m etric-LD D
Fig. 3.9 Comparison of drain breakdown voltage for conventional and asymmetric-LDD MOS transistor.
Chapter 4 T/R Switch Circuit 4.1 Circuit Topology
Fig. 4.1 shows the circuit schematic. This circuit was designed with Agilent Advanced Design System (ADS), and implemented in TSMC 0.18μm RF CMOS technology. Due to the different requirements in the TX mode and the RX mode, the switch is designed to be asymmetric. The T/R switch was designed by series-shunt topology using body-floating technique and asymmetric-LDD MOS transistor.
The devices of M1、M2、M3、M4 are the series transistors, and M5、M6、M7 are the shunt transistors which can improve the isolation of T/R switch. The signal is transmitted from TX node to ANT node and received from ANT node to TX node.
Cbypass is on-chip bypass capacitor which provides ideal ac ground. It can isolate DC to avoid DC power consumption. The on-state and off-state of transistors are shown as Table 4.1. On-state transistor is biased at 1.8V and off-state transistor is biased at 0V.
M5 use asymmetric-lightly-doped-drain (LDD) MOS which is our LAB developed MOS. This large improvement of breakdown voltage is due to the designed wide depletion region beneath the spacer region and between the drain and substrate.
Asymmetric-LDD MOS transistor can endure high voltage. The key point is the large bias region on the transmitter path to improve the power linearity. Therefore, the higher
drain breakdown voltage of asymmetric-LDD MOS transistor is used for the transmitter path. In this circuit, TX node is biased at 3.5V more than 1.8V in conventional MOS transistor. It can increase voltage swing, therefore improving the power-handling capability of T/R switch. Besides, the transistors M4、M5、M7 use the body-floating technique. The body-floating technique is to keep the parasitic diodes from being forward bias under large input signals, hence, improving the linearity and power-handling capability of CMOS T/R switch. In shunt path of TX port, the transistor M6 series with M5 and Cbypass. In series path, utilize stacked transistor configuration to improve the power-handling capability. But it will also make the insertion loss increasing on the transistor-on mode.
drain breakdown voltage of asymmetric-LDD MOS transistor is used for the transmitter path. In this circuit, TX node is biased at 3.5V more than 1.8V in conventional MOS transistor. It can increase voltage swing, therefore improving the power-handling capability of T/R switch. Besides, the transistors M4、M5、M7 use the body-floating technique. The body-floating technique is to keep the parasitic diodes from being forward bias under large input signals, hence, improving the linearity and power-handling capability of CMOS T/R switch. In shunt path of TX port, the transistor M6 series with M5 and Cbypass. In series path, utilize stacked transistor configuration to improve the power-handling capability. But it will also make the insertion loss increasing on the transistor-on mode.