In RF circuit design, PA is the most power-required building blocks. Large supply voltage is necessary condition for practical application. CMOS PA design will face the
great impact and hard to survive in advance technology implementation with low supply voltage.
The RF power performance of Si MOSFET has little improvement with down-scaling, which is limited by the inherent low breakdown voltage. This is especially important for RF PA, where the voltage swing is about twice of DC bias voltage. This restriction decreases maximum output power, power density and power-added-efficiency (PAE) to a high degree.
To address this problem, we have previously reported an asymmetric-lightly-doped-drain (LDD) MOS transistor for high frequency RF power application. This new asymmetric-LDD MOS transistor is fully embedded in the conventional foundry logic process with only one additional mask but without extra process step. The source-drain breakdown voltage can be improved as twice as conventional transistor with still high unity current gain cut-off frequency.
In this work we further implemented the asymmetric-LDD MOS transistor for a power amplifier. The output power improves monotonically with increasing operation voltage. This power cell has high breakdown voltage and fully embedded to standard CMOS technology, so I make one step further to realize the power amplifier and prove it works with good performance.
Chapter 2
Concept of Power Amplifier 2.1 Smith Chart
Smith Chart [Fig. 2.1] is a very useful tool for some problems in radio frequency.
The Smith Chart can be used to represent some parameters including reflection coefficient, impedance, admittance, S-parameter. It also can plot some circles for constant gain contours or noise figure.
The Smith Chart is the voltage reflection coefficient in polar form. The reflection coefficient Γ for transmission line can represent as below
where ZL is the load, Z0 is the characteristic impedance, and zL is the normalized
impedance ( ⎟
If we decompose equation (2-1) and (2-2) to real part and imaginary part as
Γ=Γr +jΓi (2-3) zL =rL+jxL (2-4)
and equation (2-2) can rewrite as
( )
Rearrange the above equation, we can obtain
We use the center of a circle and the radius from equation (2-6). Then we can draw the constant-resistance circles, shown in Fig. 2.2. And we also can draw the
constant-reactance circles from equation (2-7), shown in Fig. 2.3.
Fig. 2.2 constant-resistance circles Fig. 2.3 constant-reactance circles
If combine Fig. 2.2 and Fig. 2.3, we can get the Smith Chart.
2.2 Parameter definitions
2.2.1 S-parameter
For low frequency, we can use Z-parameters or Y-parameters to represent circuits.
But for high frequency, we require S-parameters due to difficulty of open-circuit and short-circuit conditions in measurement. S-parameters are defined by incident waves and reflected waves. For a two-port network, shown in Fig. 2.4, we define the incident wave and the reflected wave for port 1 are a1 and b1. And we define the incident wave and the reflected wave for port 2 are a2 and b2.
Fig. 2.4 Two-port network
Then we can express the matrix as below.
⎥⎦
The equation can be written as
b1 =S11a1+S12a2 (2-8) b2 =S21a1+S22a2 (2-9) From equation (2-8) and (2-9), we obtain
The meanings of S-parameters are
S11：The reflection coefficient of port 1, when port 2 is matching.
S21：The transmission coefficient from port 1 to port 2, when port 2 is matching.
S12：The transmission coefficient from port 2 to port 1, when port 1 is matching.
S22：The reflection coefficient of port 2, when port 1 is matching.
2.2.2 Stability
When designing amplifiers, stability is always a concern. Amplifiers can be
unstable with certain load and source impedances. We can define some parameters for two-port network [Fig. 2.5].
Fig. 2.5 Two-port network stability parameters
For a two-port network, it is potentially unstable when any port has a negative resistance. It represents Γin >1 or Γout >1.
The unconditionally stable is
ΓS <1 (2-14)
From equation (2-14) ~ (2-17), we can get another form
1 where K is stability factor. In general, we use equation (2-18) and (2-19) to determine that the circuit is stable or not.
In addition, we can use stability circle to determine the stable region. The stability circle can draw on Smith Chart directly. The output plane is called ΓL-plane, and the input plane is called ΓS-plane. For ΓL-plane, first, we find the |Γin|=1 circle on Smith Chart. Second, note the region for |Γin|>1 and |Γin|<1. Finally, we can get the stable region (|Γin|<1) on Smith Chart, shown in Fig. 2.6.
Fig. 2.6 The stable region for ΓL-plane (a) |S11|<1 (b) |S11|>1
The ΓS-plane is the same method for |Γout|=1, shown in Fig. 2.7.
Fig. 2.7 The stable region for ΓS-plane (a) |S22|<1 (b) |S22|>1
For output stability circle (ΓL-plane), the radius and the center of circle is
2 2
For input stability circle (ΓS-plane), the radius and the center of circle is
2 2
2.2.3 Power gain
Several power gain equations are used in the design of amplifiers. There are signal flow graph and different powers used in gain equations, shown in Fig. 2.8. The transducer power gain GT, the operating power gain GP, and the available power gain GA are defined as follow.
Fig. 2.8 Different power definitions
The definition of transducer power gain GT is
The definition of operating power gain GP is
network
The definition of available power gain GA is
source
constant available power gain circle is defined by source reflection coefficient, and the constant operating power gain circle is defined by load reflection coefficient.
There is an example for constant available power gain circles, shown in Fig. 2.9.
Fig. 2.9 Constant available power gain circles
2.2.4 Output power and P1dB
In general, we use the dBm as the unit for power, and the definition is
( )
1(mW) (mW) logP
10 dBm
Pout = ⋅ out (2-27)
For example, 1W is equal to 30dBm. The equation for output power can be written as Pout
(
dBm)
=Pin(
dBm)
+Gain( )
dB (2-28) For ideal case, the gain is the constant, the output power is rising when the input power is rising. But because the non-linear property of active component, the outputpower can not increase infinite. With the increase of the power, the gain will reduce gradually. As input power reaches a certain value, the output power can not increase.
So we define a point, when the gain is one dB less than the ideal gain, the point is called 1-dB Compression Point. And the output power at this moment is called P1dB.
The 1-dB compression point is used to showing the dynamic range of the circuit. The relation between the input power and the output power is shown in Fig. 2.10.
Fig. 2.10 1-dB compression point
2.2.5 Efficiency
For power amplifiers, we can draw a diagram, shown in Fig. 2.11.
Fig. 2.11 A power amplifier diagram
The efficiency is the conversion ratio from dc power to output power. It plays an important role for power amplifiers. For ideal case, we hope the dc power transform to output power completely. But actuality, it is impossible. There is some power become heat energy. Even if the efficiency is important, we can not increase
unrestrictedly. Because it is trade off between the efficiency and the linearity, we must choose the suitable one.
In general, we define three kinds of efficiency for amplifiers.
The first is Drain Efficiency
( )
ηd :
DC DC
out DC
out
d V I
P P
P
= ⋅
η = (2-29)
The second is Power Added Efficiency
(
ηPAE)
:DC in out
PAE P
P
-= P
η (2-30)
Finally is Total Efficiency
(
ηtotal)
:
For active components, they have the effects of nonlinearity. For distortion, we can divide into two kinds, one is harmonic distortion, and another one is Intermodulation Distortion.
For harmonic distortion, it says, when a signal enter a nonlinear system, the output generally exhibits frequency components that are integer multiples of the input frequency. If the input is x
( )
t =Acosωt, and the output isIn equation (2-34), the term with the input frequency is called the fundamental, and the term with high-order is called the harmonics.
enter a nonlinear system, the output will produce some components which are not harmonics, they are called intermodulation (IM). It arises from multiplication of the two signals when their sum is raised to a power greater than unity. We assume the input is x
( )
t =A1cosω1t+A2cosω2t, and the output is just like equation (2-32).Thus,
( )
t 1(
A1cos 1t A2cos 2t)
2(
A1cos 1t A2cos 2t)
2y =α ω + ω +α ω + ω
+α3
(
A1cosω1t+A2cosω2t)
3 (2-36) Expanding the left side and discarding dc terms and harmonics, we obtain the following intermodulation products:ω =ω1 ±ω2 :α2A1A2cos
(
ω1 +ω2)
t+α2A1A2cos(
ω1-ω2)
t (2-37)and these fundamental components
t because the third-order IM products are of primary interest since they tend to have frequencies that are within the passband, shown in Fig. 2.12.
Fig. 2.12 IM in a nonlinear system
The key point here is that if the difference between ω and 1 ω is small, 2 2ω1-ω2 and 2ω2 -ω1 will be close to ω and 1 ω . 2
IM is a troublesome effect in RF system. If a weak signal accompanied by two strong interferers experiences third-order nonlinearity, then one of the IM products falls in the interest band, corrupting the desired component, showing in Fig. 2.13.
Fig. 2.13 Corruption of a signal due to IM between two interferers
There is a parameter called “third intercept point” (IP3). The parameter is measured
by a two-tone test in which A is chosen to be sufficiently small so that high-order nonlinear terms are negligible and the gain is relatively constant and equal to α1. The fundamentals increase in proportion to A, and the third-order IM products increase in proportion to A3, shown in Fig. 2.14(a). If plotted on a logarithmic scale, the
magnitude of the IM products grows at three times the rate at which the main components increase. And we define the intersection of the two lines that is the IP3.
The horizontal coordinate of the intersection is called the input IP3 (IIP3), and the vertical coordinate is called the output IP3 (OIP3), shown in Fig. 2.14(b).
Fig. 2.14 Growth of output components in an IM test
2.2.7 Adjacent channel power ratio (ACPR)
ACPR is a commonly used figure of merit to evaluate the inter-modulation
performance of RF power amplifiers designed for CDMA wireless communication systems, ACPR is a measure of spectral re-growth, appears in the signal sidebands, and is analogous to IM3/IM5 for an analog RF amplifier.
There offset frequencies and measurement bandwidths vary with system application.
2.2.8 Peak-to-Average Ratio (PAR)
All single or multi-carrier (modulated or un-modulated) have a peak-to-average ratio. The ratio between the peak power (Pp) and the average power (Pa) of a signal is called the peak-to-average ratio, i.e.
( )
dB The peak-to-average ratio ΔPs of an input signal consisting of N carriers, each having a average power Pi is defined asgiven operating bandwidth, it is easy to see that the theoretical maximum
peak-to-average power ratio will be n. Gaussian noise has a peak-to-average ratio of about 9 dB, so very dense multi-carrier systems might require about 6 dB more power
back-off to achieve a similar level of IM distortion compared to a two-carrier signal having the same power.
2.3 Classification of power amplifier
We can determine the class of operation of power amplifiers by the conduction angle, input signal overdrive, and the output load network. The relation between the conduction angle, the input signal over-drive and the power amplifier is shown in Fig.
2.15.
Fig. 2.15 Classification of power amplifier
RF power amplifiers are commonly designated as classes A, B, C, D, E, and F. All
but class A employ various nonlinear, switching, and wave-shaping techniques.
Classes of operation differ not in only the method of operation and efficiency, but also
in their power output capability. The power output capability or called transistor
utilization factor is defined as output power per transistor normalized for peak drain
voltage and current of 1 V and 1 A, respectively.
2.3.1 Class A, B, AB, and C
In class A power amplifier, it is biased so that the output current flows at all the time, and the input signal drive level is kept small enough to avoid driving the
transistor in cut-off. Or we can say that the conduction angle of the transistor is 360°, meaning that the transistor conducts for the full cycle of the input signal.
When the amplifier in class A, it is inherently linear, hence increasing the quiescent current or decreasing the input signal level monotonically decreases IMD and
harmonic levels. Since both positive and negative excursions of the drive affect the drain current, it has the highest gain.
The output power is
The voltage VC reaches the maximum value only if the device is off. Typically the efficiency is lower than 40% for linear operation.
The output power capability is
In class B power amplifier, the gate bias is set at the threshold of conduction so that the quiescent drain current is zero. And the conduction angle for the transistor is
approximately 180°. Thus the transistor conducts only half of the time, either on positive or negative half cycle of the input signal.
Fig. 2.17 The waveform of current We can define that
fund max ICQ
Class B amplifiers are more efficient than class A amplifiers.
In class AB power amplifier, it is a compromise between class A and class B in terms of efficiency and linearity. And it is biased typically to a quiescent point, which is in the region between the cutoff point and the class A bias point. In this case, the
transistor will be turn on for more than a half cycle, but less than a full cycle of the input signal. So the conduction angle in class AB is between 180° and 360°, and the efficiency is between 50 % and 78.5 %.
In class C power amplifier, the gate is biased below threshold so that the transistor is on for less than half of a cycle, or the conduction angle is less than 180 degree. The
linearity is lost. The efficiency can achieve toward 100 %, but the output drops down
to zero. A typical compromise is a conduction angle of 150° and an ideal efficiency of
85 %. It is little used in solid-state PA because it requires low drain resistances,
making implementation of parallel-tuned output filters difficult.
The bias condition for various classes of power amplifier on device I-V characteristics
is shown in Fig. 2.18.
Fig. 2.18 The bias condition for various classes of power amplifier
For these classes, transistor works as a transducer and the RF output power is
proportional to the RF input power. And the difference is shown in Table 2.1.
Mode Conduction Efficiency Linearity
Class A 100% Poor Excellent
Class AB 50~100% Between A and B Between A and B
Class B 50% Moderate Moderate
Class C <50% Excellent Poor
Table 2.1 The operation in different mode
The harmonics amplitude is plotted in Fig. 2.19. We can see the odd harmonics be seen to pass through zero at the class B point, but in AB mode, the third harmonic is not negligible.
Fig. 2.19 All components in the current waveform
Then we can plot the efficiency and output power on Fig. 2.20. From this figure the main features of class A, AB, B and C can be determined.
Fig. 2.20 RF power and efficiency with conduction angle
2.3.2 Class D, E, and F
The voltage mode Class D amplifier is defined as a switching circuit that results in the generation of a half-sinusoidal current waveform and a square voltage waveform.
The class D power amplifiers use two or more transistors as switches to generate a square drain-voltage waveform. A series-tuned output filter passes only the
fundamental frequency component to the load, the class D amplifiers suffer from a number of problems that make them difficult to realize, especially at high frequencies.
The output power is
Class E employs a single transistor operated as a switch. The drain voltage
waveform is the result of the sum of the DC and RF currents charging the drain-shunt capacitance. In optimum class E, the drain voltage drops to zero and has zero slope just as the transistor turns on. The result is an ideal efficiency of 100 %, elimination of the losses associated with charging the drain capacitance in class D, reduction of switching losses, and good tolerance of component variation.
The output power is
Class F boosts both efficiency and output by using harmonic resonators in the output network to shape the drain waveforms. The voltage waveform includes one or more odd harmonics and approximates a square wave, while the current includes even
voltage can approximate a half sine wave and the current a square wave.
The output power is
[ ( ) ]
For these classes, transistor operates as a switch. And the ideal efficiency is 100 %.
The waveforms of ideal power amplifiers for class A to F are shown in Fig. 2.21.
Fig. 2.21 Waveforms of ideal power amplifiers
Chapter 3
Asymmetric LDD MOS Power Cell 3.1 Why asymmetric LDD MOS
In recent research, a new asymmetric-lightly-doped-drain (LDD) MOS transistor that is fully embedded in a CMOS logic without any process modification or extra cost. And it can improve the power performance in radio frequency.
Fig. 3.1 Device structure of asymmetric-LDD MOS
The structure of asymmetric-LDD MOS is shown in Fig. 3.1. The major difference to conventional MOS transistor is no n+-LDD region at drain side. The formed depletion region under reverse drain bias can sustain large voltage. It can overcome the low breakdown voltage issue for RF power application.
Fig. 3.2 shows the comparison of drain breakdown voltage for conventional and asymmetric-LDD MOS transistors. We can see that the drain breakdown voltage for conventional MOS transistor is about 3.6 V, and the drain breakdown voltage for asymmetric-LDD MOS transistor is about 7.0 V under the same criteria.
Fig. 3.2 The drain breakdown voltage at Vgs=0 V with 0.23μm gate length
This new structure preserves the high frequency operation of sub-μm MOS
transistors with 34 GHz cutoff frequency (ft), it is close to the 35 GHz of conventional MOS transistor. And the 86 GHz maximum oscillation frequency (fmax) higher than the 76 GHz of conventional MOS transistor.
asymmetric device has larger output power and higher power-added efficiency. The output power is increased by 38 % from 130 to 180 mW/mm at 2.4 GHz, the PAE can be improved by 16 % to conventional device, shown in Fig. 3.3.
Fig. 3.3 Measured RF output power and PAE versus the input power for conventional and asymmetric-LDD MOS transistors at 2.4 GHz.
3.2 Model building
Without n+-LDD region at drain side, the decrease with the gate to drain capacitance and the gate to source capacitance. In addition, the depletion layer become longer, the resistance from gate to drain become larger.
Fig.3.4.
Fig. 3.4 Asymmetric LDD NMOS model (a) The BSIM model of A-LDD NMOS (b) The equivalent circuit of A-LDD NMOS
Chapter 4
Power Amplifier Design 4.1 Circuit design
In this work, the two-stage circuit has been used to realize a power amplifier. The power amplifier separates into drive stage and power stage. And the drive stage and the power stage operate in class A. The simplified schematic of the circuit is shown in Fig. 4.1.
Fig. 4.1 Schematic of the two stage amplifier circuit
For the power efficiency issue, we use the ratio of size for power stage and driver
MOS transistor has been used in PA design. The unit cell of asymmetric-LDD MOS transistor designed in this work has 0.18 μm gate-length, 5 μm width, and 10 gate fingers. And asymmetric-LDD MOS transistors have been implemented by foundry standard 0.18μm 1P6M process with only one additional mask but without process modification.
4.2 Design flow
For the design of power amplifier, there are some points that must be considered.
Such as supply voltage, frequency range, s-parameters, stability, gain, output power, input power levels, linearity and efficiency. So the first step of design, we have to determine the goal. Then use some methods to reach the goal. When the goal is determined, we choose the operating type and the bias point. Then we use the ideal lumped elements to design the input, internal, and the output matching network with some adjustment. After this, we replace the ideal lumped elements with TSMC model.
The design procedure of the amplifier has been carried out through the iteration of
The design procedure of the amplifier has been carried out through the iteration of