The first part of thesis is organized as follows. The fabrication process, physical mod-eling and numerical methods, analyzing technique for studying the random dopants ef-fect in nanoscale device and circuit are given in Chap. 2. In Chap. 3, we examine the discrete-dopant-induced characteristic fluctuations in the 16-nm MOSFET devices and cir-cuits. Then, the suppression techniques for discrete-dopant-induced fluctuations are pro-posed and discussed in Chap. 4.
As for the second part, the genetic algorithm and the implemented simulation-based op-timization method are introduced in Chap. 5. In Chap. 6, the explored ASG driver circuits are optimized and discussed. In Chap. 7, the fabricated and measured results are shown to validate our theoretical results. Finally, conclusions and suggested future work of the thesis are drawn in Chap. 8.
15
PART A
Suppression of 16-nm MOSFET
Characteristic Fluctuation
16
Chapter 2
Simulation and Fabrication
I
n this chapter, a large-scale statistically sound “atomistic” device-circuit coupled sim-ulation approach is proposed to characterize the random-dopant-induced characteris-tic fluctuations when the gate length of MOSFET integrated circuits is down to 16 nm concurrently capturing the discrete-dopant-number- and discrete-dopant-position-induced fluctuations. We experimentally quantified the random dopant fluctuation (RDF) induced threshold voltage (Vth) standard deviation up to 40 mV for sub-20-nm-gate planar metal-oxide-semiconductor field effect transistors. The accuracy of the simulation technique is confirmed by the use of experimentally calibrated transistor physical model.17
2.1 Manufacturing Process
The standard MOSFET process flow at National Nano Device Laboratories (NDL) could be summarized as follows:
1. Active area patterning;
2. Shallow trench isolation (STI) formation (chemical-mechanical polishing (CMP));
3. Narrow width device trimmed down upon STI etching;
4. P/N-well implant;
5. Gate oxide and poly gate patterning (I-line ready, deep-UV under planning);
6. Re-oxidation;
7. N/P halo and lightly doped drain shallow junction;
8. SiN MSW;
9. N+/P+ source/drain;
10. Spike rapid thermal anneal (RTA);
11. Low-temperature annealing NiSi;
12. Strained SiN contact etch stop layer (CESL) and interlayer dielectric (ILD);
13. Contact patterning (I-line ready, deep-UV under planning);
14. Ti/TiN/AlCuSi/TiN deposition;
15. M1 patterning;
16. Interlayer dielectric deposition and chemical-mechanical polishing (CMP);
2.1 : Manufacturing Process 19
17. Via patterning;
18. Ti/TiN/AlCuSi/TiN deposition; and 19. Sintering.
The entire process flow for planar MOSFET contains about 150 steps, which may take 3 to 4 months. Fig. 2.1 illustrates several key process steps for planar MOSFET. The process is started from active area patterning. After shallow-trench isolation (STI) formation, the device width is trimmed down upon STI etching. Channel doping is performed to adjust threshold voltage (Vth) of transistor, using masked ion implantation. To relieve the etch damage; a sacrificial oxide is removed before gate oxidation. Thermal oxide is grown and in-situ heavily doped N+ poly-silicon is deposited. After the deposition and trimmed down of gate hard mask, the pocket implantation technique is used for the suppression of the short channel effect. Composite spacer of silicon oxide and nitride are deposited and etched anisotropically. After the gate and spacer formation, heavily doped N+ junction is made with Arsenic implantation. Low-thermalbudget activation process is used for dopant activation and control of doping profile. After inter-layer-dielectric deposition, tungsten is used for metal contact plugging and copper is used for interconnection. Finally, alloying anneal is performed. We notice that the narrow width device trimmed down upon STI etching and low-thermal-budget activation process are the critical steps in fabrication of sub-20 nm transistor [67].
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Figure 2.1: Illustrations of planar MOSFET flow in National Nano
Device Laboratories (NDL). The process flow consists of 150 steps for planar devices.
2.2 : Physical Modeling and Numerical Methods 21
2.2 Physical Modeling and Numerical Methods
The technology computer-aided design (TCAD) simulations, such as process and device simulations, are widely used for the analysis of semiconductor devices. The process sim-ulation can generate the device geometry and doping profile according to the parameters of the fabrication processes. The output of process simulation is then used in the device simulation to estimate device characteristics. The drift-diffusion (DD) and hydrodynamic (HD) models play a crucial role in the development of semiconductor device simulator in the macroscopic point of view. The DD model was derived from Maxwell’s equation as well as charges’ conservation law and has been successfully applied to study device trans-port behavior, in the past decades. It assumes local isothermal conditions and is still widely employed in semiconductor device design.
Classical drift-diffusion model consists of at least three coupled partial differential equa-tions (PDEs), such as electrostatic potential and electron-hole densities. When device chan-nel is specified, a set of the DD equations in semiconductor device simulation is solved:
φ = q
εs(n − p + D), (2.1)
1
q ·Jn = R(n, p), (2.2)
and
1
q ·Jp = −R(n, p), (2.3)
where φ is the electrostatic potential and its unit is volt. n and p are classical electron and hole concentrations (cm−3). q is the elementary charge and its unit is coulomb. The net doping concentration is D(x, y, z) = ND+(x, y, z)−NA−(x, y, z). R is the net recombination rate (cm−3s−1). The carrier’s currents densities are given by
Jn= −qμnn φ + qDn n, (2.4)
and
Jp = −qμpp φ − qDp p, (2.5)
where μnand μp are the carrier mobility (cm2/V − s). The diffusion coefficients, Dnand Dp(cm2/s), satisfy the Einstein relation.
According to Mathiessen’s rule [29-31], the mobility models used in the device sim-ulation can be expressed as:
1
μ = D
μsurf aps + D
μsurf rs + 1
μbulk, (2.6)
where D= exp (x/lcrit), x is the distance from the interface and lcritis a fitting parameter.
The mobility consists of three parts: (1) the surface contribution due to acoustic phonon scattering, μsurf aps = BE +EC(N1/3(T/Ti/N00))τK, where Ni = NA+ ND, T0= 300 K,E is the trans-verse electric field normal to the interface of semiconductor and insulator, B and C are parameters which based on physically derived quantities, N0 and τ are fitting parameters,
2.2 : Physical Modeling and Numerical Methods 23
T is lattice temperature, and K is the temperature dependence of the probability of sur-face phonon scattering; (2) the contribution attributed to sursur-face roughness scattering is μsurf rs = ((E/Eδref)Ξ + Eη3)−1, whereΞ = A + α·(n+p)N(Ni+N1)refvv , Eref = 1 V/cm is a reference electric field to ensure a unitless numerator in μsurf rs, Nref = 1 cm−3 is a reference dop-ing concentration to cancel the unit of the term raised to the power v in the denominator of Ξ, δ is a constant that depends on the details of the technology, such as oxide growth conditions, N1 = 1 cm−3, A, α, and η are fitting parameters; (3) and the bulk mobility is μbulk = μL(TT0)−ξ, where μLis the mobility due to bulk phonon scattering and ξ is a fitting parameter.
The quantum mechanical effects should be considered in the device simulation when the dimensions of the devices shrunk into nanometer scale. Various theoretical approaches have been presented to study the quantum confinement effects, such as full quantum me-chanical model (e.g. nonequilibrium Green’s function) and quantum corrections to the clas-sical drift-diffusion (DD) or hydrodynamic (HD) transport models. A set of Schrodinger-Poisson (SP) equations have been applied to study the quantum confinement effect in the inversion layers as well as the quantum transport between source and drain, but it is a time consuming task in the TCAD application to realize device characterization. Therefore, various quantum correction models, density gradient (DG) [42-45], Hansch [68], modified local density approximation (MLDA) [69], effective potential (EP) [70-72], and unified
quantum correction Model [73], have been proposed for classical DD or HD transport mod-els. In this investigation, the density-gradient is coupled with the DD model and solved for the quantum mechanical effects. The density-gradient equation can be expressed as,
J n= −qμnn φ + qDn n − qnμn γn, (2.7)
J p = −qμpp φ − qDp p + qpμp γp, (2.8)
where γn and γp are the quantum potentials for electrons and holes: γn = 2bn√2√nn and γp = 2bp√p2√p bn; and bp are density-gradient coefficients for electrons and holes.
bn = 2/(12qm∗n) and bp = 2/(12qm∗p). m∗n and m∗p are effective masses for the elec-trons and holes. is the Planck constant. bnand bp in Eqs. (2.7) and (2.8) are the density gradient coefficient which determines the strength of the gradient effect in the electron and hole gas. The last term in the right hand side of Eqs. (2.7) and (2.8) are referred to as
“quantum diffusion”, which makes the electron continuity equation having a fourth-order partial differential equation. Therefore, such an approach is highly sensitive to noise in the local carrier density, and the methodology is highly important in cases of strong quantiza-tion. To calculate the numerical solution of the multidimensional density-gradient model, firstly we decouple the coupled partial differential equations (PDEs); and approximate each decoupled PDE with the finite volume method over nonuniform mesh. The corresponding system of the nonlinear algebraic equations is then solved with the monotone iteration
2.2 : Physical Modeling and Numerical Methods 25
method. Iteration will be terminated and post-processes will be performed when the speci-fied stopping criteria for inner and outer iteration loops are satisspeci-fied, respectively.
2.3 Simulation Technique
Threshold voltage is one of the key device parameters in the characteristics of nanoscale metal-oxide-semiconductor field effect transistors. This section presents the characteriza-tion technique for intrinsic parameter fluctuacharacteriza-tions consisting of line edge roughness (LER), oxide thickness fluctuation (OTF), random-dopant-fluctuation (RDF), and an emerging fluctuation source: work-function fluctuation (WKF). The characterization approaches are examined with experiment data. Base upon the independent of random variables, the total threshold voltage fluctuation, σVth,totalis expressed as follows [74]:
σ2Vth,total ≈ σ2Vth,RDF + σ2Vth,LER+ σ2Vth,OT F + σ2Vth,W KF, (2.9)
where σVth,RDF, σVth,LER, σVth,OT F, and σVth,W KF are the threshold voltage fluctuations caused by the random-dopant-fluctuation, line edge roughness, oxide thickness fluctuation, and the workfunction fluctuation, respectively. The statistical addition of individual fluc-tuation sources herein, as shown in Equation (2.9), simplifies the variability analysis of nano-devices and circuits, significantly [74]. In addition, the methodology of LER, OTF and WKF has been proposed and LER- ,OTF- and WKF-induced Vth fluctuations are ex-amined in our previous work [74]. However, the result shows that the RDF dominates the Vthfluctuation in NMOSFETs, as disclosed in Fig. 2.2.
Therefore, in this thesis, we focus on the characteristic fluctuations induced by random
2.3 : Simulation Technique 27
dopant and propose suppression technique to mitigate RDF. The nominal channel dop-ing concentration of the control devices is 1.5×1018 cm−3. They have a 16-nm gate, a TiN/HfSiON gate stack of 0.8-nm EOT, and a workfunction of 4.52 eV. Outside the chan-nel, the doping concentrations in the source/drain and background are 1.0×1020cm−3and 1.0×1015cm−3, respectively. For the channel region, to consider the effect of random fluc-tuation of the number and location of discrete channel dopants, 1327 dopants are firstly randomly generated in a large cube (96 nm)3, in which the equivalent doping concentration is 1.5×1018cm−3, as shown in Fig. 2.3(a). The (96 nm)3 cube is then partitioned into 216 sub cubes of 16 nm3. The number of dopants may vary from zero to 14, and the average number is six, as shown in Figs. 2.3(b) and 2.3(c), respectively. In principle, 3D device simulation with the 216 channel structures almost covers cases, shown in Fig. 2.4, and thus will be fairly meaningful to reflect statistical randomness of dopant number. We have no-ticed that in this simulation only dopant within the channel region is treated discretely. The doping concentrations remain continuous in the source/drain region because the volume of source/drain region is two-order magnitude greater than that of channel region. These sub-cubes are equivalently mapped into the device channel for the 3D “atomistic” device simulation with discrete dopants, as shown in Fig. 2.5(a). In “atomistic” device simulation, the resolution of individual charges within a classical drift-diffusion simulation using a fine mesh creates problems associated with singularities in the Coulomb potential [75-77]. The
potential becomes too steep with fine mesh, and therefore, the majority carriers are un-physically trapped by ionized impurities, and the mobile carrier density is reduced [75-77].
Thus, the density-gradient approximation is used to handle discrete charges by properly in-troducing related quantum-mechanical effects, and coupled with Poisson equation as well as electron-hole current continuity equations [42-44,78-82].
Without loss of generality, the dual material gate (DMG) and inverse dual material gate (inDMG) are with 16-nm-gate and 1.5×1018 cm−3 equivalent channel doping concentra-tion. The estimated device with dual material gate has two types, DMG and inverse DMG, as shown in Figs. 2.5(b) and 2.5(c). For DMG device, the workfunction (WK) at the source and drain sides are WK1 and WK2, respectively, and WK1 > WK2. The inverse DMG device are designed accordingly, and WK1 < WK2. The gate materials could be MoN, TiN, and Ta, whose distributions of grain orientation and work-function are summarized in Fig. 2.5(d) [10].
As for the generation of lateral asymmetry doping, the adapted drain-end and near-source-end channel doping profile are shown in Figs. 2.6(a) and 2.6(b). Only half of the channel is doped and 1327 dopants are randomly generated in a large rectangular solid (gate width, source-drain direction, channel depth: 48 nm× 96 nm × 96 nm). Therefore, effective channel doping concentration is still 1.5×1018cm−3. Then the large cube is par-titioned into 216 sub-cubes ((8 nm)× (16 nm) × (16 nm)) and mapped into drain-end of
2.3 : Simulation Technique 29
channel region for discrete dopant simulation. Similarly, the dopants in sub-cubes may vary from zero to 14 (the average number is six) within its sub-cubes, as shown in Figs. 2.7 and 2.8. To estimate the device characteristics on the same basis, the threshold voltage for all devices are calibrated to 250 mV according to ITRS roadmap 2007 [2] for low-operating-power application.
In estimating current mismatch of current mirror circuit, dynamic characteristics of common source amplifier, ultra-small nanoscale devices, and for capturing the discrete-dopant-position-induced fluctuations, a device-circuit coupled simulation approach [33] is employed. The nodal voltage and loop current in the circuit can be calculated. The for-mulation of circuit equations is mainly base upon the Kirchhoff’s current law. The circuit nodal equation of current mirror, as illustrated in Fig. 2.9, is shown in below:
Node1 : V1= VDD, (2.10)
Node2 : V2= VDD−IREFRREF, (2.11)
Node3 : V3= 0, (2.12)
Node4 : V4= VDD−IOUTRL, (2.13)
and
Node1 : V5= VDD. (2.14)
The current mismatch of current mirror circuit and dynamic characteristics of common source amplifier is then estimated. Similarly, the circuit nodal equation of common source amplifier, as displayed in Fig. 2.10(b), is shown in below:
Node1 : V1= Vin, (2.15)
Node2 : V2= VDD, (2.16)
Node3 : V3= VDD−IDR1, (2.17)
Node4 :V4
R2+CdV4
dt = ID, (2.18)
and
Node5 : V5= 0. (2.19)
The operation bias of common-source circuit is VIN = 0.5V with sinusoid input wave, as shown in Fig. 2.10(a), which is used as a tested circuit to explore the fluctuation of dynamic characteristics. The time-domain simulation results are simultaneously used for the calcula-tion of the property of the frequency response, where the frequency is swept from 1×108Hz to 1×1013 Hz. The common-source amplifier circuit with control devices is first explored to illustrate the details of random-dopant-fluctuation in high-frequency integrated circuits.
Thus, all device and circuit characteristics are obtained without any devices’ equivalent
2.3 : Simulation Technique 31
circuit models. The flowchart for mix-mode simulation method is shown in Fig. 2.11. The characteristics of devices of tested circuit are first estimated by solving the device trans-port equations and using as initial guesses in the device-circuit coupled simulation. The circuit nodal equations of the test circuit are formulated and then directly coupled to the device transport equations (in the form of a large matrix containing the circuit and device equations), which are solved simultaneously to obtain the circuit characteristics [33]. The flowchart of decoupled PDE is shown in Fig. 2.12. First we solve the nonlinear Poisson equation until it is convergence, and then the current continuity equations of electron and hole are following solved. If the error is less than the tolerance, the program stops and out-put the initial solution of device’s potential and perform the mixed-mode simulation. We solve the device’s equations coupled with circuit nodal equations until it is convergence.
Figure 2.13 shows the flow for solving decoupled PDE. First, the simulation domain has to be discretized. Applying the finite element approximation to the decoupled PDE, we ob-tained the nonlinear algebraic equations corresponding to the discretized grid. The Newton linearization method is then used to linearize the nonlinear equations. Finally, the linear algebraic equations can be solved using either direct or iterative method.
Figure 2.2: The RDF-, LER-, WKF-, OTF-induced Vthfluctuation forNMOS devices, where the total σVthis calculated with Eq.
2.9.
2.3 : Simulation Technique 33 Figure 2.3: (a) Discrete dopants randomly distributed in the (96 nm)3
cube with the average concentration of 1.5×1018cm−3. There will be 1327 dopants within the cube, but dopants may vary from 0 to 14 ( the average number is 6 ) within its 216 sub cubes of 16 nm× 16 nm × 16 nm ((b) and (c)).
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Figure 2.4: The histogram of the dopants in 216 sub cubes for 16 nm
devices. The dopants number can be describe by Gaussian Distribution with a mean of six.
2.3 : Simulation Technique 35
Figure 2.5: The sub-cubes are equivalently mapped into channel region for discrete dopant simulation as shown in MOSFET (a) control, (b) DMG, and (c) inverse DMG devices,
respectively. (d) The properties of metal material used in this study.
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Figure 2.6: The sub-cubes are equivalently mapped into channel region for discrete dopant simulation as shown in MOSFET (b) conventional lateral asymmetric channel (LAC) and (b) inverse LAC devices, respectively.
2.3 : Simulation Technique 37
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Figure 2.7: The histogram of the dopants in 216 sub cubes (16 nm× 16
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2.3 : Simulation Technique 39
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exploring the variation sources induced current (IREF/IOUT) mismatch.
Figure 2.10: (a) The common-source circuit is used as a tested circuit to explore the fluctuation of high-frequency characteristics.
(b) The input signal is a sinusoid input wave with 0.5 V offset. The frequency is swept from 1×108Hz to 1×1013 Hz [33].
2.3 : Simulation Technique 41
Figure 2.11: The flowchart for the mixed-mode device circuit coupling
simulation. The devices simulation is performed first and get the initial solution of the devices potential. The mixed-mode simulation is then executed until the final step [83].
Figure 2.12: A flowchart of the decoupling algorithm. First we solve
the nonlinear Poisson equation until it is convergence, and then the current continuity equation of electron and hole is following solved. If the error is less than the tolerance, the program stops.
2.3 : Simulation Technique 43
Figure 2.13: A flowchart for solving decoupled PDE. First the
simulation domain have to be discretized. Applying the finite element method approximation to the decoupled PDE, we obtained the nonlinear algebraic equations corresponding to the discretized grid. The Newton linearization method is then used to linearized the nonlinear equations. Finally, the linear algebraic equationscan be solved using either direct or iterative method [84].
2.4 Summary of this Chapter
In this chapter, we have presented a standard MOSFET fabrication process and physical model of device simulation. The characterization approach for random dopants fluctua-tion which dominates the Vth fluctuation in NMOSFETs was then introduced. Based on the large-scale statistical approach, the fluctuation of explored transistors, such as control, LAC, inLAC, DMG and inDMG devices could be calculated by solving the device transport equations. The accuracy of control device has been confirmed by experimentally measured data for ensuring the best accuracy.