1 Introduction
1.5 Overview of Dissertation
The remaining chapters in this dissertation provide further analysis and implementation details of the proposed techniques. An overview of the dissertation is as follows.
In Chapter 2, we first provide architecture of the receiver. Then the design challenges and specifications are discussed and addressed.
In Chapters 3, we provide architecture and specifications of the transmitter.
Chapter 4 focuses on design details and circuit implementation of the receiver.
Chapter 5 focuses on design details and circuit implementation of the transmitter.
In Chapter 6, measured results of the receiver are demonstrated.
In Chapter 7, measured results of the transmitter are demonstrated. Measured error vector magnitude (EVM) of WiMedia Mode 1 shows good linearity and modulation accuracy of the transmitter.
Finally, Chapter 8 concludes this dissertation and suggests some future research directions.
Chapter 2
Architecture and Specifications of Receiver
Figure 2-1 shows a direct-conversion RF receiver (DCR) for UWB. The receiver includes an RF front-end (a low noise amplifier, a 3th-order notch filter and a down-conversion mixer) and an analog baseband (PGAs and LPFs). The MB-OFDM UWB signal is amplified and down-converted to the baseband with a bandwidth of 250 MHz. The strong out-of-band interferer is down-converted as well. To avoid saturating the analog-to-digital converter (ADC) due to the interferer, the baseband is required to pass signals and suppress interferers. As compared to narrowband systems, design challenge of the UWB receiver lies in high linearity and wide bandwidth to handle both signals and interferers.
Figure 2-1: Architecture of a direct-conversion RF receiver for UWB.
The performance of the UWB band group1 (3168~4752 MHz) may be degraded by strong interferences which are signals of 802.11a WLAN system that occupies
frequency bands of 5.15~5.25, 5.47~5.725, and 5.725~5.875 GHz. In Figure 2-2, if the interferences are at 5.85 and 5.25 GHz, third-order inter-modulation (IM3) will be generated at 4.5GHz and saturate in-band desired signal and also desensitize the linearity. So the notch filter applied for the LNA is needed to reduce the interferences at 5~6 GHz [17] [18]. There are several advantages and trade-offs between each notch filter topology. Since the parasitic resistance of passive filter could not be canceled, the Q- factor is worse than that of active notch filter. Second-order active topology has better quality value, but some amount of wanted signal might be lost due to existing of only one zero. Third-order active notch filter provides not only one zero but also one pole that reduces the loss of gain of wanted signal [19]. Due to wide frequency range of interferences, the notch filter must have frequency tuning and gm tuning functions.
If the interference could not be reduced enough, the gm tuning function can be turned on to solve this problem. In this design, a wideband differential LNA with integrated 3th-order notch filter for interference rejection is designed.
Linearity restriction of the UWB RF receiver is at the output of the down-conversion mixer (input of the analog baseband). Large signal swing at the mixer output generates harmonics due to non-linearity of MOS transistors in the switching cells of the mixer and the input stage of the analog baseband. One way to reduce the signal swing without degrading SNR is to translate signals from the voltage domain to the current domain. To do so, a voltage-mode OP Amp can be configured as resistance feedback, forming low input impedance at the input of analog baseband. In addition, a capacitor can be parallel-connected with the feedback resistor to form a first-order low-pass filter to suppress out-of-band interferers. This method has already adopted in narrowband receiver design to achieve high linearity under a low supply voltage [20]. In this work, we further extend the method to a wideband RF
receiver, such as a UWB RF receiver. First of all, it requires realizing low input impedance over the entire wide bandwidth. Second, we need current-mode filters.
Wideband current-mode circuits have been developed for applications of optical wireline communications. Some design techniques can be borrowed here. For example, the active feedback technique helps reduce input impedance of the amplifiers. Also filters constructed by current-domain circuits have been developed.
Owing to WLAN 802.11a strong interferers are only 700 MHz away from MB-OFDM UWB 4.5 GHz channel, single-pole filter provides insufficient roll-off at 700MHz away. The Sallen-Key filter has been applied to deeply filter specific harmonics in some applications [21]. In this work, we realize a Sallen-Key filter constructed by current-domain circuits to filter the strong interferers in current domain efficiently.
Here, the reference specifications of the analog baseband are addressed following to the receiver conformance requirement. The entire receiver must meet the required sensitivity and signal-to-noise radio (SNR) of -80.8 dBm and 9.3 dB, respectively, under the data rate of 53.3 Mb/s with the longest transmission distance of 10 m which leads to the most strict sensitivity requirement to the receiver [2]. The maximum received signal strength is -10 dBm. Hence, the dynamic range of the RF receiver is 70.8 dB. 10 dB of the required dynamic range is contributed by RF front-end, the remainder is taken into account in the analog baseband. Owing to the full-scale of a UWB ADC is -14 dBV (200 mVp), the required maximum voltage gain of the RF receiver is 67.8 dB to amplify signals from the sensitivity level to the ADC full-scale with a back-off of the MB-OFDM UWB signal peak-average radio (PAR) as 9 dB.
Given that the RF front-end voltage gain is fixed at 15 dB, the analog baseband shall provide the maximum voltage gain of 52.8 dB. The required sensitivity translates to the required receiver noise figure (NF) as 6.6 dB. Assume the RF front-end NF is a
nominal value of 4 dB. Consequently the required noise figure of the analog baseband is less than 14 dB.
Linearity requirement for the RF receiver is constrained by the worst case that strong out-of-band interferers at the 5 GHz band (WLAN 802.11a) cause serious SNR degradation to the 4.5 GHz-channel as shown in Figure 2-2 [22]. The test case defines two interferers allocated at 5.2 GHz and 5.85 GHz with the power level of -4 dBm.
The required sensitivity is -75 dBm and the required SNR remains 9.3 dB [23].
Assume the pre-filter in front of the RF receiver provides 25 dB attenuation for out-of-band interferers. The required input-referred third-order intercept point (IIP3) of the RF receiver is -1 dBm. In order to relax linearity requirement of the analog baseband, assume a notch filter is designed with LNA and provides 20 dB attenuation for out-of-band interferers. Therefore, the required out-of-band IIP3 of the analog baseband shall be over -8 dBV at the maximum gain setting. The interferers at 5.2 GHz and 5.85 GHz also could cause second-order inter-modulation distortion. To avoid degradation of SNR, the required IIP2 of the analog baseband should be better than -5 dBV as 10 dB attenuation of interferers is provided by the first stage of the analog baseband. According to the calculated specifications, Table I summarizes the receiver requirements to comply MB-OFDM UWB performance.
Frequency 802.11a WLAN
4.75G Band group1
5.2~
5.4 G IM3 of
interferences
5.7~
5.9 G 3.1G Band1 Band2 Band3
degradation at 4.5GHz channel.
TABLE I. Specifications of receiver Overall receiver
Sensitivity -80.8 dBm
SNR 9.3 dB
Dynamic range 70.8 dB
Full-scale of a UWB ADC -14 dBV
Maximum gain 67.8 dB
Attenuation of Pre-filter 25 dB
IIP3 -1 dBm
Noise figure 6.6 dB
RF front-end
Gain 15 dB
Attenuation of Notch Filter 20 dB
Noise figure 4 dB
Analog baseband
Bandwidth 250 MHz
Gain Range 61 dB
Maximum gain 53 dB
Gain control resolution 1 dB
Noise Figure 14 dB
Out-of-band IIP3 -8 dBV
Out-of-band IIP2 -5 dBV
Chapter 3
Architecture and Specifications of Transmitter
The architecture of the proposed transmitter is as shown in Figure 3-1, which carries out the direct-conversion architecture, including an analog baseband, an IQ modulator, a RF VGA, a D-to-S amplifier and a power amplifier. Moreover, a transmitted signal strength indicator (TSSI) is also integrated. The analog baseband consists of a 5th-order Chebyshev low-pass filter and baseband VGAs. As the baseband signal input, the low-pass filter eliminates the output harmonics from a digital-to-analog converter (DAC). The baseband VGAs provide tunable attenuation from 9dB to 19dB to adjust the signal amplitude to a pre-determined proper level for the IQ modulator. The IQ modulator is designed to modulate baseband signals to RF frequency. A DC-offset cancellation circuit is also integrated for improving the performance of carrier leakage suppression. The RF VGA provides linear-in-dB gain tuning of 14dB. The D-to-S amplifier is designed before the single-ended power amplifier for combining differential signals with an acceptable gain and phase error from 3GHz to 8GHz.
Finally, the power amplifier is designed to boost the RF signals and linearly drive the 50Ω antenna load.
Figure 3-1: Block diagram of the wideband RF transmitter.
In digital baseband, DAC generates modulated signals with a sufficient spurious-free dynamic range (SFDR) to meet the system requirement. Then an RF transmitter performs I + j⋅Q to combine in-phase and quadrature-phase signals from the DAC and up-converts the modulated signals to the RF frequency. But the RF transmitter introduces unwanted effect on the output signals such as carrier leakage, sideband leakage and distortions simultaneously. The signal-to-noise ratio (SNR) is the most important parameter to receiver design. However, the key parameter of transmitter design is the signal-to-spur ratio (SSR). The carrier leakage, sideband leakage and distortions all lead to SSR degradation.
According to the FCC regulation, the output power spectrum density of UWB is limited to -41.3dBm/MHz. The maximum in-band signal power is calculated as
. 10 ) 528 ( 10
/ 3 .
41 dBm Hz + ⋅LOG10 MHz =− dBm
− (3.1) The transmitter output power should be up to -7.5dBm assuming the signal attenuation is 2.5dB due to the transmit/receive (T/R) switch at the transmitter output.
Listed in Table II is the transmitter link budget, which is a tradeoff between SSR and linearity. The input voltage swing to this transmitter, or the output voltage swing from a DAC, is assumed in the range from 125mVp to 375mVp for a flexible DAC interface.
For the optimal linearity performance of the IQ modulator, the input voltage swing at the modulator input is fixed at 44.6mV (-27dBV). It requires gain tuning from -9dB to -19dB in the analog baseband filter. Thus, it is specified a gain tuning range of 10dB with the resolution of 1dB. The RF circuits following the analog baseband provide 9.5dB gain for the maximum output power of -7.5dBm.
Transmitter linearity is constrained by the signal peak-average ratio (PAR) of 9dB, which leads to an instantaneous power increase of 9dB. Therefore, the RF transmitter should have the ability to linearly transmit signals as large as +1.5dBm. Consequently the required OP1dB is +1.5dBm. The carrier leakage emission is also strictly regulated within -41.3dBm. Thus, the required carrier leakage suppression is derived as The leakage is lumped to the effect caused by DC offset. Since the voltage swing at the IQ modulator input is 44.6mV (-27dBV), the input-referred DC-offset of the IQ modulator should be less than 1.21mV (-58.3dBV). This small level requires a DC-offset cancellation circuit. According to the transmit spectrum mask specified by MB-OFDM UWB, the filter in the analog baseband should provide at least out-of-band attenuation of 12dB and 20dB at the frequencies of 285MHz and 330MHz, respectively. The design specification of the MB-OFDM UWB RF transmitter is listed in Table III.
TABLEII.Link budget of transmitter
DAC output swing 125 mVp -to- 375m Vp
(-18 dBV ~ -8.5 dBV)
Gain of analog filter -9 dB ~ -19 dB
Modulator input swing -27 dBV
Gain of RF stages 9.5 dB
Output power of transmitter -7.5 dBm
TABLEIII.Specifications Bandwidth: 250 MHz
Gain: -9 dB~-19 dB Gain resolution: 1 dB
THD: -40 dBc Analog
Baseband
Attenuation: 285MHz: 12 dB 330MHz: 20 dB
RF circuits Gain: 9.5 dB
Pout,max: -7.5 dBm OP1dB: +1.5 dBm Carrier Suppression > 31 dBc Sideband Suppression > 30 dBc Overall Tx
Power control range: 14 dB
Chapter 4
Circuit Design of Receiver
4.1 RF Front-End
4.1.1 Low-Noise Amplifier (LNA)
The schematic of LC ladder LNA is shown in Figure 4-1. Gain switch function is formed by the control bit (Gain_SW) that has 10dB gain difference between high and low gain mode. Band control function is formed by the control bits LG (0~3) that change equivalent capacitance of output load to switch to the desired UWB channel in band group1 (3432, 3960 and 4488 MHz). In order to extend bandwidth at higher frequency band, we shunt switch M5 and large resistor RL with the output loading LC tank. If bandwidth is not enough at higher frequency band (512MHz), M5 can be turned on by switch HF_ON to extend bandwidth, but it must sacrifice a little power gain. The proposed notch filter was connected on the drain of M1 that provided low impedance path for small signal current to ground at interference frequency. The ESD protection circuit was added on the virtual ground position of input matching, so it won’t affect input return loss of the LNA.
M1
Figure 4-1: Schematic of LC ladder LNA core
4.1.2 Input Matching Analysis
Consider two-order low-pass-filter as shown in Figure 4-2(a). Using the low-pass to band-pass transformation, the shunt capacitor and series inductor can be transformed to parallel LC and series LC network respectively. The two corner frequencies of band-pass-filter are w andU w that define the fractional bandwidth (n) as [24]: L
L
Since n>1, the band-pass-filter can be viewed as a low-pass-filter combined with a high-pass-filter. In this case, w is decided byU L ,U C and U w is decided by L L ,L C . L The values of these components can be roughly expressed as:
R
m1⋅ = , the frequency response of input matching network
will be the same with the designed band-pass-filter and generates two resonance frequency to expand S11 for broadband matching.
0
Figure 4-2(a): Transformation from LPF to BPF
T S
(b) Schematic of the LNA input matching network
Figure 4-2(b): Design method analysis for input matching of the LNA core.
4.1.3 Gain analysis
The small signal model of high gain mode is shown in Figure 4-3(a), the voltage gain can be derived by solving the trans-impedance and neglecting effects of output buffer.
Overall voltage gain can be calculated as:
eq
C of the cascode stage (M3 and M4) and capacitor array value which controlled by db
LG (0~3). From equation (4-4), If C decreases, the voltage gain increases and eq desired band will “move” to higher frequency.
When switch to low gain mode as shown in Figure 4-3(b), M2 off and M3 on. If sizes of M2 and M3 are identical, the small signal current that flows into the drain of M1 is equal to that in high gain mode, so input frequency response (S11) will be the same. We choose size ratio of M3 to M4 is 2 : 1, and the current flows from output
load will be 1/3 times of that flows into the drain of M1 (i.e. gm1⋅VGS1 =3⋅gm4⋅VGS4), Figure 4-3: Small signal model analysis for LC ladder LNA.
4.1.4 Third-Order Notch Filter Design
Third-order active notch filter is the best topology to reject interferences due to deep and steep notch at resonance frequency. It needs 2 series inductors for differential LNA and occupies large chip area. The circuit topology of proposed third-order active notch filter is shown in Figure 4-4 that only needs one center-taped parallel inductor to save chip area for differential topology. The input impedance from M1 gate can be derived as:
T network as shown in Figure 4-5. Total equivalent parallel parasitic resistance RP can be expressed as: sizes of transistor M1 and other passive elements satisfy equation (4-7), then Q-factor of this 3-order active filter will be maximize at the interference frequency. As the condition occurs, Z can be expressed as: in
( )
Equation (4.8) generates not only one zero but also one pole. The resonant frequency of pole is
π . Figure 4-6 is the schematic of proposed 3-order active
notch filter. Due to wide interference range (5.15~5.875 GHz), the filter has frequency
tuning function to track different positions of interferences. Zero resonant frequency fint can be varied by CT. Thus, varactor C3,4 and C6 are added to vary equivalent capacitor of Cgs and Cf respectively and controlled by 3-bits control (F_Tune). Since equivalent values of Cgs and Cf are varied, equation (4.7) is difficult to satisfy at fixed trans-conductance of M1 (g ). The switch transistors Pm1 0~P3 provide different current for M1 to changeg to satisfy equation (4.7) and compensate Q-factor of the notch m1 filter. If gain attenuation is not enough at interference frequency, the gm1tuning circuit can be turn on to achieve enough high Q-factor.
Cf Figure 4-4: Proposed 3-order active notch filter (half-circuit)
Lf
Figure 4-5: The equivalent circuit of proposed 3-order active notch filter.
M1
Figure 4-6: Schematic of third-order active notch filter.
4.2 Analog Baseband
As shown in Figure 4-7, a proposed wideband, wide dynamic range baseband chain is composed in the order of three-stage current-mode PGAs, a Gm-C filter, three-stage current-mode PGAs, an I-to-V converter and a voltage buffer. Besides, a digital-assisted DC-offset calibration loop is adopted to eliminate DC-offset of the baseband chain. The current-mode PGA is realized by balanced current-mode amplifiers to provide gain and gain tuning range. The first current-mode PGA also includes a current-mode SK LPF. Placed in the middle of the baseband chain, the Gm-C filter filters out-of-band unwanted signals. The I-to-V converter is used to covert output current-domain signals of the current-mode PGAs to voltage-domain signals.
Finally, a voltage buffer is designed for driving analog-to-digital converter (ADC). Figure 4-7: Block diagram of the wideband, wide dynamic range baseband chain.
In [11], the gain tuning function of the UWB low-pass filter is attained by controlling trans-conductance (gm) in the filter circuits, resulting in less gain, less gain tuning range and poor noise figure performance. In this design, the gain tuning function of the analog baseband is accomplished by the current-mode PGAs. The three-stage current-mode PGAs in front of the Gm-C filter are designed with the gain of 47 dB to suppress Gm-C filter noise. So the analog baseband exhibits much better noise figure performance than that reported in [11]. The three-stage current-mode PGAs follow the Gm-C filter to achieve the required overall gain and dynamic range.
The analog baseband has gain tuning range from -9 dB to 73 dB, which leads to maximum gain of 73 dB and the dynamic range of 82 dB with gain resolution of 0.5 dB. The corner frequency of the baseband chain, determined by the Gm-C filter and adjusted by the capacitors arrays, ranges from 250 MHz to 300 MHz. A Gm-C calibration circuit is also integrated to tune the capacitors arrays against PVT
variation.
4.2.1 Programmable gain Amplifiers (PGAs)
Ideally the current amplifier should have infinite output impedance and zero input impedance for optimal current signal transfer. But in the advance CMOS process, drain-source (Rds) resistance is greatly decreased. Cascode topology for increasing output impedance cannot be easily realized due to the headroom limitation under a low supply voltage. Circuit design effort is therefore on very low input impedance.
PGAs are constructed by the current amplifier in the simple common-gate (CG) configuration, as shown in Figure 4-8(a), exhibiting an input resistance of 1/ gm1. Low input impedance indicates a large-size transistor and high bias current, and in turn,
PGAs are constructed by the current amplifier in the simple common-gate (CG) configuration, as shown in Figure 4-8(a), exhibiting an input resistance of 1/ gm1. Low input impedance indicates a large-size transistor and high bias current, and in turn,