Fig. 26 shows the power conversion efficiency. If the load current is smaller than 30mA, the processor can change the converter to the single-phase operation for high efficiency. The efficiency improvement can be 5%. However, the converter with the dual-phase operation has better efficiency at heavy loads. A peak efficiency of 88 % is derived with the load of 1150 mA. Improved efficiencies are 5% and 10% compared to dual-phase operation without current balance function and single-phase operation, respectively.
Efficiency (%)
Dual-phase operation W/I current balance
Dual-phase operation W/O current balance
5% 5%
10%
Fig. 26. Power conversion efficiency.
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Chapter 5
C ONCLUSION AND F UTURE W ORK
5.1 Conclusion
The proposed PRCB technique for the voltage-mode multiphase DC-DC buck converter is presented with single controller to achieve the area-efficient solution. The pseudo-ramp operation can use only one physical saw-tooth to generate two individual control duties for the dual-phase operation. In addition, the current balance mechanism also forms a current-loop, which can dynamically adjust each of duty cycles, to ensure the identical driving capability in the multiphase structure. Moreover, the mode transition operation is activated when the point of duty cycle determination is around 50 % so as to prevent the unwilling mode transitions and help enhance the load transient response. Experimental results demonstrate the different mode operation with the distinct duty cycles. The current in each phase is well balanced under both light load and heavy load conditions with an improvement of 83 % in current balance.
41
5.2 Future Work
This thesis proposes a pseudo-ramp current balance technique to achieve single controller for multiphase operation in voltage-mode DC-DC buck converter. In this work, the operation of dual-phase is unchangeable under light load and heavy load conditions. To get the best efficiency solution under different load current, the number of the operating phase should be decided by the controller. For instance, while the load current is light, only one phase is used. On the other hand, when the load current is large, more phases should be used to cope with. Furthermore, since the current balance tends to slow down the load transient response for accurate current balance, how to improve the transient response with proper current balance performance is good topic of research.
42
R EFERENCES
[1] Yung-Hsin Lin, Kuo-Lin Zheng, and Ke-Horng Chen, “Power MOSFET Array for Smooth Pole Tracking in LDO Regulator Compensation,” in Proc. IEEE Midwest Symp.
Circuits and Systems (MWSCAS), pp. 554-557, 2007.
[2] Huan-JenYang, Han-Hsiang Huang, Chi-Lin Chen, Ming-Hsin Huang, and Ke-Horng Chen, “Current Feedback Compensation (CFC) Technique for Adaptively Adjusting the Phase Margin in Capacitor-Free LDO Regulators,” in Proc. IEEE Midwest Symp.
Circuits and Systems (MWSCAS), pp, 5-8, 2008.
[3] Chia-Hsiang Lin, Ke-Horng Chen, and Hong-Wei Huang, “Low-Dropout Regulators with Adaptive Reference Control and Dynamic Push-Pull Techniques for Enhancing Transient Performance,” IEEE Trans. Power Electron, vol. 24,no. 4, pp. 1016-1022, Apr. 2009
[4] M. Al-Shyoukh, H. Lee, and R. Perez, “A transient-enhanced low-quiescent current low-dropout regulator with buffer impedance attenuation,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1732-1742, Aug. 2007.
[5] P. Favrat, P. Deval and M. J. Declercq, ”A high-efficiency CMOS voltage doubler,”
IEEE J. Solid-State Circuits, vol. 33, no. 3, pp. 410-416, Mar. 1998.
[6] Starzyk, J.A, Ying-Wei Jan and Fengjing Qiu, “A DC-DC charge pump design based on voltage doublers,” IEEE Trans. Circuits Syst-I, Fundamental theory and Applications, vol. 48, no. 3, pp. 350-359, Mar. 2001.
[7] Chun-Yu Hsieh, Po-Chin Fan and Ke-Horng Chen, “A Dual Phase Charge Pump with Compact Size,” in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp.202-205, 2007.
43
[8] Yean-Kuo Luo, Ke-Horng Chen, and Wei-Chou Hsu, “A Dual-Phase Charge Pump Regulator with Nano-Ampere Switched-Capacitor CMOS Voltage Reference for Achieving Low Output Ripples,” in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 446-449, 2008.
[9] Chi Yat Leung, Philip K.T. Mok, “A 1-V Integrated Current-Mode Boost Converter in Standard 3.3/5-V CMOS Technologies,” IEEE J. Solid-State Circuits, pp. 2265-2274, vol. 40, no. 11, Nov. 2005.
[10] Cheung Fai Lee and Mok, P.K.T, “A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 3-14, Jan. 2004.
[11] Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung and Mansun Chan, “An intergrated CMOS current-sensing circuit for low-voltage current-mode buck regulator” IEEE Trans. Circuits Syst. II, Exp Briefs, vol. 52, no. 7, pp. 394-397, Jul. 2005.
[12] Feng-Fei Ma, Wei-Zen Chen, and Jiin-Chuan Wu, “A monolithic current-mode buck converter with advanced control and protection circuits” IEEE Trans. Power Electron. , vol. 22, no. 5, pp. 1836-1846, Sept. 2007.
[13] Chia-Min Chen, Kai-Hsiu Hsu, and Chung-Chih Hung, “A high efficiency current-mode DC-DC step-down converter with wide range of output current” in Proc.
IEEE Midwest Symp. Circuits and Systems (MWSCAS), pp. 1009-1012, 2010.
[14] Hong-Wei Huang, Ke-Horng Chen, and Sy-Yen Kuo, “Dithering skip modulation, width and dead time controllers in highly efficient DC-DC Converters for System-On-Chip applications,” IEEE J. Solid-State Circuits, vol.42, no. 11, pp.
2451-2465, Nov. 2007.
[15] Wei-Jen Lai, Chi-Lin Chen, Yu-Chiao Hsieh, and Ke-Horng Chen, “High-efficiency slope compensator (HSC) with input-independent load condition identification in
44
current mode DC/DC buck converters” in Proc. IEEE Energy Conversion Congress and Exposition (ECCE), pp. 2897-2900, 2009.
[16] R. G. Carvajal, J. Ramirez-Angulo, A. J. Lopez-Martin, A. Torralba, J. A. G. Galan, A.
Carlosena, and F. M. Chavero, “The flipped voltage follower: a useful cell for low-voltage low-power circuit design,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol.
52, no. 7, pp. 1276-1291, Jul. 2005
[17] I. Doms, P. Merken, C. V. Hoof, and R. P. Mertens, “Capacitive power management circuit for micropower thermoelectric generators with a 1.4μA controller,” IEEE J.
Solid-State Circuits, vol. 44, no. 10, pp. 2824-2833, Oct. 2009.
[18] M. E. Sinangil, N. Verma, and A. P. Chandrakasan, “A reconfigurable 8T ultra-dynamic voltage scalable (U-DVS) SRAM in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol.
44, no. 11, pp. 3163-3173, Nov. 2009.
[19] J. Xiao, A. V. Peterchev, J. Zhang, and S. R. Sanders, “A 4-μA quiescent-current dual-mode digitally controlled buck converter IC for cellular phone applications,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2342–2348, Dec. 2004.
[20] Jin-ho Choi, Dong-young Huh, Young-seok Kim, "The Improved Burst Mode in the Stand-by Operation of Power Supply" IEEE Applied Power Electronics Conference and Exposition, pp. 426-432, 2004.
[21] Kapat, S.; Banerjee, S.; Patra, A, “Voltage Controlled Pulse Skipping Modulation for Efficiency Improvement in Light Load,” IEEE International Symposium on Circuits and Systems, pp. 2649-2652, May. 2009.
[22] Chi-Lin Chen, Wei-Lun Hsieh, Wei-Jen Lai, Ke-Horng Chen and Ching-Sung Wang, "A new PWM/PFM control technique for improving efficiency over wide load range," IEEE International Conference on Electronics, Circuits and Systems, pp. 962-965, Sept. 2008 [23] Jen-Chieh Tsai, Tsung-Ying Huang, Wang-Wei Lai, and Ke-Horng Chen, “Dual
Modulation Technique for High Efficiency in High Switching Buck Converters Over a
45
Wide Load Range,” IEEE International Symposium on Circuits and Systems, pp.
3709-3712, May 2010.
[24] Albert M. Wu, Steven M. Piekiewiez, “Switched converter with variable peak current and variable off-time control,” United States Patent, Pat. No. 7528587, May, 2009.
[25] Chun-Yu Hsieh and Ke-Horng Chen, “Adaptive Pole-Zero Position (APZP) Technique of Regulated Power Supply for Improving SNR,” IEEE Trans. Power Electronics, vol.
23, no. 6, pp. 2949-2963, Nov. 2008.
[26] Pang-Jung Liu, Yu-Kang Lo, Huang-Jen Chiu, and Yi-Jan Emery Chen, “Dual-Current Pump Module for Transient Improvement of Step-Down DC–DC Converters,” IEEE Trans. Power Electronics, vol. 24, no. 4, pp. 985-990, Apr. 2009.
[27] Ravinder Pal Singh, and Ashwin M. Khambadkone, “A Buck-Derived Topology with Improved Step-Down Transient Performance,” IEEE Trans. Power Electronics, vol. 23, no. 6, pp. 2855-2866, Nov. 2008.
[28] H.-W. Huang, H.-H. Ho, C.-C. Chien, K.-H. Chen, G.-K. Ma, and S.-Y. Kuo, “Fast transient DC-DC converter with on-chip compensated error amplifier,” IEEE ESSCIRC, pp. 324–327, 2006.
[29] Shih-Jung Wang, Yu-Huei Lee, Yung-Chih Lai, and Ke-Horng Chen, “Quadratic Differential and Integration Technique in V2 Control Buck Converter with Small ESR Capacitor,” IEEE Custom Intergrated Circuits Conf., pp. 211-214, Sept. 2009.
[30] Yu-Huei Lee, Shih-Jung Wang, and Ke-Horng Chen, “Quadratic Differential and Integration Technique in V2 Control Buck Converter with Small ESR Capacitor,” IEEE Transaction on Power Electronics, pp. 829-838, Apr. 2010.
[31] Josh Wibben and Ramesh Harjani, “A High-Efficiency DC–DC Converter Using 2 nH Integrated Inductors,” IEEE Journal of Solid-State Circuits, pp. 844-854, APR. 2008.
[32] P. Hazucha, G. Schrom, J. Hahn, B. A. Bloechel, G. Dermer, S.Narendra, D. Gardner, T.
Karnik, V. De, and S. Borkar, “A 233-MHz80%–87% efficient four-phase DC-DC
46
converter utilizing air-core inductors on package,” IEEE J. Solid-State Circuits, vol. 40, no. 4, pp.838–845, Apr. 2005.
[33] P. Li, L. Xue, P. Hazucha, T. Karnik, and R. Bashirullah, “A delay-locked loop synchronization scheme for high-frequency multiphase hysteretic DC-DC converters,”
IEEE J. Solid-State Circuits, vol. 44, no. 11, pp.3131–3144, Nov. 2009.
[34] Y. Panov, and M. Jovanovic, “Loop gain measurement of paralleled DC-DC converters with average-current-sharing control,” IEEE Trans. Power Electron., vol. 23, no. 6, pp.
2942–2947, Nov. 2008.
[35] J. Abu-Qahouq, J. H. Mao, and I. Batarseh, “Multiphase voltage-mode hysteretic controlled DC-DC converter with novel current sharing,” IEEE Trans. Power Electron., vol. 19, no. 6, pp. 1397–1407, Nov. 2004.
[36] S. Abedinpour, B. Bakkaloglu, and S. Kiaei, “A multistage interleaved synchronous buck converter with integrated output filter in a 0.18μm SiGe process,” IEEE Trans.
Power Electron., vol. 22, no. 6, pp. 2164–2175, Nov. 2007.
[37] Ke-Horng Chen, Chia-Jung Chang, and Ter-Hsing Liu, “Bidirectional Current-Mode Capacitor Multipliers for On-Chip Compensation,” IEEE Transaction on Power Electronics, pp. 180-188, Jan. 2008.
[38] Ying Wu, Tsui, S.Y.S., Mok, P.K.T., "An area- and power-efficient monolithic Buck converter with fast transient response," IEEE Custom Integrated Circuits Conf., pp.
307-310, Sept. 2009.
[39] George Schuellein, “Current sharing of redundant synchronous buck regulators powering high performance microprocessors using the V2 control method,” IEEE Applied Power Electronics Conference and Exposition, pp. 853-859, Feb. 1998.
[40] Jaber A. Abu Qahouq, Lilly Huang, and Douglas Huard, “Sensorless Current Sharing Analysis and Scheme for Multiphase Converters,” in IEEE Trans. Power Electron., vol.
23, no. 5, pp. 2237-2247, Sep. 2008.
47
[41] Jaber A. Abu Qahouq, Senior Member, IEEE, Lilly Huang, Member, IEEE, and Doug Huard, “Efficiency-Based Auto-Tuning of Current Sensing and Sharing Loops in Multiphase Converters,” in IEEE Trans. Power Electron., vol. 23, no. 2, pp. 1009-1013, Mar. 2008.
[42] Y. Panov and M. Jovanovi´c, “Stability and dynamic performance of current-sharing control for paralleled voltage regulator modules,” in IEEE Trans. Power Electron., vol.
17, no. 2, pp. 172–179, Mar. 2002.
[43] Juanjuan Sun, Yang Qiu, Ming Xu, and Fred C. Lee, “High-Frequency Dynamic Current Sharing Analyses for Multiphase Buck VRs,” in IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2424-2431, Nov. 2007.
[44] H-I Wang, S-L Hsieh, L-P Tai, and J-M Liu, “Multi-phase DC-to-DC buck converter with multi-phase current balance and adjustable load regulation,” US patent 6670794, Dec. 30, 2003.
[45] Robert W. Erickson and Dragan Maksimovic, Fundamentals of Power Electronics, 2nd ed., pp. 92-101, Norwell, MA: Kluwer Academic Publishers, 2001.
[46] Raymond B. Ridley, “A New, Continuous-Time Model For Current-Mode Control,”
IEEE Trans. Power Electronics, vol. 6, no. 2, pp. 271-280, Apr 1991.
[47] Rajagopalan, J.; Xing, K.; Guo, Y.; Lee, F.C. Lee, “Modeling and Dynamic Analysis of Paralleled dc/dc Converters with Master-Slave Current Sharing Control,” in Proc. IEEE Applied Power Electronics Conference and Exposition, vol. 2, pp. 678 - 684, June 1996.
[48] Silvio Ziegler, Robert C. Woodward, Herbert H. C. Iu, and Lawrence J. Borle, “Lossless Inductor Current Sensing Method With Improved Frequency Response,” IEEE Trans.
Power Electronics, vol. 24, no. 5, pp. 1128-1222, May 2009.
[49] Hylas Y.H Lam, Wing-Hung Ki and Dongsheng Ma, “Loop gain analysis and development of high-speed high-accuracy current sensors for switching converters,”
IEEE International Symposium on Circuits and Systems, pp. 828-831, May. 2004.