Chapter 5 Conclusion
A.3 Results and discuss
cross-section TEM images and its Energy dispe
Some character about m lt
r deposition (PECVD) system to form the control oxide. Finally, the Al gate electrode was patterned and sintered to form metal/oxide/silicon (MOS) structure with Co nanocrystals. This MOS capacitance structure was prepared for material and electrical analyses.
Fig. A-2 presents typical bright-field,
rsive X-ray spectroscopy (EDX) is an analytical technique used predominantly for the elemental analysis or chemical characterization of a specimen. EDX provides a powerful tool for identifying local composition within TEM images and is utilized extensively in applications ranging from failure analysis to elemental mapping. From
EDX spectroscopy, we know that what the local elemental composition is and there are cobalt and oxygen in the dot. It shows the structure of the film which is based on Co-SiO2 co-sputtered film. As illustrated in Fig. A-2, the well-separated and spherical Co nanocrystals embedded between the control oxide layer and the tunnel oxide layer were observed clearly. The nanocrystals (the charge storage layer) embedded in dielectrics layer of metal-oxide–insulator- oxide silicon (MOIOS) memory device was utilized to capture the injected carriers from the channel, which caused a variation in the threshold. The insulator layer usually maybe Co-SiO2 film or Co-Si3N4 film in this chapter.
Figure A-2 Transmission electron microscopy (TEM) analyses and
ig. A-3 show the forward and reverse capacitance-voltage (C-V) curves for
its EDX. After annealing cobalt elements had accumulated to form cobalt nanocrystals which were embedded between tunnel oxide and control oxide after anneal at 750 and during 30 seconds. ℃
F
as-deposited samples obtained when the gate voltage was first swept from –7V to +7V (accumulation to inversion, forward sweep) and then from +7V to –7V (inversion to accumulation, reverse sweep) for Co-SiO2 co-sputtered based MIS structure. In the same way Fig. A-4 show the forward and reverse capacitance-voltage (C-V) curves for as-deposited samples obtained when the gate voltage was first swept from –7V to +7V (accumulation to inversion, forward sweep) and then from +7V to –7V (inversion to accumulation, reverse sweep) for Co-Si3N4 co-sputtered based MIS structure. One of them is different and the applied voltage also was ±9 volts over and above ±7. The bidirectional C-V sweeps were performed from deep inversion to deep accumulation and in reverse, which exhibited an electron charging effect.
Co/SiO2 550o
Co-SiO
2co-sputtered file.
500x100 7V <=> -7V
9V <=> -9V
500x100 7V <=> -7V
9V <=> -9V
We could observe that threshold-voltage shifts were reduced and memory window also was sm
and Fig. A-4. For a fine example of this phenomenon, the threshold-voltage shifts of
C
aller as the memory was annealed during longer time in Fig. A-3
the memory which was annealed at 550oC during different time were smaller as annealed time with Rapid Thermal Processing (RTP) system was longer. There is the same phenomenon in the Co-SiO2 co-sputtered film based or the Co-Si3N4
co-sputtered film based memory. It is considered that there were less cobalt elements to form nanocrystals and some cobalt elements to form another chemical compound.
The cobalt reacts with oxygen to make rust during annealing in O2.ambiance. Here is an example of chemical reactions with the corresponding chemical equation. Cobalt oxide had large internal resistance [A-5] and therefore cobalt oxide had not been a good conductor. There is considerable validity in our ratiocination: some cobalt elements formed another chemical compound during annealing in O2 ambiance. It was shown in figure 3-3 (a)-1, (b)-1, (c)-1 the MOIOS structure have larger memory window than in figure 3-3 (a)-2, (b)-2, (c)-2 under ±7V C-V sweeping. As the oxidation time increasing, the threshold-voltage shifts became smaller reversely as former discussed. The memory effect was observed from the hysteresis capacitance-voltage (C-V) characteristics of MIS capacitors embedded with the charge storage layer. According to the theoretical derivation [A-6], i.e. Q= -VfbCcontrol, the total charges trapped in the capacitor can be approximately estimated and the model is schematized in Fig. A-5. We could observe that the value of trapped electrons or holes in memory which was annealed during loner time is lower than the memory which was annealed during shorter time. The memory windows under ±7V operation for the two types of MOIOS structure were listed in Table A-2. We have discussed the electrical characteristics of cobalt nanocrystals embedded in silicon oxide or nitride film during different annealed time. We could know there are the points to be specially considered. The XPS, also called ESCA, analyses were carried out with previous ion bombardment cleaning of the sample surfaces. Since the diameter of X-ray beam is large so that the analyses of XPS were may contributed by
nanocrystal itself and dielectric layer, such as the embedded dielectric, tunnel oxide or capped oxide. However, the resolution can not clearly be indicated that the contribution of nanocrystals. As a consequence, all the XPS peaks show a fairly valuable contribution from the bonding between the element and oxygen. The XPS pecks were fitted with fitting program. The values of the binding energy corresponding to the main contributions for each XPS peaks were exhibited clearly [A-7]. Because of them, XPS is an effective and widely used surface analysis technique and therefore we analyzed the material in Co-SiO2 and Co-Si3N4
co-sputtered film with XPS.
Stored charges in a MOS capacitor after RTA 60s (Co-SI
3N
4co-sputter 2min).
Figure A-5 The relations between gate voltage and flat-band voltage,
stored charges in a MIS capacitor. The insets in this figure the high
frequency C-V relations of MIS capacitors co-sputtered to form the
charge storage film with metal Co embedded in the Si
3N
4during different
annealed time respectively.
Co-sputtered Co-SiO2 Oxidation
Co-sputtered Co-Si3N4
Table A-2 the comparison emory windows in memory which was based on the Co-SiO
2co-sputtered film and the Co-Si
3N
4under ±7V operation with their corresponding oxidative
Timetemperature
Shorter tine Longer tine
550 °C
2V 1V
650°C
1.5V 1V
650°C
1V 0V
Oxidation Time temperature
Shorte tine r Longer tine
550°C
2.25V 1.8V
650°C
2.2V 1.2V
650°C
1.2V 0V
of m the
co-sputtered film
conditions.
Fig. A-6 shows the XPS (ESCA) spectra of Co 2p3/2 peaks in the memory which is based on Co-SiO2 co-sputtered film. It is found that the Co 2p3/2 peak is a superimposition of many peaks. We could observe that there are Co-O bonds and Co-Co bonds in this film after annealed process. By the same token, we also observed Co-Si3N4 co-sputtered film which was annealed. They were showed in Fig. A-7.
Binding energy (eV)
776 778
780 782
Intensity x 105 (a.u.)
0 1 2 3 4 5
raw intensity Peak sum Co CoO
Figure A-6 The XPS spectra of Co 2p3/2 peaks in the memory
which is based on Co-SiO
2co-sputtered film.
(XPS) ESCA RTA:550oC 60s
which is based on Co-Si
3N
4co-sputtered film.
From Fig.A-6 and Fig. A-7, the point to observe is that cobalt elements will react with
oxygen to make cobalt oxide during oxidation process.
We could represent this assumption in XPS diagrams as follows. The lower pure Co elements in the oxidized film (replaced by Co-O) cause the lower memory effect. The partial contribution of Co nanocrystals transferred to the cobalt oxidedielectric after thermal oxidation.As the discussion said, there was no memory window in the samples which was annealed during longer time but obvious memory characteristics in that with during shorter time. To compare the two entirely different results, the series of SIMS analyses of the Co-Si3N4 and Co-SiO2 co-sputtered film. Fig. A-8 (a) shows the SIMS analysis of Co-SiO2 co-sputtered film which was annealed during 60 sec in different temperature ambiance. By the same token, Fig. A-8 (b) shows the SIMS analysis of Co- Si3N4 co-sputtered film which was annealed during 60 sec in different temperature ambiance. We observed that it is enough to prove that this hypothesis is true.
Co-SiO2 RTA:O2 60s
which was annealed during 60 sec in different temperature ambiance (b)
the SIMS analysis of Co-Si
3O
4co-sputtered film which was annealed
during 60 sec in different temperature ambiance.
The current density-voltage (J-V) characteristics of the memory which is based on the Co-SiO2 and Co- Si3N4 co-sputtered film. It is shown in Fig. A-9. We could know that the leakage current exhibited a nearly result about from 10-9order to 10-10 order after annealing during 30 sec. Other annealing time and temperature is quite similar to this.
Figure A-9 The J-V characteristics of the memory which is based (a) on the Co-SiO
2co-sputtered film (b) on the Co-Si
3N
4co-sputtered film
The endurance characteristics of the MOIOS with Co nanocrystals embedded in the co-sputtered filmare illustrated in Fig. A-10. One (Fig. A-10 (a)) of them is the memory that was based on Co-SiO2 co-sputtered film and another (Fig. A-10 (b)) is the memory that was based on Co-Si3N4 co-sputtered film. Pulses (VG=±5V) were applied to evaluate endurance characteristics for the Program/Erase operation. The schematic plots indicated the memory windows can be retain as their initial values after 106 program/erase cycles at room temperature. The same thing may be said of other conditions.
Co-SIO2 co-sputter RTA:O2 5500C 60s
Number of Cycle
100 101 102 103 104 105 106
Flat Band Voltage VFB(V)
-1.5
Flat Band Voltage VFB(V)
-4
Figure A-10 The endurance characteristics of the MOIOS with Co nanocrystals embedded in the (a) Co-SiO
2and (b) Co- Si
3N
4co-sputtered film
The retention characteristics of the memory which is based on Co-SiO2
co-sputtered film were measured at room temperature, as shown in the Fig. A-11. In Fig. A-11, the good retention characteristics and the memory effect without significant decreasing up to 104s can be founded.
time (seconds)