Coulomb Blockade Effect

Coulomb blockade was first observed in tunnel junctions containing a small metallic particle [2-17].The stored electron charge will raise the nanocrystal potential energy and reduce the electric field across the tunnel oxide, resulting in reduction of the tunneling current density during the write process. It is showed in Fig. 2-4.The Coulomb blockade effect can effectively inhibit the electron tunneling at low gate voltage and improve the flash memory array immunity to disturbance. However, the Coulomb blockade effect should be reduced by employing large nanocrystals if large tunneling current and fast programming speed is desired. The Coulomb blockade effect has a detrimental effect on the retention time, since the electrons in the nanocrystal have large tendency to tunnel back into the channel if the nanocrystal potential energy is high in retention mode. Another, the quantum confinement energy shifts the nanocrystal conduction band edge upward so that the conduction band offset

between the nanocrystal and the surrounding oxide is reduced.

Figure 2-4 Coulomb blockade effect

Chapter 3

Experimental procedure

3.1 Sample Preparation

3.1.1 Method of Wafer pre-cleaning and fabricating tunnel oxide P-type silicon wafers with <100> orientation were used for the fabrication of MIS capacitors. First, (100) oriented P-type 4 inch silicon wafers were chemically cleaned by standard Radio Corporation of America cleaning (RCA cleaning), followed by thermally growing of a about 5-nm-thick tunnel oxide at 1000^oC by dry-oxidation horizontal furnace system(atmospheric pressure chemical vapor deposition, APCVD ), and then the oxide measured by N&K 1200 was 41~55 Ǻ.

3.1.2 Method and condition of fabricating Co-Si-Ge thin film 3.1.2.1 Sample study on formation of Cobalt-Silicide (CoSi2) nanocrystals

a 10-nm-think Ge-doped Co-Si thin film was deposited by sputtering the Co and Si0.5Ge0.5 targets simultaneously. The pure Co target was sputtered by a DC power of 50W, the Si0.5Ge0.5 target sputtered by a DC power of 70W simultaneously. Then a 20-nm-thick SiO2 film was deposited by plasma enhanced chemical vapor deposition (PECVD) system to form the capped oxide before rapid thermal oxidation (RTO) process. The above co-sputtered film deposited on the tunnel oxide at room temperature with 7.6mTorr pressure of the chamber. After RTO process at 650 for ℃ 30 sec in O2 ambient, the cobalt-silicide NCs were nucleated in the dielectric layer and Si, Co and Ge on co-sputtered film were oxidized and formed one port of control oxide. Afterward annealing a 30nm SiO2 film was deposited by plasma enhanced

chemical vapor deposition (PECVD) system to form the control oxide.

3.1.2.2 Sample study on Post-oxidation annealing procedures of Co-Si-Ge thin film

The following is a co-sputtered film of cobalt (Co) and silicon-germanium (SiGe) deposited onto the tunnel oxide by sputtering system. The pure Co target was sputtered by a DC power of 100W, the Si0.5Ge0.5 target sputtered by a RF power of 100W simultaneously during 30 seconds among the deposition. The above co-sputtered film deposited on the tunnel oxide at room temperature with 4.5mtorr pressure of the chamber. Some characters about cobalt list in Table 3-1.Next step, we annealed the sample with rapid thermal annealing (RTA) for 30s~90s in O2 ambient that temperatures was about 550^oC~750^oC. During the annealing process Si、Co、Ge on co-sputtered film were oxidized and formed one port of control oxide. Also, cobalt elements had accumulated to form CoSi2 nanocrystals which were embedded between silicon dioxide.

After annealing a 50nm SiO2 film was deposited by plasma enhanced chemical vapor deposition (PECVD) system to form the control oxide.

Table 3-1 some character about metal cobalt Cobalt general character

Name, Symbol, Number cobalt, Co, 27 Chemical series transition metals

Group, Period, Block 9, 4, d

Density 8.90 g·cm^-3

Melting point 1768 K

(1495 °C, 2723 °F)

Boiling point 3200 K

(2927 °C, 5301 °F)

Heat of fusion 16.06 kJ·mol^-1

Heat of vaporization 377 kJ·mol^-1 Heat capacity (25 °C) 24.81 J·mol^-1·K^-1

Work function 4.18eV

3.1.2.3 Sample study on the role of capped oxide

After growing of a about 5-nm-thick tunnel oxide we choose CoSi2 as material to form the Co-Si-Ge thin film. See, for example, the flow path of growing tunnel oxide in preceding paragraph.

A about 10-nm-think Ge-doped Co-Si thin film was deposited by sputtering the CoSi2 and Si0.5Ge0.5 targets simultaneously. The CoSi2 target was sputtered by a DC power of 100W, the Si0.5Ge0.5 target sputtered by a RF power of 100W simultaneously during 30 seconds among the deposition. Then a 10-nm-thick SiO2 film was deposited by plasma enhanced chemical vapor deposition (PECVD) system to form the capped oxide before rapid thermal oxidation (RTO) process. The above co-sputtered film deposited on the tunnel oxide at room temperature with 4.5mTorr pressure of the chamber. After RTO process at 750 for 30 sec~90 sec in O℃ 2 ambient, the

cobalt-silicide NCs were nucleated in the dielectric layer and Si, Co and Ge on co-sputtered film were oxidized and formed one port of control oxide. Afterward annealing a 40nm SiO2 film was deposited by plasma enhanced chemical vapor deposition (PECVD) system to form the control oxide.

3.1.3 Method and condition of fabricating Co-Si-Ge thin film Finally the Al gate electrode on back and front side of the sample were finally deposited and patterned with thermal coater system to form a metal/oxide/silicon (MOS) structure with CoSi2 nanocrystals. Fig. 3-1, Fig. 3-2, Fig. 3-3 was respectively showed the schematic diagrams of fabricating procedures for Co-Si-Ge thin film.

Figure 3-1 The schematic diagrams of fabricating procedures for the

memory which is based on Co-incorporated Si

_0.5

Ge

_0.5

Figure 3-2 The schematic diagrams of fabricating procedures for the

memory which is based on Co-incorporated Si

_0.5

Ge

_0.5

.

Blocking Oxide

3-3 The schematic diagrams of fabricating procedures for the

memory which is based on CoSi

₂

-incorporated Si

_0.5

Ge

_0.5

.

3.2 Physical Characterization Techniques

3.2.1 Focused Ion Beam (FIB)

FIB techniques are commonly used in high magnification microscopy. Many FIBs are largely used to prepare transmission electron microscope (TEM) cross-section sample lamellae because of inducing damage. (In NSYSU)

3.2.2 Transmission Electron Microscopy (TEM) and Energy dispersive X-ray spectroscopy (EDX)

The cross-sectional images were examined by TEM. We could clearly observe that nanocrystals or compounds exist in the trapping layer. We also understand what elements are in the trapping layer with EDX analysis. (In NTHU and NCU)

3.2.3 X-ray photoelectron spectroscopy (XPS)

X-ray photoemission spectroscopy (XPS) is a surface sensitive technique used to determine atomic compositions and learn information about the types of bonding that occurs within various compounds. We could get chemical information from XPS binding energy shifts. (In NCTU)

3.2.4 secondary ion mass spectrometry (SIMS)

Secondary Ion Mass Spectrometry (SIMS) is an analytical technique used to analyze the composition of solid surfaces and thin films by sputtering the surface of the specimen with a focused primary ion beam and collecting and analyzing ejected secondary ions. Secondary ions formed during the sputtering are extracted and analyzed using a mass spectrometer. It can provide elemental depth profiles over a depth range from a few angstroms to tens of microns.

3.3 Physical Characterization Techniques

Electrical characteristics, including the capacitance-voltage (C-V) hysteresis, current density-voltage (J-V), retention and endurance characteristic were also performed. We measured the electrical characteristics with Keithley 4200 and HP4284 Precision LCR Meter at 1 MHz.

Chapter 4

Results and Discussion

A three-phase study was designed to explore the formation of cobalt-silicide, the role of capped oxide before RTA and the procedure of oxidation mechanism. It this investigation about co-sputtered film we also carried out three different experiment discussion.

4.1 Study on formation of cobalt-silicide (CoSi

2

) nanocrystals for the application on nonvolatile memory

Fig. 4-1 shows the forward and reverse capacitance-voltage (C-V) hysteresis for as-deposited samples obtained when the gate voltage was first swept from –10V to +10V (accumulation to inversion, forward sweep) and then from +10V to –10V (inversion to accumulation, reverse sweep) for the MIS structure which is based on co-sputtered Co- Si0.5Ge0.5 thin films. In Fig. 4-1, it is found that the memory window of about 5.64V is observed under ± 10 V gate voltage operation. We also measured 15V with the same process and could found that a more pronounced C-V shift is observed. The C-V hysteresis after bidirectional sweeps implies the electron charging and dish. As the swept voltage is increased to ± 15 V, a more pronounced C-V shift is observed. The charge storage ability of Ge-doped cobalt-silicon memory devices is attributed to the presence of cobalt-silicide NCs and the oxidized Ge elements, which provide extra charge trap sites.

Si-Ge-Co co-sputtered film 650oC RTA:60s

VG(volt)

-15 -10 -5 0 5 10 15

C/C 0

0.4 0.6 0.8 1.0

VG=10V <=> -10V VG=15V <=> -15V

Figure 4-1 The C-V characteristics of the Co- Si-Ge co-sputtered film with capped oxide before annealing.

Moreover, the leakage current in the MOIOS structure is shown in Fig. 4-2. The lower leakage current could avoid the stored charge leaking into gate through the blocking oxide to get better retention time for the MOIOS structure. According to the reported paper, the asymmetry of J-V characteristics in the figure is because when the applied voltage is swept from 0 to +10V, some negative charges are trapped in the defects of the dielectric layer, leading to an increase of the injection barrier height and, therefore, to a decrease of the oxide conductivity. The leakage currents exhibit a nearly result about from 10^-11order to 10^-12order.

Figure 4-2 The J-V characteristics of the Co- Si-Ge co-sputtered film with capped oxide before annealing.

Fig. 4-3 shows (a) the cross-sectional and (b) the plane-view TEM image of the fabricated device sample. It can be found that the average diameter of cobalt-silicide NCs is around 8~10 nm from the cross-sectional TEM image and the area density of NCs is estimated to be about 1.03 ×10¹¹ cm^-2 from the plane-view TEM image.

According some papers, the Ge elements tend to segregate at interface during the formation of the NCs [4-1]. With the segregation of Ge elements, the component of NCs is nearly cobalt silicide. Moreover, according to the thermodynamic analysis, We have known that the Si and Ge elements are prior to be oxidized in the mixed film [4-2]. Therefore, the cobalt-silicide NCs nucleate in the thin dielectric film mixed with silicon oxide and oxidized Ge elements.

Figure 4-3 (a) the cross-sectional and (b) the plane-view TEM

image of the fabricated device sample.

EDX Analysis stands for Energy Dispersive X-ray analysis Energy. Fig. 4-4 shows the EDX images of the fabricated device sample after RTO process. We could know that there are many kinds of element in the trapping layer such as cobalt, silicon, germanium and oxygen in the dot from Fig. 4-4 (a) and Fig. 4-4 (b). However, in Fig.

4-4 (c), we could know that a small amount of various elements was in the trapping layer wherever there are not dots in it.

Figure 4-4 The EDX images of the fabricated device sample after

RTO process.

Fig. 4-5 shows the XPS spectrum of Ge 3d and Co 2p3/2 in the Co-Si0.5Ge0.5

co-sputtered film after thermal oxidation process. The Ge 3d XPS spectrum is displayed in Fig. 4-5 (a). We found that the peak output occurs between 29 eV and 35 eV and there and this spectrum clearly indicates the peak at ~32.5 eV¹⁶. it can be found that the Co 2p XPS spectrum shows two peaks corresponding to cobalt silicide and cobalt oxide at ~778.5 eV and ~782 eV, respectively [4-3]. The result indicates that cobalt-silicide NCs are formed and partly cobalt elements are oxidized to cobalt oxide during thermal oxidation process. It is believed that the thermal oxidation process causes the formation of cobalt-silicide NCs and the oxidation of Ge elements.

(a)

(b) Co-O

G e 3 d

B in d in g E n e rg y (e V )

3 0 3 2 3 4

Indenisty(a.u.)

R a w In te n s ity P e a k S u m G e O 2 G e

C o 2p

B inding E nergy(eV )

7 7 6 77 8 7 8 0 7 8 2 7 8 4

Indensity(a.u.)

R a w In te n sity P e a k S u m C oS i2 C o O

Figure 4-5 The XPS spectrum of (a) Ge 3d and (b) Co 2p3/2 in the

Co-Si

_0.5

Ge

_0.5

co-sputtered film after thermal oxidation process.

4.2 Post-oxidation annealing procedures of Co-Si-Ge thin film as trapping layers in oxygen ambient by annealing system

4.2.1 Results

4.2.1.1 Electrical characteristics

Fig. 4-6 show the forward and reverse capacitance-voltage (C-V) hysteresis for as-deposited samples obtained when the gate voltage was first swept from –7V to +7V (accumulation to inversion, forward sweep) and then from +7V to –7V (inversion to accumulation, reverse sweep) for MIS structure which is based on co-sputtered Co- Si0.5Ge0.5 thin films. We also measured 9V with the same process and could found that a more pronounced C-V shift is observed. The C-V hysteresis after bidirectional sweeps implies the electron charging and dish.

We could observe that threshold-voltage shifts were reduced and memory window was also smaller as the memory was annealed during longer time or higher temperature in Fig. 4-6. For a fine example of this phenomenon, the threshold-voltage shifts of the memory which was annealed at 550^oC were smaller when annealed time with Rapid Thermal Processing (RTP) system was longer. It is considered that there were less cobalt elements or CoSi2 to form nanocrystals and partial cobalt elements form another chemical compound. The cobalt reacts with oxygen to make rust during annealing in O2.ambiance. Here is an example of chemical reactions with the corresponding chemical equation. Cobalt oxide had large internal resistance [4-4] and therefore cobalt oxide had not been a good conductor. There is considerable validity in our ratiocination: some cobalt elements formed another chemical compound such as CoO during annealing in O2 ambiance.

The C-V hysteresis of

Co-SiGe co-sputtered film 550^oC RTA:90s

Vg(volt)

The C-V hysteresis of

Co-SiGe co-sputtered film 550^oC RTA:60s

Vg(volt)

The C-V hysteresis of

Co-SiGe co-sputtered film 650^oC RTA:60s

Vg(volt)

The C-V hysteresis of

Co-SiGe co-sputtered film 650^oC RTA:90s

Vg(volt)

The C-V hysteresis of

Co-SiGe co-sputtered film 650^oC RTA:30s

Vg(volt)

The C-V hysteresis of

Co-SiGe co-sputtered film 750^oC RTA:60s

Vg(volt)

Thermal annealing with RTA during longer time

Figure 4-6 C-V hysteresis of the fabricated device sample after RTO

process.

4.2.1.2 Material analysis

Fig. 4-7 shows the cross-sectional TEM and the C-V hysteresis of the fabricated device sample after RTO process. We can clearly find out the variation in chemical and physical composition of trapping layer. Co-sputtered film became two separate ports in trapping layer. One of them is a continuous film that is not formed with conductor and becomes one port of control oxide. Another one is clearly observed that many nanocrystals formed under continuous film and on tunnel oxide after thermal treatment.

Control oxide

tunnel oxide

The C -V hysteresis of Co-S iG e co-sputtered film 550^oC R TA :60s

Vg(volt)

-8 -6 -4 -2 0 2 4 6 8

C/C0

0.4 0.6 0.8 1.0

Figure 4-7 The cross-sectional TEM and the C-V hysteresis of the fabricated device sample after lower temperature RTO process.

EDX Analysis stands for Energy Dispersive X-ray analysis Energy. Fig. 4-8 (a)

shows the EDX images of the fabricated device sample after RTO process. It is sometimes referred to also as EDS or EDAX analysis. It is a technique used for identifying the elemental composition of the specimen. We could know that there are many kinds of element in the trapping layer such as cobalt, silicon, germanium and oxygen in the Fig. 4-8 (a). In the Fig. 4-8 (b), we made quantitative analysis and could understand that oxygen elements on the point, EDX-03, have plenty of oxygen elements on the point, EDX-01, and, EDX-02.

EDX-0x (location)

1 2 3

The quantity of oxygen element

82 84 86 88 90 92 94

Figure 4-8 (a) Cross-sectional TEM and EDX (Energy Dispersive X-ray analysis) of the fabricated device sample after RTO process. (b) The quantitative analysis and could understand that oxygen elements on the point

Fig. 4-9 shows the XPS spectrum of Ge 3d and Co 2p3/2 in the co-sputtered Co- Si0.5Ge0.5 thin films after thermal oxidation process. The Ge 3d XPS spectrum is displayed in Fig. 4-9 (a). We found that the peak output occurs between 30 eV and 34 eV. It is believed that the executed oxidation process causes the oxidation of Ge element. In Fig. 4-9 (b), the Co 2p3/2 XPS spectrum shows two peaks corresponding to CoSi2 and cobalt oxide at about ~778.6eV and ~780.5eV respectively. The result indicated that CoSi2 NCs are formed and partly cobalt elements are oxidized to cobalt oxide during thermal oxidation process.

B inding energy (eV )

Co-Si

_0.5

Ge

_0.5

co-sputtered film after thermal oxidation process.

Fig. 4-10 shows the cross-sectional TEM and the C-V hysteresis of the fabricated device sample after RTO process. We can clearly find out the variation in chemical and physical composition of trapping layer. Co-sputtered film became two separate

ports in trapping layer. One of them is a continuous film which is not formed with conductor and another one of them is clearly observed that there no nanocrystals under continuous film by thermal treatment. In the Fig. 4-11, we also could know that there are many kinds of element in the trapping layer such as cobalt, silicon, germanium and oxygen with EDX analysis.

The C-V hysteresis of

Co-SiGe co-sputtered film 750^oC RTA:60s

Vg(volt)

-6 -4 -2 0 2 4 6

C/C0

0.4 0.6 0.8 1.0

Figure 4-10 The cross-sectional TEM and the C-V hysteresis of the

fabricated device sample after higher temperature RTO process.

Figure 4-11 Cross-sectional TEM and EDX (Energy Dispersive X-ray analysis) of the fabricated device sample after RTO process.

Fig. 4-12 shows the XPS spectrum of Ge 3d and Co 2p3/2 in the Co- Si0.5Ge0.5

co-sputtered film after thermal oxidation process. The Ge 3d XPS spectrum is displayed in Fig. 4-12 (a). We found that this peak output occurs between 30 eV and 34 eV. It is believed that the executed oxidation process causes the oxidation of Ge element. In Fig. 4-12 (b), the Co 2p3/2 XPS spectrum shows three peaks corresponding to cobalt oxide at about 778eV and upward. This result indicated that the bulk of cobalt elements are oxidized to cobalt oxide during thermal oxidation process.

B in d in g e n e rg y (e V )

778 780 782 784 786 788

Intensity x 105 (a.u.)

Co-Si

_0.5

Ge

_0.5

co-sputtered film after thermal oxidation process in higher

temperature.

In addition, the electrical current density-voltage (J-V) hysteresis of three conditions in oxidation duration of the Co-Si0.5Ge0.5 is shown in Fig. 4-13. With the extension of oxidation duration at different temperature from 60 seconds to 90 seconds, the leakage current exhibited a nearly result about from 10^-12 order to 10^-10 order. It is torrent for carrier stored in charge trapping layer.

(a)

Co-SiGe 650oC 30 seconds

Gate Voltage (V)

-10 -8 -6 -4 -2 0 2 4 6 8 10

J(A/cm

2 )

0 50x10^-12 100x10^-12 150x10^-12 200x10^-12

(c)

Figure 4-13 The J-V characteristics of the capacitor based on the Co- Si

_0.5

Ge

_0.5

co-sputtered film with oxidation in different condition.

4.2.2 The discussion

4.2.2.1 Discussion on electrical characteristics

It is found that the memory window of 6.2V is observed under ±7 gate voltage operation and about 13.2V is observed under ±11 gate voltage operation in Fig. 4-14 (a). As the swept voltage is increased to ±7 and ±11, a more pronounced C-V shift is observed. The memory effect was observed from the hysteresis capacitance-voltage (C-V) characteristics of MIS capacitors embedded with the charge storage layer.

According to the theoretical derivation [4-5], i.e. Q= -VfbCcontrol, the total charges trapped in the capacitor can be approximately estimated and the model is schematized in Fig. 4-14 (b). We could know that the quantity of trapped charge is tied closely with gate voltage and it is pertinent to tunneling probability.

stored charges (Co-SiGe co-sputter)

Figure 4-14 (a) he C-V hysteresis of the fabricated device sample and (b) the quantity of trapped charge after RTO process.

4.2.2.2 Reaction free energy

In pure O2, oxidation of silicon, germanium and cobalt, forming SiO2, GeO2 and CoO occurs following the reaction [4-6]:

Si+O2-Æ SiO2

With a free energy change of △G1=-732.94 kJ/mol Ge+O2-Æ GeO2

With a free energy change of △G2=--377.54 kJ/mol, whereas for X Co+ Y O2-Æ Z CoO

With a free energy change of △G3=--142.15 kJ/mol

The amount of Gibbs free energy reduction in forming the silicide phases from Co and Si elements are known at 727^OC, but those are known: it is -88.9 KJ/mole for CoSi and -95.1 KJ/mole for CoSi2, with a difference of only -7%. [4-7]

The lower value of Gibbs free energy of SiO2, Gibbs free energy of GeO2 and Gibbs free energy of CoOclearly predicts that the SiO2, GeO2 andCoO reaction with oxygen is thermodynamically more preferable than CoSi2.Cobalt will react with silicon to form cobalt silicide and aggregate to form dots in the region without unwanted oxygen.

4.2.2.3 Formation of CoSi2 nanocrystal after annealing

From TEM image was showed in the Fig. 4-7 and that show the cross-sectional TEM and the C-V hysteresis of the fabricated device sample after RTO process.

Co-sputtered film became two separate ports in trapping layer and the C-V hysteresis which there is large memory window indicates that trapping effect occurs. At high temperature condition and in the controlled-atmosphere chamber filled with oxygen at atmospheric pressure, silicon, germanium and cobalt will easily react with oxygen to form oxide. We also know that aggregation generally occurs at higher temperatures [4-8]. Fig. 4-10 also shows the cross-sectional TEM and the C-V hysteresis of the fabricated device sample after RTO process. The difference in temperature between Fig. 4-7 and Fig. 4-10 there is two hundred degrees. The TEM image in Fig. 4-7

shows the sample which was annealed in lower temperature. Besides, co-sputtered film became two separate ports in trapping layer. One of them is clearly observed that many NCs formed under continuous film and on tunnel oxide by thermal treatment.

We could observe that the trapping effect occurred from its C-V hysteresis. Compare this with Fig. 4-10, we could find that there are no separate layers and NCs in this trapping layer after annealing in higher temperature. Besides, there was smaller but not zero memory window in its C-V hysteresis. Because of them, we could consider the main trapping effect occurs on the nanocrystal and the oxidized Ge elements contribute extra charge trap site.

We could know that cobalt oxide, germanium oxide and silicon oxide will be formed by chemical reactions in the Co- Si0.5Ge0.5 co-sputtered thin film and CoSi2

We could know that cobalt oxide, germanium oxide and silicon oxide will be formed by chemical reactions in the Co- Si0.5Ge0.5 co-sputtered thin film and CoSi2

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