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The proposed high gain mixer is simulated and optimized using Agilent ADS. Fig. 3 - 8 shows the chip layout of the proposed high gain mixer which is implemented in TSMC 0.18 μm mixed-signal/RF CMOS 1P6M process. The mixer size is 0.7 × 1.4 mm2 including all pads and bypass capacitances. Each buffer of the IF ports were designed as a common-source amplifier.

Fig. 3 - 8 The chip layout photograph of the proposed high gain mixer

Fig. 3 - 9 The full chip photograph of integrated circuit

Fig. 3 - 9 shows the chip photograph of integrated circuit that includes antenna (0.7 × 1.4 mm2) and high gain mixer (0.7 × 1.4 mm2). Fig. 3 - 10 shows the simulated and measured s-parameter of RF ports. The simulated result without antenna is an exact performance of proposed mixer. However, it cannot cut the antenna to get the true results of mixer when the probe contacts the pad of mixer to measure performance. So, the matching s-parameter of mixer shifts to high frequency because the load of antenna affects matching impendence that smaller than standard impendence during measurement. As shown Fig. 3 - 10, the simulated s-parameter without antenna is below -10 dB in 12.5~15 GHz and with antenna is below -10 dB in 13~20 GHz. The measured s-parameter is averagely below -10 dB in 6~20 GHz.

Fig. 3 - 11 shows the simulated and measured the bandwidth of conversion gain while radio frequency down converts to 100 MHz. The simulated result with antenna or not exhibits the 3 dB gain bandwidth from 11.5 to 14.8 GHz and the maximum conversion gain is 22.285 dB at 13 GHz. However, the measured result decreases 4 dB approximately. The maximum conversion gain is 18.3 dB at 14 GHz and bandwidth covers from 12 to 16 GHz. As shown Fig. 3 - 12, the simulated noise figure without antenna is below 9 dB in 12~15.5 GHz and with antenna is below 12.3 dB in 12~16 GHz. The measured noise figure is below 16 dB in 12~16 GHz and the minimum is 13.214 dB at 13.5 GHz.

Fig. 3 - 10 The input return loss of the proposed high gain mixer

Fig. 3 - 11 The conversion gain of the proposed high gain mixer

Fig. 3 - 12 The noise figure of the proposed high gain mixer

Fig. 3 -13 and Fig. 3 - 14 show the simulated and measured linearity at 14 GHz that is the radio frequency of the maximum conversion gain. The simulated linearity shows that P1dB is -26 dB and IIP3 is -15 dB. The measured linearity shows that P1dB is -16 dB and IIP3 is -7.5 dB. Fig. 3 -15 shows the measured isolation from 9.9 to 18 GHz. The LO-IF isolation is below -35 dB, the LO-RF isolation is below -55 dB and the RF-IF isolation is below -35 dB. The figure of merits (FOM) for mixer summarizes the important performance parameters and formula is defined as:

FOM

Mixer

=  20log( f

RF

)+ CG NF DSB  ( )  IIP 3 10log(  P

Consumption

)

(3.1)

where fRF is the center frequency. CG is the conversion gain. NF DSB( ) is noise figure at

double-side band. IIP3 is input third-order intercept point.

P

Consumptionis power consumption.

Table 3 - 1 summarizes the simulated and measured results of the proposed high gain mixer.

The simulated FOM is 193.7 by equation (3.1). However, the measured FOM drops to 191.42.

Including the antenna load effect, the simulated power consumption is not equal to the measured power consumption. This condition must be process variation. Also, the proposed mixer is used by idea balun to generate different signals and drive proposed mixer. The performance of idea balun is obviously different from the real balun that used in measurement because real balun exists phase error but idea balun doesn’t. So, from Fig. 3 – 11 to Fig. 3 – 15, the simulated results are not fit measured results perfectly due to process variation and using real balun.

Fig. 3 - 13 The P1dB of the proposed high gain mixer

(a) Simulation

(b) Measurement

Fig. 3 - 14 The IIP3 of the proposed high gain mixer

Fig. 3 - 15 The isolation of the proposed high gain mixer

Table 3 -1 Simulated results of the proposed high gain mixer

Simulation Measurement

Technology TSMC 0.18um CMOS

RF Freq. 11.5~14.8 GHz 12~16 GHz

IF Freq. 100 MHz 100 MHz

LO Power 0 dB 0 dB

Conversion Gain,max 22.285 dB 18.327

NF 8~9 13.2~15.9

P1dB -26 dB -16 dB

IIP3 -15 dB -7.5 dB

LO-to-RF isolation < -40 dB < -55 dB

LO-to-IF isolation < -35 dB < -35 dB

RF-to-IF isolation < -35 dB < -35 dB

Power Consumption 6.12 mW 7.56 mW

FOM 193.7 191.42

Table 3 -2 Comparison of mixer performance

Chapter 4

4-17 GHz Wideband High Gain Down

Conversion Mixer with Cascade Structure

4.1 Introduction

Direct conversion front-end circuit is a very important component in wireless communication system. Generally, front-end circuit must be constituted by low-noise amplifier (LNA) and mixer. The mixer is a key block to translate signals in the system. In the development of modern wireless applications, wideband frequency range, low power consumption and small chip area are the aims of work. For these topics, the idea of high gain mixer is proposed and replaced conventional front-end circuit further. The double-balance mixer is commonly used because the advantage of this active mixer is good isolation [14].

However, the main challenge in double-balanced mixer is to decrease noise figure and extend frequency range for more applications at steady high conversion gain.

In this chapter, a broadband high gain mixer is presented for many bands applications such as C band (4~8 GHz)、X band (8~12 GHz) and most part of ultra-wide band (3.1~10.6 GHz) and Ku band (12~18 GHz). The RF trans-conductance stage of proposed mixer uses cascade structure that the capacitor cross-coupled wideband amplifier at first stage replaces passive LC input match network to design high gain mixer at wide frequency range.

4.2 Circuit Design Consideration

Radio frequency designs are increasingly used in advance CMOS process that makes the integration of complete communications systems possibly [17]. The proposed mixer at this chapter is shown in Fig. 4 – 1. In high gain mixer, the blocks of active load and switch pair are discussed at chapter 3. This section focuses on RF trans-conductance stage how to achieve high gain and low noise figure in wideband. The RF part can be divided into CS-LNA [17] at second stage and CCC CG-LNA [20] at first stage.

Fig. 4 - 1 The proposed high gain mixer with wideband amplifier

A. Common Source Low Noise Amplifier (CS-LNA)

As shown Fig. 4 – 2, it is a popular structure of low noise amplifier that is inductive generation common-source LNA (CS-LNA). In a CS-LNA, degenerated inductor LS2 is used to generate the real part impedance needed to match the LNA easily. Using LG2 is called series RLC network circuit can possibly match the input impedance to 50Ω in narrow band. A simple analysis of input impedance is defined as [17]:

and proportional to LS2. The gate inductor LG2 is used to set the resonance frequency as it is chosen to satisfy the criterion of 50 Ω input impedance [17].Ctot is the capacitance of CGS,2 and CG2 in series. The large gate capacitance CG2 is used to be a DC block so the capacitance of Ctot almost equals to CGS,2.

Fig. 4 - 2 The CS-LNA with series RLC input match network

However, the degenerated inductor common source LNA with a series RLC input match network only can enhance effective trans-conductance to increase gain and reduce the noise figure in narrowband [19].

B. Capacitor Cross-Coupled CG-LNA (CCC CG-LNA)

In order to extend bandwidth, common gate amplifier (CGA), shown Fig. 4 - 3, is used to match wideband input impedance generally. The simple input admittance and noise factor analysis of CGA is defined as [20]:

1 1 α,γ are bias-dependent parameters [26]. According Equation (4.2), the CGA at first stage can achieve to 50 Ω because the input impedance looking into the source of transistor M1 is approximate 1/Gm1. However, the CGA suffers from poor noise figure comparison to CS-LNA [20]. To solve this problem, a capacitive cross-coupling method can boost the trans-conductance of transistors M1 and M3 with the passive component of capacitors [20]-[22]. As shown in Fig. 4 – 4, it is called capacitor cross-coupled common-gate low noise amplifier (CCC CG-LNA).

M

1

Ls

RF+

V

G

Fig. 4 - 3 The structure of common gate amplifier

Fig. 4 - 4 The structure of CCC CG-LNA

According to Fig.4 – 4, the small signals analysis of CCC CG-LNA can prove the effective trans-conductance and noise factor better than CGA by following formula:

, 1 1 Due to capacitors cross-coupling, the noise factor decreases and the effective trans-conductance is double if CC is much larger than CGS. So, the CCC CG-LNA is fit for wideband differential topology.

The RF trans-conductance stage of proposed mixer combines CCC CG-LNA with CS-LNA to design a cascade structure. The CCC CG-LNA at first part achieves wideband input matching to improve applications and supplies the RF gain of low frequency band. The CS-LNA at second part includes both the RF gain of high frequency band and translating voltage signals into current signals that provides switch pair down-conversion. LD2 and LD4 resonate out the tail capacitance of switch pairs to reduce flicker noise in indirectmechanism more [15] [23] [25].

4.3 Simulated and Measured Results

The proposed high gain mixer is simulated and optimized using Agilent ADS. Fig. 4 - 5 shows the chip layout of the proposed high gain mixer which is implemented in TSMC 0.18 μm mixed-signal/RF CMOS 1P6M process. The chip size is 1.19 × 1.17 mm2 including all pads and bypass capacitances. Each buffer of the IF ports were designed as a common-source amplifier.

Fig. 4 - 5 The chip layout of the proposed mixer

Fig. 4 - 6 The chip photograph f the proposed mixer

Fig. 4 - 6 shows the chip photograph of proposed mixer. As shown in Fig. 4 -7, the simulated and measured return losses of RF ports are below -8 dB in 4~20 GHz. Fig. 4 - 8 shows the simulated and measured the bandwidth of conversion gain when radio frequency down converts to 100 MHz. The simulated result exhibits the 3dB gain bandwidth from 2.7 to 17.8 GHz and the maximum conversion gain is 27 dB at 4 GHz and 15 GHz. But, the measured result decreases 4 dB approximately and the maximum conversion gain is 22.7 dB at 4 GHz and 16 GHz. The simulated noise figure is below 8 dB in 4~17 GHz and the measured noise figure is below 12 dB in 4 ~16 GHz shown in Fig. 4 - 9.

Fig. 4 - 7 The input return loss of the proposed mixer

Fig. 4 - 8 The conversion gain of the proposed mixer

Fig. 4 - 9 The noise figure of the proposed mixer

Fig. 4 - 10 and Fig. 4 - 11 show the simulated and measured linearity at 16 GHz that is the radio frequency of the maximum conversion gain. The simulated linearity shows that P1dB is -28 dB and IIP3 is -17 dB. The measured linearity shows that P1dB is -20 dB and IIP3 is -10 dB. Fig. 4 - 12 shows the measured isolation from 0.9 to 20 GHz. The LO-IF isolation is below -40 dB, the average LO-RF isolation is below -60 dB and the average RF-IF isolation is below -30 dB. Table 4 - 1 summarizes the simulated and measured results of the proposed high gain mixer. The simulated FOM is 192.84 by equation (3.1). However, the measured FOM drops to 192.04.

Compared with the simulated power consumption, the measured power consumption is 12.058 mW and is more than the simulated power consumption which is 9.012 mW. This condition must be process variation. Also, the proposed mixer is used by idea balun that generates different signals and that drive proposed mixer. The performance of idea balun is obviously different from the real balun that is used during measurement because real balun exists phase error but idea balun doesn’t. So, from Fig. 4 – 7 to Fig. 4 – 12, the simulated results are not fit measured results perfectly due to process variation and using different balun.

Fig. 4 - 10 The P1dB of the proposed mixer

(a) Simulation

(b) Measurement

Fig. 4 - 11 The IIP3 of the proposed mixer

Fig. 4 - 12 The isolation of the proposed mixer

Table 4 -1 Simulated and measured result of the proposed mixer

Simulation Measurement

Technology TSMC 0.18um CMOS

RF Freq. 4~16 GHz 4~17.8 GHz

IF Freq. 100 MHz 100 MHz

LO Power 0 dB 0 dB

Conversion Gain,max 27.19 dB 22.565

NF 7.8~8 dB 10~12 dB

P1dB -28 dB -20 dB

IIP3 -17 dB -10 dB

LO-to-RF isolation < -60 dB < -60 dB

LO-to-IF isolation < -40 dB < -40 dB

RF-to-IF isolation < -30 dB < -30 dB

Power Consumption 9.012 mW 12.058 mW

FOM 192.84 192.04

Table 4 -2 Comparison of broadband mixer Performance

Chapter 5

Conclusion and Future Work

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