In this chapter, we carry out the comparisons of single gate TFTs and double gate TFTs crystallized by elevated channel method. The leakage current issue of double gate devices was found and the mechanism was investigated, followed by the two solutions, lightly-doped-drain structure and shrunk gate engineering.
In the first part, top gate and bottom gate poly-Si TFTs was fabricated by elevated channel method. With the high field-effect mobility of 137 cm2/V-s for P-type BG-TFTs and 197 cm2/V-s for P-type TG-TFTs, we obtained high performance of single gate devices and thereby proved the application of elevated channel method to the top gate TFTs and bottom gate TFTs. Furthermore, the superior DIBL and subthreshold swing of double gate devices also certified the enhancement of gate controlling ability of double gate structure.
In the second part, the leakage current mechanism was demonstrated by the penetration of depletion region to the small grain accompanied with elevated channel structure. During off-state operation, high drain bias voltage causing strong lateral electric field would release the trap charges and led to leakage current. The leakage current was alleviated about an order by LDD structure. We found the series resistance degraded the driving current in on-state for LDD devices; therefore, shrunk gate engineering was introduced. With the analogous effect of LDD, the leakage current was also suppressed one order while the transconductance and driving current were not sacrificed.
Chapter 4 Conclusions
In this thesis, we had demonstrated the high performance double-gate polycrystalline silicon thin-film transistors fabricated by elevated channel method with excimer laser irradiation. The results and discussions were summarized in the chapter.
In chapter 2, material analyses were performed to investigate the poly-Si thin films fabricated by elevated channel method. The location-controlled grain boundary mechanism of elevated channel method was introduced at first. Then, from the analysis of scanning electron microscope (SEM) and transmission electron microscope (TEM), large longitudinal grains laterally grown in the channel regions measured to be about 0.6 μm were observed. Furthermore, the lateral growth starting from the both side regions of the elevated channel could progress along the opposite direction and single grain boundary was controlled in the center of the channel region artificially. This crystallization technique could be applied to the fabrication of short channel poly-Si TFTs. Then, the electrical characteristics of SGB-DG-TFTs
SGB-DG-TFTs with equivalent field-effect mobility exceeding 1000 cm2/V-s for the n-channel devices and 340 cm2/V-s for the p-channel ones have been fabricated.
Low kink current, wide process window, and improved throughput were obtained.
The SGB-DG-TFTs exhibited better electrical characteristics than the conventional top gate ones, especially in the short channel devices owing to the artificially controlled lateral grain growth. In addition to the enhancement of TFT performance, TFTs crystallized with elevated channel method also demonstrated excellent uniformity. The standard deviation of mobility was smaller than 50 cm2/V-s and the standard deviation of threshold voltage was smaller than 0.16V, while that of subthreshold swing was smaller than 40 mV/decade. By means of double gate structure, we obtained steeper subthreshold swing and superior drain-induced-barrier-lowering (DIBL) rather than conventional ones. Furthermore, SGB-DG-TFTs provided 8 times higher driving current than conventional TFTs.
In chapter 3, the elevated channel method was applied to the fabrication of top gate and bottom gate devices with a view to the comparison of double gate devices.
We also obtained high performance single gate devices for the artificially controlled lateral grain growth. The double gate structure was proven again to exhibit superior gate controlling ability. Besides, we investigated the mechanism of leakage current, which was observed in some DG devices during measurement. During off-state operation, high drain bias voltage causing strong lateral electric field would release the trap charges of small grains near bottom gate corner and lead to leakage current.
With a view to the alleviation of leakage current, we introduced the LDD structure at first. The leakage current was suppressed by an order of magnitude, but unfortunately the driving current was degraded due to the large series resistance. Therefore, we introduced another method, the shrunk gate, to avoid the couple of top gate electric field with small grain regions. We succeeded to suppress the leakage current by an
order of magnitude without any sacrifice of transconductance and driving current.
To sum up, the elevated channel method was attractive to fabricate the high performance TFTs, especially in the short channel devices. The electrical characteristics of TFTs fabricated by elevated channel methods exhibited high performance and good uniformity, whether in single gate or double gate structure.
Furthermore, the double gate structure was proven to have steeper subthreshold swing, superior DIBL, large driving current, and high equivalent field-effect mobility. It is very promising to the future SOP and 3D-IC applications.
Table
10 shots Gate Oxide: 1000A Mobility*
(cm2/V-s)
Subthreshold
swing (V/dec) Vth (V) On/Off current ratio at Vds = 3 V
Table 2-1 Average of twenty measured electrical characteristics of n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
structure. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping).
20 shots Gate Oxide: 1000A Mobility*
(cm2/V-s)
Subthreshold
swing (V/dec) Vth (V) On/Off current ratio at Vds = 3 V
Table 2-2 Average of twenty measured electrical characteristics of n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
structure. The thickness of gate oxide was 1000Å. The number of laser shots was 20(ie. 95% overlapping).
10 shots Gate Oxide: 1000A Mobility*
(cm2/V-s)
Subthreshold
swing (V/dec) Vth (V) On/Off current ratio at Vds = 3 V
Table 2-3 Average of twenty measured electrical characteristics of p-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate structure. The thickness of gate oxide was 1000. The number of laser shots was 10(ie.
90% overlapping).
Mobility* (cm2/V-s) Vth (V) SS (V/decade)
AVG±STDEV C.V. AVG±STDEV C.V. AVG±STDEV C.V.
Con. TFT 89±43.7 17.3% 1.43±1.36 95.1% 0.686±0.124 18.1%
DGTFT 660±45.8 6.9% -0.5±0.16 32.0% 0.264±0.039 14.8%
Table 2-4 Electrical characteristics of twenty measured n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate TFTs. The
thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90%
overlapping)
Mobility* (cm2/V-s) Vth (V) SS (V/decade)
AVG±STDEV C.V. AVG±STDEV C.V. AVG±STDEV C.V.
Con. TFT 46±16.1 35% -6.430±0.97 15.10% 0.411±0.148 36%
DGTFT 316±25.3 8% -2.435±0.16 6.60% 0.197±0.030 15%
Table 2-5 Electrical characteristics of twenty measured p-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate TFTs. The
thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90%
overlapping)
Mobility* (cm2/V-s) SS (V/dec) Vth (V) Ion/Ioff @ Vds = 3V DIBL (mV)
TGTFT 197 0.320 -3.89 2.63E+07 452
BGTFT 137 0.286 -4.88 1.44E+07 753
DGTFT 352 0.185 -2.35 4.39E+08 351
Table 3-1 Electrical characteristics of p-channel top/bottom/double gate polycrystalline silicon TFTs crystallized by elevated channel method. The thickness
of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping)
Gm
Table 3-2 Electrical characteristics of n-channel double gate polycrystalline silicon TFTs with LDD crystallized by elevated channel method. The thickness of gate oxide
was 1000Å. The number of laser shots was 20(ie. 95% overlapping)
Gm (μS) SS (V/dec) Vth (V) Ion/Ioff @ Vds = 3V
DGTFT 2.92 0.524 1.006 2.34E+06
Shrunk Gate TFT 2.95 0.380 -0.608 3.20E+07
Table 3-3 Electrical characteristics of n-channel double gate polycrystalline silicon TFTs with shrink gate crystallized by elevated channel method. The thickness of gate
oxide was 1000Å. The number of laser shots was 20(ie. 95% overlapping)
excimer laser irradiation
Fig. 2-1 (a) The schematic illustration of the low energy regime corresponding to energy densities that partially melting the a-Si thin film
excimer laser irradiation
melted Si
substrate substrate substrate
homogeneous nucleation
small-grain poly-Si
Fig. 2-1 (b) The schematic illustration of the high energy regime corresponding to energy densities that completely melting the a-Si thin film
excimer laser irradiation
Fig. 2-1 (c) The schematic illustration of the super lateral growth regime corresponding to energy densities that nearly completely melting the a-Si thin film
Fig. 2-2 SEM graph of poly-Si by conventional ELA process in SLG regime
Fig. 2-3 Process flow of preparing samples for material characteristics by elevated channel method
Fig. 2-4 The schematic illustration of the excimer laser system.
Channel Channel
Drain Source
Drain Source
L=1.2μm L=1μm
(a) (b)
Channel
Drain Source
L=1.5μm
(c)
Fig. 2-5 SEM graphs of excimer laser crystallized polycrystalline silicon by elevated channel method. The channel length was varied from 1μm to 1.5 μm. The bottom poly
gate thickness was 1000Å and the gate oxide thickness was 500Å. The laser energy density was 510 mJ/cm2
Channel Channel
Drain Source Drain
Source
L=1.2μm L=1.2μm
Energy density=470mJ/cm2 Energy density=490mJ/cm2
(a) (b)
Channel
Drain Source
L=1.2μm
Energy density=510mJ/cm2
(c)
Fig. 2-6 SEM graphs of excimer laser crystallized polycrystalline silicon by elevated channel method. The channel length was 1.2 μm. The poly gate thickness was 1000Å and the gate oxide thickness was 500Å. The laser energy density was (a) 470 (b) 490
(c) 510 mJ/cm2.
Channel Channel
Drain Source Drain
Source
L=1μm L=0.8μm
(a) (b)
Channel
Drain Source
L=0.7μm
(c)
Fig. 2-7 SEM graphs of excimer laser crystallized polycrystalline silicon by elevated channel method. The channel length was (a)1 (b)0.8 (c)0.7 μm. The poly gate thickness was 1000Å and the gate oxide thickness was 500Å. The laser energy density
was 310 mJ/cm2.
Fig. 2-8 Cross-section TEM graphs of excimer laser crystallized polycrystalline silicon by elevated channel method.
Fig. 2-9 Cross-section TEM graphs of excimer laser crystallized polycrystalline silicon by elevated channel method.
Fig. 2-10 Process flow for fabrication of SGB-DG-TFTs (I)
Fig. 2-10 Process flow for fabrication of SGB-DG-TFTs (II)
Fig. 2-11 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000 Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-12 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-13 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-14 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-15 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-16 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-17 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-18 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-19 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-20 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-21 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-22 Transfer characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-23 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-24 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-25 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-26 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-27 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-28 Transfer characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-29 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-30 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-31 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-32 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-33 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-34 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-35 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-36 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-37 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-38 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-39 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-40 Output characteristic of n-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 2-41 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 0.8 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-42 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-43 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.2 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-44 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 1.5 μm, in which
the thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-45 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 2 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-46 Output characteristic of p-channel double gate polycrystalline silicon TFTs crystallized using elevated channel method with channel length of 5 μm, in which the
thickness of gate oxide was 1000Å. The number of laser shots was 10 (ie. 90%
overlapping).
Fig. 2-47 Alleviated kink effect by n-channel SGB-DG-TFTs rather than conventional TFTs. The channel length was 0.8 μm, in which the thickness of gate oxide was
1000Å. The number of laser shots was 10 (ie. 90% overlapping).
0 100 200 300 400 500 600 700 800
Fig. 2-48 Statistics and uniformity of equivalent field effect mobility. Twenty n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate TFTs were measured. The thickness of gate oxide was 1000Å. The number of
laser shots was 10(ie. 90% overlapping)
-2 -1 0 1 2 3
Fig. 2-49 Statistics and uniformity of threshold voltage. Twenty n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
TFTs were measured. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping)
0.0 0.2 0.4 0.6 0.8 1.0
Fig. 2-50 Statistics and uniformity of subthreshold swing. Twenty n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
TFTs were measured. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping)
0 100 200 300 400
Fig. 2-51 Statistics and uniformity of equivalent field effect mobility. Twenty p-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate TFTs were measured. The thickness of gate oxide was 1000Å. The number of
laser shots was 10(ie. 90% overlapping)
-9 -8 -7 -6 -5 -4 -3 -2 -1
Fig. 2-52 Statistics and uniformity of threshold voltage. Twenty p-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
TFTs were measured. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping)
0.0 0.2 0.4 0.6 0.8
Fig. 2-53 Statistics and uniformity of subthreshold swing. Twenty p-channel SGB-DG-TFTs crystallized with elevated channel method and conventional top gate
TFTs were measured. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90% overlapping)
Fig. 2-54 The dependence of equivalent field effect mobility on laser energy densities for n-channel SGB-DG-TFTs crystallized with elevated channel method and conventional TFTs. The thickness of gate oxide was 1000Å. The number of laser
shots was 10(ie. 90% overlapping).
Fig. 2-55 The dependence of activation energy of drain current on gate bias voltage for n-channel SGB-DG-TFTs crystallized with elevated channel method. The thickness of gate oxide was 1000Å. The number of laser shots was 10(ie. 90%
overlapping).
Fig. 2-56 The dependence of activation energy of drain current on gate bias voltage
Fig. 2-56 The dependence of activation energy of drain current on gate bias voltage