The Sol is a colloidal suspension of solid particles with sizes of 100 nm to 1 m in diameter in a liquid phase, in which the dispersed particles are small enough to remain suspended by Brownian motion; the Gel is a solid material network containing a liquid component, both of which are in a highly dispersed state [8]. The Sol-Gel coating procedure usually consists of four steps. Firstly, the desired colloidal particles once dispersed in a liquid to form the Sol. Secondly, the deposition of Sol solution makes the coating on the silicon substrate by spraying, dipping or spinning. Thirdly, the particles in Sol are polymerized through the removal of the stabilizing components and make the Gel in a state of a continuous network. Ultimately, the eventual heat treatments pyrolyze the remaining organic or inorganic components molded into the amorphous, polycrystalline, or crystalline material coating [9]-[11].
The spin coating method given in Fig. 2-4 has been applied to the fabrication of the inorganic and organic hybrid materials for specific applications. Liquid state
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process enables the molecular scale mixing of precursors, leading to homogeneous, multi-component materials. The most interesting feature of Sol-Gel procedure is capability to synthesize a new type of materials called inorganic-organic hybrids;
organic materials can be doped into the Sol-Gel matrix as well. In these types of materials, polymeric or monomeric molecules exist as a separate functional phase or molecule in an inorganic or inorganic-organic hybrid matrix. Furthermore, MxOy
materials with various phases can also be derived from the Sol-Gel coating method in general applicability to much specific utilization [12]-[14].
Fig. 2-4 The diagram of the spin coating method with controllable spin motor
The Sol-Gel spin coating advantages are as follows: producing thin bond-coating to make excellent adhesion between the metallic substrate and the top coating, thick coating to obtain corrosion protection performance, easily shaping materials into complex geometries in the Gel state, high purity products, and the highly controllable composition; in addition, Sol-Gel technique has low working temperature with much
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wider range from 200° C to 600° C and provides efficiently high quality coatings. If the metal precursor is tethered to the Gel network during Sol-Gel procedure, it allows the non-agglomerated MxOy or metal nanoparticles (NPs) preparation for specifically narrow particle size distributions and adjustable metal loading [15].
Fig. 2-5 describes the Sol-Gel method and its relative product applications. These Sol-Gel ceramic fibers are commonly used as optical fiber cores. The majority of fiber cores are easily coated with a Sol-Gel thin film in which there are dopants. For the thin film area of Sol-Gel technique, dense films are produced by coating a substrate material with the Sol and letting it Gel. This result leads to the densely thin-film thickness on the silicon substrate having a lot of uses like catalysts, chemical sensor, electro-optical coupling transmitters, and nano-electronic devices in the material science and engineering field [16].
Fig. 2-5 Three main product applications of the Sol-Gel method (dash line as the step-by-step coating procedures of our experiments)
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2-3 Experiments
First, (CoCl2．6H2O), GeCl4, LiClO4, SiCl4, and ZrCl4 metal chlorides were used as chemical precursors for the synthesis of MxOy NC materials. A mother Sol solution was mixed and dissolved into IPA with vigorous stirring for about 1 hour. Next, the Sol solution was obtained by entirely hydrolyzing metal chlorides with the stoichiometric amount of water in IPA to yield a 1:1000 molar ratio mixture of metal (Mx) : IPA.
The NC Flash memory fabrication of the Sol-Gel spin coating was begun with LOCOS (Local Oxidation of Silicon) isolation process on p-type (100) 150-mm silicon substrate wafers. Then, a 10 nm dry oxide thin film for tunnel oxide was thermally grown at 900o C by vertical furnace oxidation. The chemical solution of a 1:1000 molar ratio mixture of Mx : IPA was deposited on the tunnel oxide layer with the Sol-Gel procedure by spin coater at 3000 rpm for 60 sec. at room temperature (25o C); the as-deposited thin film was followed with the 1050o C 60 sec. ORTA step in the O2
environment to form various kinds of the MxOy thin film or NCs as the charge-trapping layer of the Flash memory devices. The 30-nm-thin block oxide film was coated by the high density plasma enhanced chemical vapor deposition (HDPCVD) process in N2 densification, and followed with a 200-nm-thick polysilicon gate layer on block oxide.
After polysilicon-gate deposition, the followed steps were polysilicon-gate electrode patterning, source/drain (S/D) extension implanted by the low dose of 2E14 cm-2 arsenic (As) at 10 keV ion energy, sidewall spacer formation, gate/source/drain (G/S/D) ion implantation with the high dose of 5E15 cm-2 As at 20 keV energy, silicon substrate contact patterning and ion implantation by the high dose of 5E15 cm-2 boron fluoride (BF2) at 40 keV energy, S/D dopant activation at 1050o C, oxide passivation layer deposition by the HDPCVD process, contact hole openings, and metal pads; the rest of the standard MOS manufacturing processes were finished to fabricate the NC
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Flash memory devices later.
The flow chart and process flow of the proposed NC Flash memory devices are depicted in Fig. 2-6 and Fig. 2-7.
Fig. 2-6 The flow chart of IPA Sol-Gel derived Flash memory devices
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(a) LOCOS isolation process on the p-type (100) 150-mm silicon substrate
(b) The thin film for tunnel oxide thermally grown at 900o C dry oxidation
(c) The deposited chemical solution by the Sol-Gel spin coating at 3000 rpm for 60 sec.
at room temperature
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(d) The formation of MxOy thin film or NCs with the 1050o C 60 sec. ORTA step
(e) The 30-nm-thin block oxide film coated by the HDPCVD process in N2 densification
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(f) The 200-nm-thick polysilicon control gate layer deposited on the block oxide layer
(g) The polysilicon-gate electrode patterning
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(h) The gate and S/D extension implanted by the low dose of 2E14 cm-2 As at 10 keV ion energy
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(i) The oxide sidewall spacer formation
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(j) G/S/D ion implantation with the high dose of 5E15 cm-2 As at 20 keV energy
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(k) Silicon substrate contact patterning and ion implantation by the high dose BF2 ions at 40 keV energy
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(l) S/D dopant activation at 1050o C
(m) Oxide passivation layer deposition by the HDPCVD process
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(n) The formation of contact hole openings and metal pads
Fig. 2-7 The process flow of proposed IPA Sol-Gel derived NC Flash memory cells