Thesis Organization

In Chapter 2, the system application scenario, specification and structure of the low-power 1.4-GHz transceiver are introduced, respectively. In Section 2.1, the system application scenario will be introduced. The system specifications of the transceiver are defined in Section 2.2. The proposed system structure for these specifications especially for low power consumption is presented in Section 2.3.

Fig. 1.6 The proposed equivalent model of the transformer in reference [14]

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In Chapter 3, the designed structure of the low-power 1.4-GHz receiver and the circuit design of each block are introduced, respectively. Section 3.1 shows the designed structure of the receiver. A LNA in common-source cascade topology with inductive degeneration is introduced in Section 3.2. Section 3.3 presents the double balance down-conversion mixer. The analysis and design of the transformer resonant operation are introduced in Section 3.4. Section 3.5 gives a summary of the designed receiver.

In Chapter 4, the designed structure of the low-power 1.4-GHz transmitter and the circuit design of each block are introduced, respectively. Section 4.1 shows the designed structure of the transmitter. A passive up-conversion mixer is introduced in Section 4.2. Section 4.3 presents a class-A power amplifier. An inverter-based pre-amplifier is introduced in Section 4.4. Section 4.5 gives a summary of the design transmitter.

In Chapter 5, the chip implementation, measurement setups, and measurement results are introduced. Section 5.1 presents the chip implementation. The chip measurement setups and measurement results are putted in Section 5.2.

In Chapter 6, a conclusion and the future work are introduced. Section 6.1 gives a conclusion of this designed transceiver. Section 6.2 presents the future work of this topic.

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Chapter 2

System Application Scenario, Specification and Architecture

2.1 System Application Scenario

The system application scenario of the WBAN which this transceiver applies to is as showed in Fig. 2.1.

Telemedical centers use this WBAN system to continuously monitor the health condition of patients, especially disabled old persons. This WBAN are composed of wireless sensor nodes, electrocardiogram sensors (ECG sensors), cell phone system, and the expert system algorithm. The wireless sensor nodes are installed at the upper bodies of human beings. The sensor nodes sense the heartbeat, and communicate the electrocardiogram data to a center node by electrical signals. The center node collects all electrocardiogram data and updates it to telemedical centers through cell phone system. The expert system algorithm, which is installed in the cell phone, determines that the current electrocardiogram data is regular or not, and gives an alarm to telemedical centers or hospitals when the heat beat is not regular.

Fig. 2.1 System application scenario of the wireless body area network

Telehealthcare Management Platform

Internet

Hospital GSM Network

SMS / Voice

Telehealthcare Center GPS

WiBoC CPN

WiBoC WSN

Internet

8

Telemedical centers use this system to continuously monitor the current electrocardiogram of patients and make appropriate medical treatments earlier for emergencies.

Fig. 2.2 shows the structure of the wireless sensor node this low-power transceiver applies to. The wireless sensor node is composed of an antenna, RF circuits, analog baseband circuits, digital baseband circuits, a micro controller unit (MCU), memories, and an ECG Sensor.

This thesis focuses on the implementation of the RF transceiver front-end circuits of the wireless sensor nodes, as showed in Fig. 2.3. This transceiver consists of an up-conversion mixer, a PA, a LNA, and I/Q down-conversion mixer. All circuits must be integrated and realized on a single chip of 90-nm CMOS process.

All circuits except PA operate under 1-V VDD. In the transmitter, the up-conversion mixer transfers the analog baseband signal to RF signal, and the PA provides the RF signal with power gain and outputs it to the antenna. In the receiver, the LNA amplifies the RF signal, and the I/Q down-conversion mixers transfer the RF signal to analog baseband signal. Both the transmitter and the receiver are

RX Memory Buffer ADC ECG Sensor

Wireless Sensor Node

This Work

Fig. 2.2 Structure of the wireless sensor node

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2.2 System Specification

For the WSN application, power consumption is the specification with top priority. The power consumption specification of the transmitter and the receiver are 25-mW and 6-mW, respectively. The frequency channel is 1395-1400 MHz, which is one band of Wireless Medical Telemetry Service.

In this WBAN system application, the peak output power of the transmitter is 4-dBm, and the average output power of the transmitter is -3 dBm with 7 dB peak to average power ratio. According to the 4 dBm transmitter peak output power and 10% efficiency specification, the power consumption specification of the transmitter is 25-mW.

In this WBAN system application, the conversion gain specification of the receiver is 20 dB. System designer limits the receiver NF referred to the antenna

Down-Conversion LNA Mixer Up-Conversion PA

Mixer

Quadrature LO

Analog Baseband Input

1.4-GHz RF Output

Analog Baseband Output

1.4-GHz RF Input 1.4-GHz ANT

Low-Power 1.4-GHz Transmitter

Low-Power 1.4-GHz Receiver

Chip

Low-Power 1.4-GHz Transceiver

Fig. 2.3 RF transceiver front-end circuit blocks of the wireless sensor node

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terminal to 7 dB with 6-mW power consumption. The linearity specification of the receiver is -25 dBm P1dB. Table 2.1 and Table 2.2 make the summary of the specifications of the transmitter and the receiver, respectively.

2.3 Proposed System Structure

Fig. 2.4 shows the proposed system structure of the low-power 1.4-GHz transceiver.

In this receiver, the first stage is a LNA which amplifies the 1.4-GHz RF signal and compresses noise of the receiver train, the second stage is a 3-terminal transformer as a passive balun which transfers the single-end signal to differential form without

LNA

Fig. 2.4 Proposed system structure of the low-power 1.4-GHz transceiver Table 2.1 Transmitter specification Table 2.2 Receiver specification

Peak Transmit Power 4 dBm Conversion Gain 20 dB Average Transmit Power -3 dBm Noise Figure 7 dB DC Power Consumption 25mW DC Power Consumption 6 mW

Efficiency 10% P1dB -25 dBm

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power consumption, and the final stage is I/Q down-conversion mixers which transfer the 1.4-GHz RF signal to the analog baseband signal with I/Q output. In the transmitter, the first stage is an up-conversion mixer which transfer the analog baseband signal to the 1.4-GHz RF signal, the second stage is a pre-amplifier which provides the RF signal with efficient voltage gain in order to give enough voltage signal swing to the PA stage, and the final stage is a PA, which provides the RF signal with power gain and outputs it to the antenna. Both the transmitter and the receiver take the off chip quadrature local oscillation (LO) signal source.

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Chapter 3 Receiver Circuit Design

3.1 Structure of the Low-Power 1.4-GHz Receiver

The designed structure of the low-power 1.4-GHz direct-conversion receiver is showed in Fig. 3.1, which is composed of a common source cascade LNA with inductive degeneration, a 3-terminal transformer as a passive balun, and I/Q double balance down-conversion mixers. The LNA completes both the input impedance matching and the noise matching at 1.4-GHz, amplifies the received RF signal and transfers it to current form. The 3-terminal transformer transfers the single-end RF current signal to differential form without DC power consumption, and passes it from the LNA to the mixers in the highest efficiency by the resonator coupling operation. The double balance down-conversion mixers, which are appropriately designed in the trade-off between the conversion gain and the linearity, transfer the 1.4-GHz RF signal to the analog baseband signal with I/Q output.

On Chip

Fig. 3.1 Schematic of the receiver core circuit

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3.2 Low Noise Amplifier

The first stage of the receiver is a common source cascode amplifier with inductive degeneration. This LNA is composed of a common source amplifier M1, two inductances L_g and L_s, an external capacitor C_ex, and a common gate amplifier

M

2, as shown in Fig. 3-1. This type of amplifier has good gain efficiency which is an appropriate choice for the low-power application. The source degeneration inductance Ls is in order to generate a real term in the input impedance of the LNA, and we can choose appropriate value of L_s to generate a 50-Ω real term in the input impedance. The gate inductance Lg is used to set the resonant frequency after Ls is chosen in order to produce a pure 50-Ω input impedance matching in which the imaginary term is equal to zero. The external capacitor Cex is used to compensate the small parasitic capacitor between gate and source of M₁ in order to help L_g and L_s to simultaneously complete the input impedance matching and the noise matching at 1.4-GHz. This type of input impedance matching is a narrow band input matching, as shown in Fig. 3.2.

freq (500.0MHz to 2.000GHz)

S (1 ,1 )

Readout

M1

co nj( S op t)

Readout

M2

M1indep(M1)=

plot_vs(S(1,1), freq)=0.086 / -117.853 impedance = Z0 * (0.913 - j0.139)

1.400E9 M2indep(M2)=

plot_vs(conj(Sopt), freq)=0.106 / -12.166 impedance = Z0 * (1.231 - j0.056)

1.400E9

M1 & M2 @ 1.4 GHz

Fig. 3.2 Smith chart of LNA input matching

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However, the wireless sensor network application is also a narrow band application.

The operation frequency is from 1.395 to 1.400-GHz, so the narrow band input impedance matching is not a limitation. The common gate amplifier M₂ provides low impedance at the output node of common source amplifier M1, and leads to negligible Miller effect of M₁. M₂ also provides high impedance at the output node of M2 itself, which leads the LNA high gain in high frequency. Two inductances Lg

and L_s, and capacitor C_ex complete both input impedance matching and noise matching [6]. The input impedance and noise factor of this type of LNA can be expressed as:

(3.1) (3.2) where represents the parasitic capacitor between gate and source of M1, is the transconductance of M₁,

is the series resistance of L

_g, is the source resistance, is a bias-dependent factor, is the zero-bias drain conductance of transistor M₁. By eq. (3.1) and (3.2), we can design appropriate values of V_gs, L_g, C_ex,

L

s, and the transistor sizes of M1 and M2 for specifications of the receiver. Here we choose V_gs=0.43 V, L_g=7.6 nH with Q = 5.7, C_ex=1.6 pF, L_s=0.7 nH, ,

and for the optimum noise matching and 50-Ω input impedance matching in 4.5 mW DC power consumption. It can achieve simulated performance of -21.8 dB input insertion loss, 2.5 dB noise figure.

3.3 Down-Conversion Mixer Design

The third stage of the receiver is I/Q double balance down-conversion mixers. In the system application, the receiver has to have I/Q analog based band output, so the

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I/Q double balance mixers are used here. The I/Q double balance mixers are composed of eight pMOS transistors M3-10 as the switching stage and four resistors R_load1-4 as loads, as shown in Fig. 3-1. The double balance mixer has advantages of better port-to-port isolation and less even-order distortion [2]. The letter is especially critical in the direct-down-conversion mixer.

A common mixer such as Gilbert Cell is composed of a transconductance stage, which transfers input RF voltage signal to current form, a current switching stage, which uses local oscillation signal to switching RF current signal and transfers it to analog baseband signal, and a load resistor stage. In this receiver, the LNA and the transconductance stage of mixers are combined together in order to save the DC power consumption of the transconductance stage of the mixers. The LNA amplifies the received RF signal and transfers the voltage signal to current form, and the 3-terminal transformer transfer the single-end RF current signal to differential form and passes it to the switching stage of the mixers. Finally, the current switching stage uses local oscillation signal to switch the RF current signal, and transfers it to the analog baseband signal.

pMOS transistors are employed in the switching stage of mixers, because pMOS transistor has better flicker noise performance as compare to nMOS transistor [6]. The ideal switching stage has that only one transistor of the switching pair is turned ON at the same time, and the current is equal to zero when the switch is turned OFF.

Therefore, to make the switching stage more ideal, the transistors with bigger size are used, and the DC gate voltage bias is set to near threshold voltage. The load resistors are related to conversion gain and linearity of the mixers, as shown in Fig. 3.3.

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In Fig. 3.3, the maximal conversion gain of the receiver is approximately proportional to the value of the load resistors. The bigger load resistors are used, the maximal conversion gain is higher, and the LO power of the maximal conversion gain is lower.

However, the linearity of the receiver becomes worse with the increasing of the conversion gain. In the system application, there is a linearity specification of the receiver is -25 dBm P1dB. The appropriate value of the load resistors can be found by trade-off between the linearity and the conversion gain of the receiver.

In the design of the mixers, each value of each component can be defined by following above design considerations. The transistor sizes of M_3-10 is

, the DC gate voltage bias of the switching stage is 0.2-V VSG, and the load resistors R_load1-4 are 800 Ω. The total DC power consumption of two double balance mixers is 0.5-mW. The LO power of maximal conversion of the designed receiver is -5 dBm, which is lower than the LO power of the common receivers.

-15 -12 -9 -6 -3 0 3

4 8 12 16 20 24

Receiver Voltage Conversion Gain (dB)

LO Power (dBm)

RIoad=1600 Ω

R

Ioad

=1200 Ω R

Ioad

=800 Ω

R

Ioad

=400 Ω

Fig. 3.3 Receiver voltage conversion gain versus LO power

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3.4 Transformer Design

Between the LNA and the mixers, there is a 3-terminal transformer, as shown in Fig. 3.4. The 3-terminal transformer needs to be carefully designed to transfer the single-end RF current signal to differential form with the maximal current gain.

The 3-terminal transformer is composed of two coupled resonators, which is called resonator coupling network (RCN). Under the critical resonance condition, the RCN can provide the maximal current gain at resonance frequency, which is almost equivalent to an ideal transformer [6]. Fig. 3.5 (a) shows the transformer used in the receiver. It can be modeled into the resonator coupling network, as shown Fig. 3.5 (b).

In Fig. 3.5 (b), L₁ is the primary coil of the transformer, L₂ and L₃ are two secondary coils of the transformer with the same value, and M is the mutual inductance between primary and secondary coils. C₁ and L₁ form a resonator which connects to the output node of the LNA, and L2, C2, L3, and C3 form two resonators which connect to the

Fig. 3.5 (a) Designed 3-terminal transformer, (b) Resonator coupling network

LNA Down-conversion

Fig. 3.4 Block diagram of the receiver

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input nodes of the mixers. The whole receiver is modeled into the equivalent network, as shown in Fig. 3.6. In Fig. 3.6, RLNA and CLNA model the output impedance of the LNA, L₁ and C_p1 model the inductance and parasitic capacitor of the primary coil of the transformer, L2-3 and Cp2-p3 model the inductances and parasitic capacitors of the secondary coils of the transformer, and C_Mixer1-4 and R_Mixer1-4 model the input impedance of the mixers. The two parallel capacitors CLNA and Cp1 form the C1 of the RCN, and C_p2-p3 and C_Mixer1-4 form the C₂ of the RCN.

The transformer connects two identical parallel double balance mixers, so these two mixers can be basically simplified into a mixer with double size. Moreover, because the transformer is symmetric to the virtual ground of secondary coil, the RCN can be analyzed by the two-port network, as shown in Fig. 3.7. I_in represents the RF current signal from the LNA, C1 includes the parasitic capacitors of the LNA and the primary coil of the transformer and C₂ includes the parasitic capacitors of the mixers and the secondary coils of the transformer.

CLNA Cp1 L1

Fig. 3.6 Resonator coupling network

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The resonance frequencies of primary and secondary uncoupled resonators are defined as ω1 and ω2, and m is the ratio of these two resonance frequencies.

^(3.3)

The mutual inductance between the primary and secondary coils is M, and the coupling coefficient is defined as

k

^(3.4)

In the coupled network, the resonance frequencies would shift to other two frequencies, as shown in Fig. 3.8. These two resonance frequencies in coupled network can be expressed in term of m, k, and ω₂, as shown in eq. (3.5) and (3.6) [6].

(3.5)

(3.6) At these two resonance frequencies ωH and ωL, the transformer passes the RF current signal from the LNA to the mixers in highest efficiency. Either resonance frequency can be chosen as the operating frequency.

ω

₁

ω

₂

ω

_L

ω

_H

Fig. 3.8 Resonance frequencies of the RCN

C

₁

L

₁

-M L

₂

-M R

_LNA

I

_in

M C

₂

R

Mixer

Z

_in1

Z

_in2

Z

_in3

I

_out

Fig. 3.7 Two-port network of the RCN

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In the two-port analysis, the transfer function from I_in to I_out at the resonance frequency is derived as

where

(3.7) The k is the coupling coefficient between the primary coil and the secondary coils, and n is the ratio of the inductance of the primary coil to the inductance of one secondary coil. The k and n of the maximal current gain condition can be found by the partial differential equation of eq. (3.7) for k and n. These two partial differential equations are

(3.8) These two partial differential equations lead the result as

(3.9) Eq. (3.9) means the impedance matching between the LNA and the transformer. The impedance matching also happens at the interface between the transformer and the mixers. Under the critical coupling condition, the RF current signal is coupled from the LNA to the mixer in the highest efficiency. From eq. (3.7) and (3.9), the maximal current gain under the critical coupling condition is

(3.10) Eq. (3.10) means that the maximal current gain of the transformer is determined by

and . The RCN gets the same result of the maximal current gain like an ideal transformer as k and n are chosen appropriately. eq. (3.10) also means that the maximal current gain is higher with higher RLNA and lower RMixer. This result corresponds to the simple circuit theory. Current is injected from high impedance to

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low impedance. With the same voltage drop between the high impedance node and the low impedance node, more current is injected when the high-impedance is higher and the low-impedance is lower.

The higher impedance ratio of RLNA/RMixer is design to get the higher maximal current gain under the critical coupling condition. Under the condition of that all performances of the receiver meet all specifications, the output impedance of the LNA and the input impedance of the mixer are designed to as higher and as lower as possible, respectively. In this receiver, is designed to be 552 Ω and is designed to be 15 Ω. Therefore, maximal current gain

is equal to about 3. After getting the value of maximal current gain of the RCN, the corresponding ratio of and the ratio of need to be chosen to realize the transformer with the maximal current gain at 1.4 GHz. In the current gain contour plots mapping k and r of n=1~4, as shown in Fig. 3.8, there are two areas of maximal current gain when and in each contour plot, that represents two resonance frequencies of the RCN ω_H and ω_L. The maximal current gain of operates at ωH and the other one operates at ωL. The area of the maximal current gain at ω_L is bigger than the other one at ω_H, so the RCN is designed at ω_L can be more tolerant of the variation of r and k. Therefore, the RCN at ωL is easier to be realized and more tolerant of process variation.

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Here, n is chosen as 3. In Fig. 3.9 (c), the current gain degrades very little when k ranges from 0.4 to 0.6. The designed transformer is as shown in Fig. 3.10, in which W₁ = 8 μm, W₂ = 10 μm, OD = 400 μm. Table 3.1 shows each parameter of the RCN.

Because the designed RCN needs bigger capacitances C1 and C2 which are bigger than the total capacitance of the parasitic capacitances of the LNA and primary coils of the transformer and the parasitic capacitance of the secondary coils of the transformer and the mixers. Therefore, there are two additional capacitors C1’ and C2’

Table 3.1 The RCN realization

OD W2

Fig. 3.9 Current gain contour plots mapping k and r (a) n=1(b) n=2(c) n=3(d) n=4

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putted between the LNA and the transformer and between the transformer and the

putted between the LNA and the transformer and between the transformer and the

在文檔中 應用於無線感測網路之低功率1.4-GHz射頻前端接收器與傳送器電路設計 (頁 18-0)