In the chapter 2, the fundamental designs of front-end will be introduced.
In the chapter 3, the 8 GHz low power ultra-wideband active balun is presented in section 3.2. And the modified active balun, 0~10 GHz ultra wide-band low power tunable active balun for loading variation and process variation compensation is discussed in section 3.3.
In the chapter 4, the low voltage 0.2-mW CMOS mixer is presented in section 4.2.
And low voltage 2-mW 6~10.6-GHz ultra-wideband CMOS mixer with active balun is introduced in section 4.3.
In the chapter 5, to discuss the low-power front-end circuit design.
In the last chapter, the work is summarized and concluded.
Chapter 2
The Fundamental Designs of Front-End
The fundamental designs of the front-end architecture will be presented in this chapter. Section 2.1 gives the front-end architecture first. The design basic in LNA will be introduced in the section 2.3. The popular active balun at high frequency is discussed in section 2.4, and the end of this chapter will introduces the basic design of the mixer.
2.1 Front-End Architecture
In receiver architecture, input signals are translated into much lower frequencies by down-conversion mixer, and the active balun generates the differential output signals for double balance mixer from the signal input signal. Generally, the low noise amplifier is in the first stage for reducing noise from the active balun and the down-conversion mixer. A simple front-end architecture is shown in Fig. 2.1. I adopt the homodyne receiver due to the following reasons:
(1) The problem of image is removed due to ωIF= 0. Therefore no image filter is required, and the LNA need not drive a 50-Ω load.
(2) It is attractive for monolithic integration because this architecture needs less external components.
For the above reasons, this architecture is suitable for low-power and signal-chip design.
2.2 Low Noise Amplifier Basic
Low noise amplifier is the first gain stage in the receiver path so its noise figure directly adds to that of the system. Therefore, there are several common goals in the design of LNA. These include minimizing noise figure of the amplifier, providing enough gain with sufficient linearity and provide a stable 50Ω input impedance to terminate an unknown length of transmission line which delivers signal from antenna to the amplifier. Among LNA architectures, inductive source degeneration is the most popular method since it achieve noise and power matching simultaneously, as shown in Fig. 2.2. The following analysis is based on this architecture.
Balun Mixer LNA
+LO-Fig. 2.1 Front-End
Lg
Zin
M1
Ls
Fig. 2.2 Common-source input stage with inductive source degeneration
2.2.1 Low Noise Amplifier Architecture Analysis
As shown in (2-1), the input impedance is equal to the multiplication of cutoff frequency of the device and source inductor at resonant frequency. Therefore it can be set to 50Ω for input matching while resonant frequency is designed to be equal to the operating frequency.
According to prior introduction, the equivalent noise model of common-source LNA with inductive source degeneration can be expressed as Fig. 2.3, where Rl is the parasitic resistance of the inductor, Rg is the gate resistance of the device. Note that the overlap capacitance Cgd has also been neglected in the interest of simplicity. Then the noise figure can be obtained by computing the total output noise power and output noise power due to input source. To find the output noise, we first evaluate the transconductance of the input stage. With the output current proportional to the voltage on Cgs and noting that the input circuit takes the form of series-resonant network, the transconductance at the resonant frequency can be expressed as
s
Qin is the effective Q of the amplifier input circuit. So the output noise power density due to the source can be expressed as
)2
Furthermore, channel current noise of the device is the dominant noise contributor, and its noise power density associated with the correlated portion of the gate noise can be expressed as
Fig. 2.3 Equivalent noise model of Figure 2.2
(2-3)
(2-4)
(2-5)
2
The last noise term is the contribution of the uncorrelated portion of the gate noise, and its output noise power density can be express as
2
According to (2-3),(2-4),(2-5) and (2-8), the noise figure at the resonant frequency can be expressed as
)
From (2-11), we observe that χ includes the terms which are constant, proportional to QL, and proportional to QL2. It follows that (2-11) will contain terms which are proportional to QL as well as inversely proportional to QL. A minimum noise figure, therefore, exits for a particular QL.
(2-6)
2.2.2 Optimizations of Low Noise Amplifier Design Flow
The analysis of the previous section can now be drawn upon in designing the LNA.In order to pick the appropriate device size and bias point to optimize noise performance given specific objectives for gain and power dissipation, a simple second-order model of the MOSFET transconductance can be employed which accounts for high-field effects in short channel devices. Assuming that the drain current, Id, has the form
The power consumption of the LNA, therefore, can be expressed as
ρ
The noise figure can be expressed in terms of PD and Vgs. Two parameters linked to power dissipation need to be accounted for.
where
The noise figure of the LNA, therefore, can be expressed as
In general, there are two approaches to optimize noise figure. The first approach assumes a fixed transconductance, Gm. The second approach assumes fixed power consumption.
(1) Fixed Gm optimization: To fix the value of the transconductance, G m ,we need only assign a constant value to ρ. Onceρ is determined, the optimization of the noise figure can be obtained by (2-17):
From (2-13), we can obtain the optimal width to get the minimal noise figure for a given Gm under the assumption of matched input impedance. In this approach, the designer can achieve high gain and low noise performance by selecting the desired transconductance, but its disadvantage is that we must sacrifice the power consumption to achieve minimum noise figure.
(2) Fixed PD optimization: An alternative method of optimization fixes the power dissipation and adjusts device size and bias point to minimize the noise figure.
Once PD is determined, the optimization of the noise figure can be obtained by (2-19):
Then the optimum device size can be obtained to get the best noise performance for fixed power dissipation. In this approach, the designer can specify the power dissipation and find the optimal noise performance, but its disadvantage is that the
(2-17)
(2-18)
(2-19)
transconductance is held up by the optimal noise condition.
2.3 Design Basic in Active Baluns
Differential baluns (or phase splitters) are basic cells required in microwave components such as balanced mixers, multipliers, and phase shifters. An ideal differential phase splitter will generate a pair of differential signals which have balanced amplitude and phase (0 dB gain difference and 180°) from a single input.
In RFIC there are passive and active differential phase splitter or baluns. LC networks can be used for narrow-band passive baluns; microstriplines can be used for wide-band passive baluns. However, the spiral inductors, MIM capacitors, and microstriplines in RFIC are too expensive due to their larger physical size at lower microwave frequencies. There are three categories of active balun circuits normally employed in lower microwave frequencies for wireless communications: single FET circuits, common-gate common-source circuits and differential amplifier circuits.
Fig. 2.4 shows the single FET circuits as active balun. It is probably the simplest. At low frequency the small signal circuit of this active balun can ignores all parasitic effect. Under this condition, this circuit can produces a pair of differential output signals at the drain and source of the FET respectively. At higher frequency range, this circuit is limited by imbalances caused by the imbalances caused by parasitic capacitance of FET. The best result obtained from this type of the structure is
1dB and 176° at 950 MHz. To make it applicable at higher frequency, a sophisticated imbalance cancellation technique was used to improve the performance beyond 1 GHz. It had 1 dB amplitude difference and 172° pahse difference (-8° unbalance) from 700 MHz to 1.7 GHz. However, the tradeoff was the increase of circuit complexity, die area, and dc current. For accurate results beyond 2 GHz, the application of the signal FET circuit is questionable.
Fig.2.4 the single FET circuits as active balun
Vdd
RFin
Vo 1
Vo 2
R
LR
LR
INFig.2.5 shows the common-gate common-source (CGCS) circuit as active balun.
The common-gate common-source (CGCS) circuit provides equal amplitudes split with 180° phase difference. In this configuration, the ac coupling capacitance and bypass capacitance need to be adjusted separately to optimize at a specific frequency to achieve balanced differential signals. Therefore, this configuration is only good for narrow-band application are around 0.5-2 dB and 177-189° due to the process variation and asymmetric signal path.
The differential amplifier circuit is shown in Fig. 2.6. It is very popular to apply the differential amplifier as active balun at high frequency. Ideally, this circuit will provide equal amplitude (or gain) and 180° phase difference. However, due to the finite impedance at node “A” caused by strong parasitic at high frequency, the gain
Fig. 2.5 common-gate common-source (CGCS) circuit as active balun
VDD
RFin
Vo
1
Vo2
RL1
VDD RL2
and phase balance are poor.
An active device is often used as the current source. However, besides the finite impedance at node “A”, the voltage drop across the drain and source make it difficult to realize in low power supply circuit as required by the portable wireless applications (Vdd < 3V or even < 2V). According to simulation result, the output amplitude difference can be 2 dB or the phase difference can be poorer than 174°, within frequency range from dc to 6 GHz.
The active current source was replaced by an inductor to increase the impedance of S1 at high frequencies. When an ideal inductor with unlimited value (dc through and ac block) is used as the current source, excellent results can be obtained.
A
Vin
VDD
Vo1 Vo2
Fig. 2.6 Differential amplifier as active balun
However, this extra large ideal inductor is not viable to be realized on-chip due to large physical size. This circuit obtained 1dB gain difference and 175 ° phase difference at the specific frequency, at other frequencies, the gain and phase balance are poor. Therefore, it is only applicable for narrow-band applications.
2.3.1 Differential Amplifier with a Series LCR Feedback as Active Balun Analysis
Fig. 2.7 shows the differential amplifier with LCR feedback as active balun. It is most popular to apply this circuit as an active balun at high frequency. The feedback circuit consists of twisters R2 and RF, an inductor LF, and a capacitor CF.
Fig. 2.7 Differential amplifier with LCR feedback as active balun
CF
LF
RF
Vin
VDD
Vo1 Vo2
R2 R1
M1 M2
This feedback circuit will helpo res to reduce the Vo1 power and increase the Vo2 power. The resister R2 plays two roles: it keeps dc bias of M2 the same as T1, at the same time it senses the signal fed back from the drain of M1. CF provides a dc blocking function so that the feedback circuit will not shift dc bias of M2. At the application specific frequency ω, if CF and LF values are chosen in such a way that they follow the equation of
the phase delay from the drain of M1 to the gate of M2 is zero. This is because that
the series LC circuit gives a zero reactance AC equivalent circuit will reduce to RF, R2 and z2, where z2 is M2’s gate input impedance at ω. AC signals on the gate of M2 (vG2) and on the drain of M1 (vD1) have the following relationship:
From (2-2), vG2 can be changed by adjusting RF and R2.
The amplitude tuning of the phase splitter will be taken care of by the ratio of RF and R2. The phase unbalance can be adjusted by proper choice of reactance of the feedback circuit. The reactance XF is given as
.
XF can be positive (inductive), zero (resistive), or negative (capacitive) by adjusting LF and CF values at the application frequency Ω. Thus, the phase unbalance at output
2
ports can be effectively cancelled. From (2-22), it is seen that the phase tuning can be done in a linear mode by changing LF and keeping CF constant since XF LF, or in nonlinear mode by changing CF and keeping LF constant, or by changing both. The Q factor is not important in this design because the lossy part of the inductor can be treated as part of RF in the feedback circuit. In RFIC design, the actual choice of LF and CF depends on the consideration of area consumption, phase tuning sensitivity, and process tolerances.
But like the conventional differential amplifier as active balun, the differential amplifier with RLC feedback as active balun needs twice DC current paths. It consumes twice DC power consumptions. High power consumption limits the value of this circuit. And RLC feedback is frequency depend to limit the bandwidth of this active balun.
2.5 Down-Conversion Mixer Basic
The purpose of the mixer is to convert a signal from one frequency to another. In a receiver, this conversion is from radio frequency to intermediate frequency or zero-IF.
Mixing requires a circuit with a nonlinear transfer function, since nonlinearity is fundamentally necessary to generate new frequencies. Fig. 2.8 shows a simplified CMOS Gillbert cell mixer, which is composed of transconductance stage and switching stage.
∝
The RF input must be linear, or adjacent channels could intermodulate and interfere with the desired channel. And the third-order intermodulation term from the two other signals will be directly on the top of the desired signal. The LO input need not be linear, since the LO is clean and of known amplitude. In fact, the LO input is usually designed to switch the upper quad so that for half the cycle M3 and M6 are on and taking all current to output loading. For the other half of the LO cycle, M3 and M6 are off and M4 and M5 are on. This stage will be, therefore, like switch to mixing RF signal to IF signal.
RL
+ IF
-M1 M2
RF +
M3 M4 M5 M6
LO+
VDD
LO-LO+
RL
RF
-Fig. 2.8 Simplified CMOS Gilbert Cell mixer
2.5.1 Conversion Gain
The gain of mixers must be carefully defined to avoid confusion. The voltage conversion gain of a mixer is defined as the ratio of the rms voltage of the IF signal and rms voltage of the RF signal. Note that the frequencies of these two signals are different. The power conversion gain of a mixer is defined as the IF power delivered to the load divided by the available RF power from the source. If the impedances are both matched to 50Ω , then the voltage conversion gain and power conversion gain of the mixer are equal when they are expressed in decibels.
Now, we assume that M3-M6 work like an ideal switch, and the conversion transconductance of the mixer can be expressed as
m
c g
G π
= 2
where gm is the transconductance of M1 and M2, and 2/π is produced by switching stage.
2.5.2 Switching Stage
For small LO amplitude, the amplitude of the output depends on the amplitude of the LO signal. Thus, gain is larger for larger LO amplitude. For large LO signals, the upper quad switches and no further increase occur. Thus, at this point, there is no longer any sensitivity to LO amplitude. Besides, if upper quad transistors are alternately switched between completely off and fully on, the noise will be minimized.
Since upper transistor contributes no noise when it is fully off, and when fully on, the upper transistor behaves like a cascade transistor which does not contribute significantly to noise.
The large LO signal is required to let upper quad transistors achieve complete switching. But if the LO voltage is made too large, a lot of current has to be moved
(2-23)
into and out of the transistors during transitions. This can lead to spikes in the signals and can actually reduce the switching speed and cause an increase in LO feed-through.
Thus, too large a signal can be just as bad as too small a signal.
2.5.3 Mixer Noise
Noise figure for a mixer is defined as
In general, the noise figure of the mixer is divided to two categories, single-sideband (SSB) noise figure and double-sideband (DSB) noise figure. The difference between the two definition is the value of the denominator in (2-24). In the case of SSB noise figure, only the noise at the output frequency due to the source that originated at the RF frequency is considered, and it is usually used in heterodyne systems. In the case of DSB noise figure, all the noise at the output frequency due to the source is considered (noise of the source at input and image frequencies), and it is usually used in homodyne system.
Because of the added complexity and the presence of noise that is frequency translated, mixers tend to be much noisier than LNAs. In generally, mixers have three frequency bands where noise is important:
(1) Noise already presents at the IF: The transistors and resistors in the circuit will generate noise at the IF. Some of this noise will make it to the output and corrupt the signal.
(2) Noise at the RF and image frequency: The noise presents at the RF and image frequency will be mixed down to the IF.
(3) Noise at multiples of the LO frequencies: Any noise that is near a multiple of the LO frequency can also be mixed down to the IF, just like the noise at the RF.
noise factor = total output noise power at the IF
output noise power at IF due to input source (2-24)
Besides, the flicker noise will become more important in the homodyne receiver. In the design of the direct down-conversion mixer, how to reduce the flicker noise of upper quad transistors is the important thing. This noise can be reduced by increasing the device size for a given gm.
2.5.4 Port-to-Port Isolation
The isolation between each two ports of a mixer is critical. The LO-RF feed-through results in LO leakage to the LNA and eventually the antenna, whereas the RF-LO feed-through allows strong interferers in the RF path to interact with the local oscillator driving the mixer. The LO-IF feed-through is important because if substantial LO signal exists at the IF output even after low-pass filtering, then the following stage may be desensitized. Fortunately, this feed-through can be reduced largely be used the double-balanced architecture. Finally, the RF-IF isolation determines what fraction of the signal in the RF path directly appears in the IF, a critical issue with respect to the even-order distortion problem in homodyne receivers.
The required isolation levels greatly depend on the environment in which the mixer is employed. If the isolation provided by the mixer is inadequate, the preceding or following circuits may be modified to remedy the problem.
Chapter 3
Low Power Ultra-Wideband Active Balun
3.1 Introduction
New low-power CMOS active baluns are designed for ultra-wideband applications, using a pair of common-source NMOS and common-gate PMOS transistors.
This chapter will be divided into two sections. Section 3.2 addresses the new architecture of 8 GHz low power ultra-wideband active balun. Section 3.3 delineates the improved low power ultra-wideband active balun with tunable ability for process variation.
3.2 Low Power Ultra-Wideband Active Balun
3.2.1 8 GHz Low Power Ultra-Wideband Active Balun
Balun circuits are the critical block required in RF and microwave circuits
Balun circuits are the critical block required in RF and microwave circuits