Chapter 1 Introduction
1.3 Thesis Organization
This thesis describes a wide dynamic range, digital control built in chip, and high fill factor CMOS image sensor with configuration characteristics for biomedical subject information signals. Chapter 2 gives a fundamental concepts and comparisons between CMOS and CCD image sensors. A brief introduction and performance analysis on biomedical detection chip are also included. Chapter 3 introduces a wide dynamic range biomedical CMOS image sensor. It comprises the architecture and the simulated results. Chapter 4 states some necessary considerations of the biomedical CMOS image sensor’s layout, and the comparison with other papers and test platform are presented as well. Chapter 5 reports on the conclusions and future work.
Chapter 2
Theoretical Background and Literature Review
In this chapter, the theories and relevant research studies in CMOS image sensor are reviewed and discussed. The theoretical background for using CMOS image sensor is described in Section 2.1. In Section 2.2, the particular application on chip image detection for biotechnology. Finally, a summary is given in Section 2.3.
2.1 Theoretical Background of CMOS Image Sensor
The fundamental element of CMOS image sensors is described [4]. First, the fundamental of image sensor is explained. The section will focus on discussing knowledge of CMOS image sensor. Theoretical background of image sensor, on the other hand, will be brought up in the subsequent sections. The circuit of active pixel sensor (APS) is an important front end interface in image sensor. PN-junction is frequently used in constructing photodiode structure and hence the basic characteristics of pn-junction photodiodes are further explicated here in detail. The image quality of CMOS image sensor is determined by the following features: the noise model analysis, dynamic range, sensitivity of the sensor, and fill factor of the APS.
2.1.1 Fundamental of Image Sensor
The image sensor includes CMOS image sensors and charge coupled device (CCD) image sensors. CMOS image sensor has been applied extensively across different kinds of technology products and now begun to share the market with CCD image sensor which has dominated the field of imaging sensors for a long time.
CMOS image sensors are now widely used not only in the 3C consumer products, such as cell phone cameras, digital still cameras, video cameras, and game boxes, but also in automotive products, park assist, automobiles, surveillance, security, robot vision, etc. Recently, further applications of CMOS image sensors have been developed for biotechnology use. Many of these applications require important performances such as wide dynamic range, high speed, and high sensitivity, while others need some other untouched functions. When CMOS image sensors are compared to CCD image sensor, the fabrication process technologies of CCD image sensors have been developed only for CCD image sensors themselves. Those of CMOS image sensors were originally designed for standard mixed signal processes.
There are two main differences between the architectures of CCD and CMOS sensors, the signal transferring and the signal readout method. Fig. 2.1 illustrates the structures of CCD and CMOS image sensors.
Fig. 2.1 The structures of CCD image sensor and CMOS image sensor. [4]
The contrast between CCD and CMOS image sensors summarizes in Table 1 including sensitivity of the sensors, power consumption, integrated with system on chip easily, cost, process technologies yield, and image quality.
Table 1 Contrast between CCD and CMOS image sensors. [33]
2.1.2 Basic Pixel Structures
The active pixel of CMOS image sensor consists of a photodiode and a readout circuit. However, the pixel configurations for image application product should be as
simple as possible to achieve excellent fill-factor of a photodiode and a high-resolution pixel array. The basic pixel structure of 3T active pixel sensor (3T-APS) is shown in Fig. 2.2. In the 3T-APS structure has reset transistor, source follower transistor and row select transistor. The difficulties to suppress reset noise and the photo detection region simultaneously acts as a photo conversion region are several issues are the major concerns within this structure.
Fig. 2.2 Basic pixel structure of 3-T APS.
In a four transistors active pixel sensor (4T-APS), the photo detection and photo conversion regions are separated. Thus, the accumulated photo-generated carriers are transferred to a floating diffusion where the carriers are converted to a voltage. One transistor is added to transfer charge accumulated in the photo detection to the floating diffusion, making the total number of transistors in a pixel four, and is called transfer transistor. The basic pixel structure of 4T-APS is shown in Fig. 2.3.
Fig. 2.3 Basic pixel structure of 4-T APS.
The transfer transistor can reduce the fill factor in comparison with the 3T-APS. The structure has many advantages of high quantum efficiency, low dark current, low read noise, and higher image quality.
2.1.3 Image Sensor Characteristics
(1) Photodiode Structure
In CMOS image sensor, p substrate / n + junction photodiode pixels have always been popularly accepted [29] [30]. It can be incorporated into a CMOS process technology with relatively simple modifications. Therefore, the p substrate / n + junction photodiode pixel is still a cost-effective solution for low-cost image sensors and a small amount of CMOS image sensors. In the photodiode design, we will be discussed photodiode structure. When light is incident on photodiode, a part of the incident light is reflected while the rest is absorbed in the photodiode and produces
electron–hole pairs inside the photodiode, as shown in Fig. 2.4. Such electron–hole pairs are called photo-generated carriers. The amount of photo-generated carriers depends on the photodiode material.
Fig. 2.4 Photo carriers in the photodiode. [30]
The photodiode used in BIOCIS design is pn-junction photodiodes. Fig.2.5 illustrates the structures of photodiode. The surface n+ region is formed in a low-concentration epitaxial layer, and peripherals of the photodiode are isolated by p-substrate regions. Because the doping concentration of the epitaxial layer is very low, the depletion layer reaches the p-substrate edge. Fundamental problems with the p-substrate/n junction photodiode are dark current due to surface generation and thermal noise associated with the photodiode reset. The source–bulk junction of the reset transistor still causes thermal leakage.
Fig. 2.5 Symbol and structure of the photodiode. [30]
(2) Dynamic Range
The dynamic range (DR) is defined the terms of full-well capacity and noise floor. The full-well capacity is the number of charges that can be accumulated in the photodiode. The conversion gain is termed as the voltage change when one charge is accumulated in the photodiode. The full-well capacity increases as the photodiode junction capacitance CPD increases, while the conversion gain, which is a measure of the increase of the photodiode voltage according to the amount of accumulated charge, is inversely proportional to CPD. It is represented by the equation below.
⎟⎟ ⎠
If the illumination is constant, then and are given by
q
where emax is the maximum signal charge that can be handled in the pixel, enoise is the minimum signal charge determined by the noise level. Therefore, the dynamic range is given by
In this term contains parasitic capacitance of p-n junction {
C
eq}, charge {q}, optical source {α
}, the Bolzmann constant {k}, the absolute temperature {T}, the bandwidth {BW}, and the output voltage of the APS swing.(3) Fill Factor
The fill factor is defined as the ratio of the photosensitive area inside a pixel to the pixel area. It considered in the design of high resolution and large array size CMOS image sensor. In the high fill factor status, it can lead to high spectrum sensitivity under the same pixel. The high fill factor is preferable for an image sensor.
However, the output signal degrades easily. It is represented by
100%
In the CMOS image sensor system, noise can be separated typically into two categories, random noise and pattern noise. Random noise varied temporally and is
not constant from frame to frame in the imager. The noise in the CMOS imager sensor is briefly discussed below.
(i) Random Noise
An imager with a constant scene should produce identical output from frame to frame. In practice, the output from a given pixel will vary over time due to thermal noise, charge trapping, and 1/f noise in the devices which comprise the imager.
Photonic shot noise is usually not included in this quantity, although this also contributes to noise at the output. Random noise is typically stated in terms of input-referred equivalent electrons, i.e., the root mean square output voltage noise divided by the conversion gain. Therefore, these components can be considered independent to each other and the variance of total random noise voltage can be written as
where Vphotonic, Vreset and Vdark denote photonic shot noise, reset noise, and dark current shot noise respectively. The dominate component depends on the operating condition of the image sensor.
(ii) Fixed-Pattern Noise
Fixed-pattern noise (FPN) is the fixed variation between pixel outputs under spatially uniform illumination. FPN is typically due to mask induced mismatches in device parameters such as threshold voltage, trap density, and parasitic capacitance.
FPN is usually a function of illumination, and can be written as the sum of a gain term and an offset term for an imager with a linear response characteristic. Offset FPN is constant over illumination, and gain FPN is proportional to illumination. FPN consists of components that describe variation between columns, and variation between pixels in a single column. Column FPN is the standard deviation of the column-average pixel output values in a time-average, uniformly illuminated frame. The fixed pattern noise can further be classified as column-to-column fixed pattern noise (CCFPN) and pixel-to-pixel fixed pattern noise (PPFPN). They can be calculated from the following equations:
where α2 and M denote the mathematical operation of taking the variance and average in the parenthesis.
(iii) Reset Noise
If the diffusion of the photodiode is reset through a transistor, this is equivalent to a capacitance being charged through the resistance of the transistor channel. The reset noise is generally called “KTC” noise. KTC noise can only be canceled by using the photo gate type APS. The reset noise can be expressed as
C
V
reset2= kT
(2.11)where k, T and C denote Boltzmann constant, temperature and capacitance of photodiode.
(iv) Shot Noise
Shot noise is another white noise that arises from the discrete nature of the electrons, for example, the random arrival of particles of charge. This is the result of the random generation of carriers such as thermal generation within a depletion region or the random generation of photon-electrons. The shot noise can be expressed as
R BW I
e 2
V
shot2= • • •
(2.12)where e, I, ,BW and R denote charge, average signal current ,noise bandwidth and resistor.
(v) Thermal Noise
Thermal noise is a white noise which means the noise power is constant over all frequencies. The thermal noise can be expressed as
R BW kT
4
V
thermal2= • •
(2.13)where k, T, ,BW and R denote Boltzmann constant, temperature ,noise bandwidth and resistor. In the Fig. 2.6 illustrates the models.
noiseless R
( )
f kTR VR2 =4( )
f kT R IR2 =4Fig. 2.6 (a) A resistor thermal noise model with voltage source and (b) A resistor thermal noise model with current source
For a MOSFET, due to the resistive channel of a MOS transistor in active region, the thermal noise can be represented as
m 2
d
4 kT g
I = • γ •
(2.14)where γ is a constant. γ =23 for the long channel transistors. The transistor thermal noise model is shown in Fig. 2.7.
( )
md
f kT g
I
2= 4 γ
Fig. 2.7 Transistor thermal noise model
(vi) Flicker Noise
The flicker noise occurs at any junction, including metal-to-metal, metal-to-semiconductor, semiconductor-to-semiconductor, and conductivity fluctuations. The flicker noise arises mainly in amplifier circuits where there are numerous such contacts. At low frequency, flicker noise can be the dominant component, but it drops below thermal noise at higher frequency. The flicker noise spectral density is inversely proportional to frequency, so it is also called “1/f noise”.
The phenomenon introduces the noise in the drain current and it can be modeled by a serial voltage source with the gate. Thus, larger device size introduces less flicker noise. It is common to use hundred or thousand micrometer square of devices in low-noise applications. The noise mode of transistor is shown in Fig. 2.8
( )
mFig. 2.8 Noise model, including flicker noise voltage source and thermal noise current source. the length of the transistor, and K is the process-dependent constant on the order of
F V2 10−25 .
Figure 2.9 shows the noise power spectrum. There is an intersection point between flicker noise and thermal noise. It is called “corner frequency” or “1/f noise corner”.
The total noise voltage of the transistor can be written as
Observed when the subject image is not illuminated, dark current is an undesirable current that is integrated as dark charge at a charge storage node inside a pixel. The amount of dark charge is proportional to the integration time and is represented as follow and is also a function of temperature. The dark charge reduces the imager’s useable dynamic range because the full well capacity is limited. It also changes the output level that corresponds to “dark” (no illumination). Therefore, the dark level should be clamped to provide a reference
q
Sensitivity determines the output signal of an image sensor illuminated by a certain light level within the specific integration time. The sensitivity is defined as the amount of photocurrent Iphoto produced when a unit of light power Plight is incident on a material. It is given by
The quantum efficiency is defined as the ratio of the number of generated photo carriers to the number of the input photons. In addition to enhancing sensitivity, the lens helps reduce crosstalk between pixels caused by minority carrier diffusion in CMOS image sensors. Conceptually, sensitivity is similar to spectral response in the sense that both parameters represent how the image sensors respond to light. In fact, sensitivity can be derived from spectral response if the spectral energy distribution of the illumination is known. For high sensitivity design, we can get high image quality.
(7) Signal to Noise (SNR)
The signal-to-noise ratio (SNR) is the ratio between the signal and the noise at a given input level. For SNR, the noise, nread, is the total temporal noise at the signal level Nsignal. When the read noise is dominant in the total noise, SNR is given by
⎟⎟⎠
This term is considered a measure for high sensitivity of the image sensor when the entire illumination range from dark to light is readied.
2.2 Literature Review for Wide Dynamic Range Image Sensor
In this section presents a wide dynamic range for CMOS image sensor. It has been an important issue on photography whether in traditional camera or digital camera, which the ability to transform illumination of maximum and minimum light.
On film’s angle, they define this ability in ISO grade. On digital camera’s angle, it can be define as dynamic range as (2.1).
Dynamic range of CMOS image sensor is especially the case, since their read noise and dark signal non-uniformity are typically larger than CCDs. For reference, standard CMOS image sensors have a dynamic range of 40–60 dB, CCDs around 60–70 dB, while the human eye exceeds 90 dB by some measures. In contrast, natural scenes often exhibit greater than 100 dB of dynamic range. To solve this problem, several dynamic range extension techniques such as well-capacity adjusting [26], multiple capture [27], time-to-saturation [28], and self-reset [29] have been proposed.
These techniques extend dynamic range at the high illumination by increasing. In multiple capture and time-to-saturation, this is achieved by adapting each pixel’s integration time to its photocurrent value, while in self-reset the effective well capacity is increased by “recycling” the well. To perform these functions, most of these schemes require per-pixel processing. We would introduce some of them on the following sections
2.2.1 Wide Intrascene Dynamic Range CMOS APS Using Dual Sampling
O. Y. Petch. et al. proposed a wide intrascene dynamic tange CMOS APS using dual sampling in 1997[25]. The architecture of the new wide intrascene dynamic range approach is shown in Fig. 2.10. In this architecture, a second column signal processing chain circuit has been added to the upper part of the sensor. As before, row is selected for readout and copied into the lower capacitor bank. Row is reset in the process. However, immediately following, row is selected and copied into the upper capacitor bank. Row is also reset as a consequence of being copied. Both capacitor banks are then scanned for readout. With the difference integration time, which T1,int is the longer one and T2,int is the shorter one, the dynamic range capability is extended by the factor (T1,int / T2,int). This architecture helps not only extend dynamic range and also help to raise the signal to noise ratio. However, the limitation of this architecture should save large of image data into memories; it would take much longer time and large amount of memories to processing. It is hard to be used on movement application like video stream.
Fig. 2.10 Scanning method of dual-sample, dual output imager architecture. [25]
2.2.2 A CMOS Image Sensor with wide dynamic range pixelsand column-parallel digital output
S. J. Decker. et al. proposed a CMOS imaging array with wide dynamic range pixels and column parallel digital output in 1998[21]. The principle of this architecture is to vary maximum value to save electron on photodiode. Except the weak illumination, it use lateral overflow to achieve non-linear wide dynamic range effect. Schematics for the pixel are shown in Fig. 2.11(a). The charge spill gate M3 increases sensitivity of the pixel by acting as a common gate amplifier that photocurrent flows into the low-impedance source node and is discharged into the high-impedance drain. The source follower Ml buffers the pixel from the large column line capacitance. The row-select device M2 connects the source follower output to the column line when the row is read out. The lateral overflow gate M4 increases pixel dynamic range. M4 gate voltage b(t) establishes a potential barrier to electron flow. As photo charge accumulates on the charge sense node, its charge level rises. If it exceeds the barrier level, the excess charge flows to the drain. Dynamic range is increased by decreasing b(t) over the integration period, as shown in Fig.
2.11(b). For low illumination, the integrated charge is unaffected by the barrier, so the pixel retains all of the photo charge. For high illumination, photocurrent spills into the drain between t1 and t2, and between t3 and t4. This reduces the final integrated charge, as shown by the difference between the dashed and solid lines. As illumination increases, a greater proportion of the photocurrent is diverted to the drain.
Depending on the size, number, and timing of the steps in b(t), any arbitrary compression characteristic (final integrated charge vs. illumination) is approximated.
(a) (b)
Fig. 2.11 (a) Capacitance modulation pixel circuit and (b) Signal value versus capacitance modulation micro-array scanner system. [21]
2.2.3 A CMOS image sensor with ultra wide dynamic range floating-point pixel-level
D. Yang. et al. proposed a CMOS image sensor with ultra wide dynamic range floating-point pixel-level in 1999[22].Ones method to embedded pixel level ADC and sampling at exponentially increasing exposure times, such as T, 2T, …, 2kT. Fig.
2.12(a) demonstrates the pixel circuit and column amplifier. To achieve acceptably small pixel size, each ADC, which is bit serial, is multiplexed among four neighboring pixels and generated by performing a set of comparisons between the pixel values and a monotonically increasing staircase RAMP signal. On the certain
2.12(a) demonstrates the pixel circuit and column amplifier. To achieve acceptably small pixel size, each ADC, which is bit serial, is multiplexed among four neighboring pixels and generated by performing a set of comparisons between the pixel values and a monotonically increasing staircase RAMP signal. On the certain