.MODEL TINY ;select tiny model 0000 .CODE ;start code segment
.STARTUP ;start program 0100 B0 48 MOV AL,48H ;load test data 0102 B4 00 MOV AH,0 ;clear AH 0104 D4 0A AAM ;convert to BCD 0106 05 3030 ADD AX,3030H ;convert to ASCII
0109 8A D4 MOV DL,AH ;display most-significant digit 010B B4 02 MOV AH,2
010D 50 PUSH AX 010E CD 21 INT 21H 0110 58 POP AX
0111 8A D0 MOV DL,AL ;display least-significant digit 0113 CD 21 INT 21H
.EXIT ;exit to DOS END
AAS Instruction. Like other ASCII adjust instructions, AAS adjusts the AX register after an ASCII subtraction. For example, suppose that 35H subtracts from 39H. The result will be 04H, which requires no correction. Here, AAS will modify neither AH nor AL. On the other hand, if 38H is subtracted from 37H, then AL will equal 09H and the number in AH will decrement by 1.
This decrement allows multiple-digit ASCII numbers to be subtracted from each other.
5-4 BASIC LOGIC INSTRUCTIONS
The basic logic instructions include AND, OR, Exclusive-OR, and NOT. Another logic instruc-tion is TEST, which is explained in this secinstruc-tion of the text because the operainstruc-tion of the TEST instruction is a special form of the AND instruction. Also explained is the NEG instruction, which is similar to the NOT instruction.
Logic operations provide binary bit control in low-level software. The logic instructions allow bits to be set, cleared, or complemented. Low-level software appears in machine language or assembly language form and often controls the I/O devices in a system. All logic instructions affect the flag bits. Logic operations always clear the carry and overflow flags, while the other flags change to reflect the condition of the result.
When binary data are manipulated in a register or a memory location, the rightmost bit position is always numbered bit 0. Bit position numbers increase from bit 0 toward the left, to bit 7 for a byte, and to bit 15 for a word. A doubleword (32 bits) uses bit position 31 as its leftmost bit and a quadword (64-bits) uses bit position 63 as it leftmost bit.
AND
The AND operation performs logical multiplication, as illustrated by the truth table in Figure 5–3. Here, two bits, A and B, are ANDed to produce the result X. As indicated by the truth table, X is a logic 1 only when both A and B are logic 1s. For all other input combinations of A and B, X is a logic 0. It is important to remember that 0 AND anything is always 0, and 1 AND 1 is always 1.
x x x x x x x x Unknown number
• 0 0 0 0 1 1 1 1 Mask 0 0 0 0 x x x x Result FIGURE 5–4 The operation
of the AND function showing how bits of a number are cleared to zero. and (b) the logic symbol of an AND gate.
The AND instruction can replace discrete AND gates if the speed required is not too great, although this is normally reserved for embedded control applications. (Note that Intel has released the 80386EX embedded controller, which embodies the basic structure of the personal computer system.) With the 8086 microprocessor, the AND instruction often executes in about a microsecond. With newer versions, the execution speed is greatly increased. Take the 3.0 GHz Pentium with its clock time of 1/3 ns that executes up to three instruction per clock (1/9 ns per AND operation). If the circuit that the AND instruction replaces operates at a much slower speed than the microprocessor, the AND instruction is a logical replacement. This replacement can save a considerable amount of money. A single AND gate integrated circuit (74HCT08) costs approximately 40¢, while it costs less than 1/100¢ to store the AND instruction in read-only memory. Note that a logic circuit replacement such as this only appears in control systems based on microprocessors and does not generally find application in the personal computer.
The AND operation clears bits of a binary number. The task of clearing a bit in a binary number is called masking. Figure 5–4 illustrates the process of masking. Notice that the left-most 4 bits clear to 0 because 0 AND anything is 0. The bit positions that AND with 1s do not change. This occurs because if a 1 ANDs with a 1, a 1 results; if a 1 ANDs with a 0, a 0 results.
The AND instruction uses any addressing mode except memory-to-memory and segment register addressing. Table 5–16 lists some AND instructions and comments about their operations.
An ASCII-coded number can be converted to BCD by using the AND instruction to mask off the leftmost four binary bit positions. This converts the ASCII 30H to 39H to 0–9. Example 5–25 shows a short program that converts the ASCII contents of BX into BCD. The AND instruction in this example converts two digits from ASCII to BCD simultaneously.
EXAMPLE 5–25
0000 BB 3135 MOV BX,3135H ;load ASCII 0003 81 E3 0F0F AND BX,0F0FH ;mask BX
OR
The OR operation performs logical addition and is often called the Inclusive-OR function. The OR function generates a logic 1 output if any inputs are 1. A 0 appears at the output only when all inputs are 0. The truth table for the OR function appears in Figure 5–5. Here, the inputs A and
TABLE 5–16 Example AND instructions.
Assembly Language Operation
AND AL,BL AL = AL and BL
AND CX,DX CX = CX and DX
AND ECX,EDI ECX = ECX and EDI
AND RDX,RBP RDX = RDX and RBP 164-bit mode2
AND CL,33H CL = CL and 33H
AND DI,4FFFH DI = DI and 4FFFH AND ESI,34H ESI = ESI and 34H
AND RAX,1 RAX = RAX and 1 164-bit mode2
AND AX,[DI] The word contents of the data segment memory location addressed by DI are ANDed with AX
AND ARRAY[SI],AL The byte contents of the data segment memory location addressed by ARRAY plus SI are ANDed with AL
AND [EAX],CL CL is ANDed with the byte contents of the data segment memory location addressed by ECX
table for the OR operation and (b) the logic symbol of an OR gate. how bits of a number are set to one.
B OR together to produce the X output. It is important to remember that 1 ORed with anything yields a 1.
In embedded controller applications, the OR instruction can also replace discrete OR gates. This results in considerable savings because a quad, two-input OR gate (74HCT32) costs about 40¢, while the OR instruction costs less than 1/100¢ to store in a read-only memory.
Figure 5–6 shows how the OR gate sets (1) any bit of a binary number. Here, an unknown number (XXXX XXXX) ORs with a 0000 1111 to produce a result of XXXX 1111. The right-most 4 bits set, while the leftright-most 4 bits remain unchanged. The OR operation sets any bit; the AND operation clears any bit.
The OR instruction uses any of the addressing modes allowed to any other instruction except segment register addressing. Table 5–17 illustrates several example OR instructions with comments about their operation.
TABLE 5–17 Example OR instructions.
Assembly Language Operation
OR AH,BL AL = AL or BL
OR SI,DX SI = SI or DX
OR EAX,EBX EAX = EAX or EBX
OR R9,R10 R9 = R9 or R10 164-bit mode2
OR DH,0A3H DH = DH or 0A3H
OR SP,990DH SP = SP or 990DH
OR EBP,10 EBP = EBP or 10
OR RBP,1000H RBP = RBP or 1000H 164-bit mode2
OR DX,[BX] DX is ORed with the word contents of data segment memory location addressed by BX
OR DATES[DI + 2],AL The byte contents of the data segment memory location addressed by DI plus 2 are ORed with AL
Suppose that two BCD numbers are multiplied and adjusted with the AAM instruction.
The result appears in AX as a two-digit unpacked BCD number. Example 5–26 illustrates this multiplication and shows how to change the result into a two-digit ASCII-coded number using the OR instruction. Here, OR AX,3030H converts the 0305H found in AX to 3335H. The OR operation can be replaced with an ADD AX,3030H to obtain the same results.
EXAMPLE 5–26
0000 B0 05 MOV AL,5 ;load data 0002 B3 07 MOV BL,7
0004 F6 E3 MUL BL
0006 D4 0A AAM ;adjust
0008 0D 3030 OR AX,3030H ;convert to ASCII
Exclusive-OR
The Exclusive-OR instruction (XOR) differs from Inclusive-OR (OR). The difference is that a 1,1 condition of the OR function produces a 1; the 1,1 condition of the Exclusive-OR operation produces a 0. The Exclusive-OR operation excludes this condition; the Inclusive-OR includes it.
Figure 5–7 shows the truth table of the Exclusive-OR function. (Compare this with Figure 5–5 to appreciate the difference between these two OR functions.) If the inputs of the
0 0 1 1
0 1 0 1
0 1 1 0
A B T
(a) (b)
A
B T
FIGURE 5–7 (a) The truth table for the Exclusive-OR operation and (b) the logic symbol of an Exclusive-OR gate.
TABLE 5–18 Example Exclusive-OR instructions.
Assembly Language Operation
XOR CH,DL CH = CH xor DL
XOR SI,BX SI = SI xor BX
XOR EBX,EDI EBX = EBX xor EDI
XOR RAX,RBX RAX = RAX xor RBX 164-bit mode2
XOR AH,0EEH AH = AH xor 0EEH
XOR DI,00DDH DI = DI xor 00DDH
XOR ESI,100 ESI = ESI xor 100
XOR R12,20 R12 = R12 xor 20 164-bit mode2
XOR DX,[SI] DX is Exclusive-ORed with the word contents of the data segment memory location addressed by SI
XOR DEAL[BP+2],AH AH is Exclusive-ORed with the byte contents of the stack segment memory location addressed by BP plus 2
x x x x x x x x Unknown number 0 0 0 0 1 1 1 1 Mask
x x x x x x x x Result +
FIGURE 5–8 The operation of the Exclusive-OR function showing how bits of a number are inverted.
Exclusive-OR function are both 0 or both 1, the output is 0. If the inputs are different, the out-put is 1. Because of this, the Exclusive-OR is sometimes called a comparator.
The XOR instruction uses any addressing mode except segment register addressing. Table 5–18 lists several Exclusive-OR instructions and their operations.
As with the AND and OR functions, Exclusive-OR can replace discrete logic circuitry in embedded applications. The 74HCT86 quad, two-input Exclusive-OR gate is replaced by one XOR instruction. The 74HCT86 costs about 40¢, whereas the instruction costs less than 1/100¢
to store in the memory. Replacing just one 74HCT86 saves a considerable amount of money, especially if many systems are built.
The Exclusive-OR instruction is useful if some bits of a register or memory location must be inverted. This instruction allows part of a number to be inverted or complemented. Figure 5–8 shows how just part of an unknown quantity can be inverted by XOR. Notice that when a 1 Exclusive-ORs with X, the result is X. If a 0 Exclusive-ORs with X, the result is X.
Suppose that the leftmost 10 bits of the BX register must be inverted without changing the rightmost 6 bits. The XOR BX,0FFC0H instruction accomplishes this task. The AND instruction clears (0) bits, the OR instruction sets (1) bits, and now the Exclusive-OR instruction inverts bits.
These three instructions allow a program to gain complete control over any bit stored in any reg-ister or memory location. This is ideal for control system applications in which equipment must be turned on (1), turned off (0), and toggled from on to off or off to on.
A common use for the Exclusive-OR instruction is to clear a register to zero. For example, the XOR CH,CH instruction clears register CH to 00H and requires 2 bytes of memory to store the instruction. Likewise, the MOV CH, 00H instruction also clears CH to 00H, but requires 3 bytes of memory. Because of this saving, the XOR instruction is often used to clear a register in place of a move immediate.
Example 5–27 shows a short sequence of instructions that clears bits 0 and 1 of CX, sets bits 9 and 10 of CX, and inverts bit 12 of CX. The OR instruction is used to set bits, the AND instruction is used to clear bits, and the XOR instruction inverts bits.
Assembly Language Operation TEST DL,DH DL is ANDed with DH TEST CX,BX CX is ANDed with BX TEST EDX,ECX EDX is ANDed with ECX
TEST RDX,R15 RDX is ANDed with R15 (64-bit mode) TEST AH,4 AH is ANDed with 4
TEST EAX,256 EAX is ANDed with 256 TABLE 5–19 Example
TEST instructions.
EXAMPLE 5–27
0000 81 C9 0600 OR CX,0600H ;set bits 9 and 10 0004 83 E1 FC AND CX,0FFFCH ;clear bits 0 and 1 0007 81 F1 1000 XOR CX,1000H ;invert bit 12