4.1 DC Stress under illumination
Fig.4.1.1 shows the Poly-Si TFTs with lightly doped drain (LDD) structure. We stressed the poly-Si TFT as VG=5V and VD=20V are applied. During the stress time of 1000sec, we measured the ID-VG in 1, 10, 100, and 1000sec, comparing the device behavior which was stressed in light and dark. Fig.4.1.2 shows the ID-VG of TFTs in linear region in dark. It could be observed that the on current decrease 74% after 1000sec dark stress. The decrease of the off current means the decrease of the mobility which owing to the tail states increase. The VTH
and S.S do not change after 1000sec stress, so the deep state does not increase. Fig.4.1.3 shows the ID-VG of TFTs in linear region in darkness. The on current decreases 60% after 1000sec light stress. Fig.4.1.4 shows the on current variation in dark stress and light stress.
We could observe that the on current decrease less as we measured the TFT under light stress than under dark stress.
Fig.4.1.5 shows our proposed model. In the dark, as high drain voltage and small gate voltage are applied, impact ionization is occurred in the junction between channel and drain due to the high electric field. The damage in the junction is remarkable when the high electric field is applied. Since the light emitted from back-light is mainly absorbed at the interface between the poly-Si layer and the buffer layer, plenty of electron-hole pairs are generated in the bottom of poly-Si film. As the electron-hole pairs are generated, the electric field in the junction of channel and drain decrease. So the on current decreases less when we measured the TFT under light stress than under dark stress.
In order to verify the model, we employed a Poly-Si TFT with lateral body thermal (LBT) as shown in Fig.4.1.6. The lateral body thermal is near the Drain thermal as the drain voltage is applied on the n+ region which near p+ region. The p+ region could sense hole current
which generated by impact ionization under high electric field of drain. The device behavior of LBT TFT is almost the same as conventional TFT.
From Fig.4.1.7, we measured the dependence of the body current (Ibody) and on the gate voltage (VG) of LBT poly-Si TFTs with the increasing brightness of back-light (2160, 3100, 4110, 5620 nit). As the brightness increases cause the electric field decreases, the holes which inject into p+ region decreases, so the body current decreases. It clarified that the electric field in the junction between channel and drain decrease when the device exposure to light.
4.2 AC Stress under illumination
Under AC stress, a pulse voltage is applied to the gate electrode, source and drain is grounded, as shown in Fig.4.2.1. Fig.4.2.2 shows the waveform of the AC signal. The basic parameters of AC signal consist of frequency (Freq.), signal high level (VG_high), signal low level (VG_low), high-level time (Thigh), low-level time (Tlow), rising time (Tr), and falling time (Tf). Tr (rising time) is the time that voltage signal rises from VG_high to VG_low, while Tf
(falling time) is the time that voltage signal falls from VG_high to VG_low. The total stress time is the summation of Thigh under the stress condition. The AC stress condition in the experiment is the gate voltage swing form VTH–15V to VTH+15V, frequency of 500kHz, Thigh and Tlow of both 1us, Tr and Tf of both 100ns, and the total stressing time of 2000sec.
During the stress time of 2000sec, we measured the ID-VG in 0, 1, 10, 100, 1000, and 2000sec, comparing the device behavior which was stressed in the light and dark. Fig.4.2.3 shows the ID-VG of TFTs in linear region in the dark. It could be observed that the on current decreases 66.3% after 2000sec stress under darkness. Fig.4.2.4 shows the ID-VG of TFTs in linear region under darkness. The on current decreases 74.1% after 2000sec stress under illumination. The ON-Current decrease less when we measured the TFT under darkness stress than illumination stress.
Fig.4.2.5-4.2.7 shows a schematic diagram for degradation model of the poly-Si TFTs under dynamic operation. When a high voltage is applied to the gate, the device turns on and operates in ON state. The electrons gather to form a channel, as shown in Fig.4.2.5. When the gate voltage drops, the electrons in the channel move rapidly to the source and drain shown in Fig.4.2.6. Some of the trapped electrons are exposed to the high electric field and grain energy from the field. Hot electrons are generated at this moment and form electron traps shown in Fig.4.2.7, and a density of state (DOS) in tail edge of poly-Si is increased by the hot electrons.
The impact ionization is dependent with current density and electric field.
Fig.4.2.8 shows the comparison of dark Stress and illumination stress. The carrier density is larger in illumination stress than dark stress, because light will induce electron-hole pairs. But the junction electric field is smaller in illumination stress than dark stress. In the experiment, we suggest that the key factor is current density. So the degradation is quite obvious when stress under illumination.
4.3 AC Stress of Split Shielding TFT under illumination
In this section, we changed device in the AC stress experiment. Fig.4.3.1 shows the top gate poly-Si TFT with a split metal shielding layer. The split located near Drain junction.
When the device exposure in illumination, the shielding layer will block the light beams.
Fig.4.2.2 shows the waveform of the AC signal. The AC stress condition is the same with previous experiment. The gate voltage swing form VTH–15V to VTH+15V, frequency of 500kHz, Thigh and Tlow of both 1us, Tr and Tf of both 100ns, and the total stressing time of 2000sec.
During stress time of 2000sec, we measured the ID-VG in 0, and 2000sec, comparing the device behavior which was stressed in the light and dark. Fig.4.3.2 shows the ID-VG of TFTs in linear region in dark. It could be observed that the on current decreases 25% after 2000sec stress under darkness. Fig.4.3.3 shows the ID-VG of TFTs in linear region under darkness. The
on current decreases 21.7% after 2000sec stress under illumination. The ON-Current decrease less when we measured the TFT under illumination stress than darkness stress.
The impact ionization is dependent with current density and electric field. Fig.4.3.4 shows the comparison of illumination stress and dark stress. In this experiment, most of light beams are blocked by metal shielding layer. So the photo-induced electron-hole pairs are less than previous experiment. But there is a split in the shielding layer near the drain junction.
The junction electric field decrease when the AC stress measurement under illumination. As a result, we suggest that the key factor is the electric field of drain junction. So the degradation is quite obvious when stress under darkness.