Chapter 2 Substrate Noise in Mixed-Signal Integrated Circuits
2.4 Chapter Summary
In this chapter, we have discussed the substrate coupling noise in mixed-signal integrated circuits about the generation and propagation mechanisms. The impact of substrate coupling noise on analog/RF circuits are also being presented by giving an overview of the published
works with measurement verifications. To conclude, the substrate coupling noise problem is getting more and more serious as the continuous technology scaling down and the increasing demand of high speed operation for various modern applications. To alleviate this problem, researches have been done on substrate coupling noise suppression/cancellation techniques.
We will discuss those techniques in the next chapter while proposing a new technique in the end.
Chapter 3
Substrate Coupling Noise Suppression Techniques
3.1 Introduction
In this chapter, we will first give an overview of the existing techniques for substrate coupling noise suppression, classified as passive and active methods. For the passive methods, test-keys of different guard ring structures with distance variances are taped-out, measured and analyzed in this work. Substrate models are also obtained through this substrate characterization with the help of Assura-RFTM. Besides the performance comparison of conventional guard ring structures, another passive method example of using guard ring diodes is also introduced. For the active methods, five different techniques are selected and briefed from previous works to compare their advantages and drawbacks.
After the review of the existing techniques for substrate coupling noise suppression, we will propose a new technique that utilizes both the advantages of the passive and active methods.
Chapter summary will be given in the end.
3.2 Existing Techniques 3.2.1 Passive Methods
The most commonly used passive methods for substrate coupling noise suppression are
“guard rings”, by means of physical barriers or isolation made during layout design. However, whether to use guard rings or what kind of guard ring should be used are normally just
decided through designer’s own experience, under the cost of signal integrity degradation (not enough isolation) or extra area consumption (use unnecessary guard rings). In this part, we are going to show both the simulation and measurement results of five conventional isolation schemes. Substrate network is also obtained through the characterization process with Assure-RFTM.
3.2.1.1 Test-keys of Different Guard Ring Schemes
Five isolation schemes are designed and fabricated in UMC 90nm CMOS technology in this work and published in [46], [48], based on three basic guard ring structures which include P+GR, NWGR and DNW with compared to the reference (REF). Thus, six different structures of test-keys include REF, P+GR, NWGR, DNW, NWGR with P+GR (NWGR/P+GR) and DNW with P+GR (DNW/P+GR) are implemented and measured in the frequency range from 100MHz to 10GHz with distance variance of 10m to 100m. In Figure 12 to Figure 17, the designed structures are shown in (a) and the corresponding measurement and simulation results are shown in (b), where the P+ region at the right are the noise sources and the one at the left are the receivers. The areas of the noise source and receiver are both 7.4m x 13m.
The width of both P+GR and NWGR is 1.5m and the distance from P+GR and NWGR to noise receiver are 1.5m and 3m, respectively.
By comparing the isolation schemes of single guard ring structures in a frequency range below 10GHz, the P+GR, NWGR and DNW structures give about 8dB, 25dB and 25 to 55dB isolation improvement, compared to the reference structure at an isolation distance of 10m, correspondingly. For the double guard ring designs of NWGR/P+GR and DNW/P+GR, they provide isolation performance of about 10dB and 7dB better than that of NWGR and DNW, respectively. The designs with DNW structure give the most isolation but require additional implant/mask processing steps, which increase the cost and the time of process cycle.
Therefore, such designs cannot always be used. The better isolation performances for NWGR and DNW and other double guard ring structures compared to P+GR is owing to the junction capacitances between NW/TW, DNW/TW, NW/PW and DNW/PW, which formed a obstacle to block the substrate coupling noise. However, they start to lose this advantage when the frequency increases, as the higher frequency decreases the capacitive blocking capability of the junctions. For frequencies below several GHz, the DNW structure achieves better substrate isolation compared to the NWGR. Nevertheless, as the frequency reaches 10GHz, the DNW structure shows almost the same isolation performance as NWGR. To analyze the isolation character of the single guard ring structures, in the frequency below 10GHz of interest, the isolation performance of P+GR shows a resistive behavior which is independent of frequency, where NWGR shows both resistive and capacitive behaviors as the frequency gets higher than several GHz and DNW behaves mainly capacitive in the whole frequency range. To be mentioned, due to some measurement error in the case of DNW, there is an increasing behavior of the isolation performance when frequency is below around 500MHz in Figure 15, normally it should decrease as frequency goes higher as the simulation result.
107 108 109 1010
Figure 12 (a) The reference structure and (b) measurement and simulation results.
P+
Figure 13 (a) The P+GR structure and (b) measurement and simulation results.
P+
Figure 14 (a) The NWGR structure and (b) measurement and simulation results.
P+
TW / DNW implant region
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Figure 15 (a) The DNW structure and (b) the measurement and simulation results.
P+
Figure 16 (a) The NWGR/P+GR structure and (b) the measurement and simulation results.
P+
TW / DNW implant region
107 108 109 1010
Figure 17 (a) The DNW/P+GR structure and (b) the measurement and simulation results.
Figure 18 Characterized substrate networks for (a) REF and P+GR, (b) NWGR and DNW.
3.2.1.2 Substrate Characterization with Assure-RF
TMSubstrate characterization is also done in this thesis with the help of Assura-RFTM to extract the substrate network between devices with process information such as thickness of subdivisions, junction capacitances parameters and material characteristics. The characterized substrate network is both resistive and capacitive considering high frequency effects. Figure 18 demonstrates two characterized networks between the noise source and the receiver for single guard ring test structures of REF, P+GR, NW and DNW. The simulation results with each characterized substrate networks for the six test-key structures are shown in Figure 12 to Figure 17 along with the comparison to the measurement results in 10m isolation distance.
The average errors for each isolation scheme are shown in Table I.
To be mentioned, the parameters in the extracted substrate networks will be utilized for the active guarding technique which will be proposed in Section 3.3. The characterized substrate networks also allow designers to utilize in their design process and hence choose the most suitable isolation scheme to meet the specification of substrate coupling noise tolerance and the budgets for the process costs.
Table I
Average error for the isolation schemes between simulation and measurement results Isolation
schemes REF P+GR NWGR DNW NWGR/
P+GR
DNW/
P+GR Average
error 5% 14.5% 1.8% 4.2% 2.9% 8.2%
3.2.1.3 Guard Ring Diodes
In [36], [37], the authors has verified that by creating a band-pass filter, using the
inductance of the bond wire and the capacitance of a forward biased diode, the substrate noise can be reduced. The resonant forward-biased guard ring diodes for suppression of substrate noise is shown in Figure 19, where the n+ guard ring is connected to negative voltage of Vbias
through a large resistor. This forward-biased n+p junction with constant current creates a charge storage region in the diode resulting in a capacitance in pico-Farad range. These components form a band-pass filter that provides a very low impedance path to ground that lowers the substrate noise at designed frequency as:
25 1
o LI
(3)
where L is inductance of the bound wire, τ is the transit time and I is diode current [37].
Figure 20 shows the substrate noise voltages with and without the forward-biased guard-ring.
In this manner, substrate noise in mixed signal CMOS integrated circuits can be suppressed resulting in less noise and improved reliability in analog portions of the mixed mode circuits
Figure 19 Model of coupling through substrate in a mixed-mode circuit showing guard-ring diode. [37]
Figure 20 Effectiveness of forward-biased guard circuit. [37]
3.2.2 Active Methods
In 3.2.1, we have introduced some passive methods for substrate coupling noise suppression. However, they may not be effective enough under noisy situation and may cause latch-up if they are not properly used. Here we are going to introduce some active methods that have higher noise suppression level and compensate ability than the passive methods, classified as feed-back type, feed-forward type and active-decoupling type.
3.2.2.1 Active guard band filter
An active guard band filters for substrate coupling noise suppression has been introduced in [40]. This active guard band filter creates a feedback loop using the substrate resistance as a feedback factor therefore introduces an AC coupling configuration. AS shown in Figure 21, CB1 and CB2 are substrate pick-ups that are resistively coupled to the substrate. Capacitor C2 is inserted between GB1 and the input of the amplifier to detect the AC components of the substrate noise. Capacitor C1 is inserted between the output of the amplifier and GB2 to feed an AC noise cancellation signal back.
(a) (b)
Figure 21 AC coupling in the on-chip active guard band filter (a) configuration and (b) the simplified circuit model. [40]
Here the substrate is represented by resistance R1 and R3. Resistance R2 is connected between the input and output node of the amplifier as a negative feedback path. The noise suppression ratio can thus be determined by the ratio of Vs and Vi as:
substrate noise can be suppressed to 1 A above to the amplifier open-loop gain z1 bandwidth . The noise transfer characteristic and the measured substrate noise suppression A performance of an active guard band filter design example are shown in Figure 22.(a) (b)
Figure 22 (a) Noise-transfer characteristic and (b) measured substrate noise suppression performance of an active guard band filter design example. [40]
3.2.2.2 Active Guard Band Technique
It is found that the conventional AC coupling technique, like the one introduced in 3.2.2.1, it requires large coupling capacitances which will disable an on-chip implementation of the circuit. In [41]-[42], an active guard band technique based on a signal cancellation using its opposite signal is presented. The concept of this technique and a design example of an active guard band circuit are shown in Figure 23. As shown in Fig. 23(a), since the substrate resistances are symmetrical, the transfer function from node s to nodes g and d will be:
2 0
2
s c s s
s d s
g V V V V
V V V V
. (5)
As a result, the substrate noise appeared in node g is cancelled.
Simulation result of the active guard band circuit with the comparison to ideal guarding is shown in Figure 24. By combining both the active guard band circuit and an ideal guard ring, it can give around 30dB noise suppression performance from DC to 1MHz and still be effective until 100MHz.
(a) (b)
Figure 23 (a) Basic concept of active noise cancellation technique and (b) an active guard band circuit. [41]
Figure 24 The performance of the active guard band circuit and the comparison with ideal guard ring. [41]
3.2.2.3 Feed-Forward Active Substrate Noise Canceling Technique
In [43], a feed-forward active substrate noise canceling technique using a power supply di/dt detector is presented, as shown in Figure 25(a). Since the substrate is tied to the ground line, the substrate noise is closely related to the ground bounce which is caused by di/dt when inductance is dominant on the ground line impedance. This active canceling technique detects the di/dt of the power supply current and injects an anti-phase signal into the substrate so that the di/dt proportional substrate noise is cancelled out. The substrate noise canceller circuit is shown in Figure 25(b), which is mainly based on a di/dt detector, where a mutual inductor
coupled to the power supply line induces the di/dt proportional voltage, and an amplifier that amplifies and outputs the anti-phased signal. Experimental result shows 17% to 34% of the substrate noise can be suppressed from 100MHz to 600MHz operation range by this feed-forward active noise cancelling circuit. An example waveform of substrate noise is shown in Figure 26, where the operation frequency is at 500MHz.
(a) (b)
Figure 25 Feed-forward active substrate noise cancellation technique (a) block diagram and (b) circuit. [43]
Figure 26 Substrate noise waveforms with the active noise cancelling ON/OFF, together with the CLK/2 signal, operated in 500MHz. [43]
3.2.2.4 Active Substrate Noise Suppression Circuit with On Chip Driven Guard Rings
In [44], an active substrate noise suppression circuit which uses an amplifier with a pair of concentric guard rings is presented. The outer ring acts as a receiver for substrate noise and the inner ring acting as a transmitter of the inverted noise signal. The input of an inverting amplifier is connected to the outer ring, and the output is connected to the inner one. The guard rings are capacitively coupled to the silicon substrate. The substrate coupling noise can be sensed by the outer guard ring and the inverted and amplified by the amplifier. The inverted noise signal is coupled into the substrate by the inner guard ring. In this manner, a quieter region is generated inside the inner ring. Figure 27(a) shows the schematic view of this noise cancellation technique and Figure 27(b) shows the inverting amplifier and its connection to substrate.
To evaluate the performance, the test chip includes a ring oscillator (RO) inside the inner guard ring that receives the residual noise. Sinusoidal “noise” generated by a signal generator is coupled into the substrate through a bond-pad outside the guard rings connected to the substrate. The sideband spurs with the active substrate noise suppression circuit turning on and off, are measured with different noise frequencies and plotted in Figure 28. As shown in the figure, at low frequencies, the capacitive coupling of the guard rings to the amplifier limits the noise suppression. At high frequencies, the bandwidth of the amplifier with low-impedance load limits the performance.
(a) (b)
Figure 27 (a) Schematic view of the noise cancellation technique and (b) the inverting amplifier and its connection to substrate. [44]
Figure 28 Measurement and simulation results of the suppression performance presented as sideband suppression versus frequency. [44]
3.2.2.5 Active Decoupling Technique
An active decoupling technique is proposed in [45] to suppress substrate crosstalk in mixed-signal system-on-chip (SoC) devices. It uses an operational amplifier to absorb noise through the Miller multiplication of feedback capacitance, and it uses a virtual grounding to keep the voltage stable. Figure 29 shows the concepts of on-chip active decoupling and the conventional capacitor decoupling.
In active decoupling, the capacitor C in the feedback loop of the operational amplifier acts as a decoupling capacitor; its capacitance C, is multiplied by the gain A
through theMiller effect. The resulting negative feedback causes the guard band to be virtually shorted to the reference ground line. The noise current from the substrate, which is the crosstalk is thereby absorbed in the operational amplifier and flows into the pair of power supply lines rather than into the reference ground line. The decoupling effect in terms of the noise level with and without decoupling is shown in Figure 30, which gives a maximum 3.17dB suppression performance at 200MHz.
Figure 29 Concepts of on-chip active decoupling and capacitor decoupling. [45]
Figure 30 Effects of active and capacitor decoupling. [45]
3.2.3 Brief Summary
Many techniques have been investigated to alleviate this problem of substrate noise suppression. Either passive or active methods are applied for substrate coupling noise reduction. For passive methods, different guard ring types are designed, measured and analyzed in this work [46]. Another passive method named guard ring diodes is also introduced in [36], [37]. For active methods, noise signals can be either decoupled or counteracted as the references in [38]-[44]. Among those techniques, passive methods need no power consumption but may not be effective enough in noisy situations. On the other hand, although active methods have a higher level of noise suppression, there are several limitations and drawbacks still. In [39], [42] and [43], CMOS amplifiers are used to invert the noise signals and inject them into the substrate for counteraction; but their performance are all limited by the trade-off of power consumption and gain-bandwidth product of amplifiers.
Hence ranges of the effective operation frequency are less than few hundred mega-hertz. In [43], it even requires area consuming inductors to perform the di/dt detection. In [44], although a high noise suppression bandwidth as 400MHz is achieved by employing a high gain, high bandwidth SiGe HBT amplifier, and the hetero-junction bipolar technology is not suitable for the SoC design. On the other hand, it also needs two capacitors to feed the signal into the substrate which occupies considerable area. A current mirror based method is employed in [41] for lower power and area consumptions, but the effective noise suppression is less than 100MHz due to the parasitic effects that dominate the frequency response. Finally, in [45], substrate noise is wideband suppressed by -1dB in the frequency range from 40MHz to 1GHz, and is maximally -3.5dB suppressed at 200MHz by decoupling noise signals to ground via three large capacitors (10pF each), where the capacitance values are equivalently increased by three power-consuming operational amplifiers (3.3mW each) through Miller Effect.
To sum up, both existing passive and active methods have some limitations in area/power consumption, effective bandwidth and the noise suppression ability. In the following section, we are going to propose a new technique for substrate noise suppression, which can achieve more than 10dB suppression ability with giga-hertz noise suppression bandwidth, at the cost of the usage of several active devices with few mili-watt power consumption.
3.3 Proposed Active Guarding Technique
In this section, an active guarding technique is proposed for wideband substrate noise suppression. A noise decoupling mechanism is developed to provide a decoupling path and to sense the noise level for generating noise cancellation current. A feed-forward compensation mechanism is also developed to extend the noise suppression bandwidth and to adjust the amplitude of phase-inversed noise cancellation current by introducing a zero and an amplitude controller. With substrate characterization done in 3.2.1.1 and 3.2.1.2, parameters of substrate network impedance, decoupling factor and amplitude of noise cancellation current can be either obtained or determined. The proposed circuit needs only several active devices of MOS transistors, and no power-consuming high-gain, wideband amplifiers or area consuming passive components as capacitors are needed.
3.3.1 Design Concepts
The concept of proposed active guarding technique is shown in Figure 31, with the cross-section of the physical implementation. An active guarding circuit with sense and injection rings is inserted between the noise source and guarded circuitry to suppress the substrate noise coupling. The sense ring is placed at the outer side to receive the substrate noise; the injection ring, on the contrary, surrounds the guarded circuitry at the inner side to
inject the compensation current back to the substrate. In order to prevent self-induced noise from interfering the guarded circuitry through the common substrate, the active guarding circuit is placed in an isolated well.
The proposed substrate noise suppression is achieved by two mechanisms: noise decoupling and feed-forward compensation, as shown in Figure 32. Noise current from any direction to the guarded circuitry is detected and averaged at the sense ring, and then decoupled to the active guarding circuit. The compensation current is generated from the decoupled noise with its phase reversed and the amplitude adjusted. The bandwidth extension is further performed before the compensation current injected back to the substrate. The noise which flows through the substrate other than the decoupling path at the branch point of the sense ring can be cancelled by mixing the compensation current via the injection ring. By implementing both noise decoupling and feed-forward compensation with bandwidth extension, substrate noise received at the guarded circuitry can be effectively suppressed.
The proposed substrate noise suppression is achieved by two mechanisms: noise decoupling and feed-forward compensation, as shown in Figure 32. Noise current from any direction to the guarded circuitry is detected and averaged at the sense ring, and then decoupled to the active guarding circuit. The compensation current is generated from the decoupled noise with its phase reversed and the amplitude adjusted. The bandwidth extension is further performed before the compensation current injected back to the substrate. The noise which flows through the substrate other than the decoupling path at the branch point of the sense ring can be cancelled by mixing the compensation current via the injection ring. By implementing both noise decoupling and feed-forward compensation with bandwidth extension, substrate noise received at the guarded circuitry can be effectively suppressed.