Circuit Design

The commonly used VGA design in a phase shifter with I/Q vector combination technique is as shown in Fig. 5-2 [11], [12]. Signal appears in the differential format.

The phase shifter consists of four differential amplifiers in a group of two. Each group amplifies the I or Q signal to the specified output level. Essentially the two input signals in each group are simply phase inversed to each other, yielding to summation or subtraction. Only one signal in each group is amplified and summed up at the output in the current domain. Gain control and input signal selection are realized by tuning the dc bias current to the specified transconductance. By doing so, the output phase covers the full range of 360 degrees.

Fig. 5-2 Block diagram of a conventional I/Q vector combiner phase shifter.

Fig. 5-3 Phase distortion versus input swing of commonly used VGA

The issues of the VGA circuit configuration are twofold. One is the transconductance variation along with the input signal swing. If the input swing becomes large, device nonlinearity causes the effective dc bias to change. Thus the amplifier gain changes correspondingly. The other is the gain variation due to gain tuning in another amplifier pair. In deep submicron devices, the device transconductance varies notably at different VDS bias even if the bias current is fixed.

In this conFiguration, the dc voltage of Vop and Von actually changes if the bias current changes in one transistor pair. The gain level of a transistor pair therefore is affected by gain tuning in another pair.

The reason of narrow input power range of commonly used VGA design is that the

selected DC current is not suitable for wide dynamic input swing. For example, if we choose different bias condition for each gain state of I/Q path under small signal operation, the phase distortion and gain variation of output signal will be extremely low. But these bias conditions are not suitable for large signal operation owing to VGA linearity issue. Nevertheless, the phase shifter on the RF path shall handle both small signal and large signal swings of the modulated signal without phase distortion.

Fig. 5-3 shows the simulated phase distortion of commonly used VGAs. Owing to the linearity of I/Q ac magnitude ratio, if the desired output phase is at 22.5° and 67.5°, the phase distortion will increase to 10 degrees when the input swing is 300 mV.

Fig. 5-4 Schematic of proposed VGA and vector combiner

Fig.5-5 Diagram of phase shift base on I/Q vector combiner 5.2.1 Proposed Variable Gain Amplifier

To solve the phase distortion issue, the VGA circuit is proposed for phase shifter design, as shown in Fig. 4. The circuit takes four-phase input signals. The difference from the traditional phase shifter is gain control, which is implemented by four sets of differential amplifier cells. Each cell is biased with a current source that is digitally controlled by switching ON/OFF. Each set includes gain cells in different device sizes, resulting in weighted output currents for vector combination at the nodes Vop and Von. Since the bias current of each cell is fixed when turn on, the amplifier

transconductance is also fixed, namely, irrelevant to the input voltage swing.

The output phase resolution relies on the gain control to I and Q signals, and in turn on the device size ratio among gain cells.

This concept is similar to the programmable gain amplifier (PGA) in [13]. Fig. 5-5 shows the magnitude ratio of I/Q signals to synthesize the phase resolution of 22.5°

with equal magnitudes. Calculated by arctangent function, the integral I/Q ratio of 0°, 22.5°, 45°, 67.5°, and 90° are 13/0, 12/5, 9/9, 5/12, and 0/13, respectively. The device sizes in a set of gain cells need to be chosen properly. Although binary weighting allows high resolution [6], the sizes of x1, x3, x4, x5 are chosen in this work for minimum hardware implementation. The congenital theoretical phase error and gain variation are 0.12° and 0.092 dB, respectively.

By using proposed schematic of VGA in I/Q vectors combination based phase shifter design, the mechanism of gain tuning only depends on the accuracy of device ratio. The bias condition of each gain cell is fixed in ON state. This is the maximum difference between commonly used VGA and proposed VGA. Based on proposed VGA, the sensitivity of VDS could be reduced. The phase distortion and gain variation of phase shifter will be improved in wide input power range.

5.2.2 Quadrature Phase Generator and Output Buffers

The phase shifter requires quadrature phase input signals. In this design, an RC poly-phase filter (PPF) is adopted to convert a differential input for the purpose. A 100-Ω resistor is also placed in shunt to the input for impedance matching. As such, the PPF introduces significant signal loss. The simulated result shows that the voltage loss of the PPF is 5.75 dB at 3.5 GHz. This voltage loss is subtracted from measurement data in phase shifter gain calculations.

At the phase shifter output, a source follower stage is included as an output buffer for impedance matching for measurement. The voltage loss of the output buffer is 7.5 dB at 3.5 GHz.