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Comparison with Programming Efficiency among Conventional SSI (normal mode), Substrate-Bias enhanced SSI (Body-mode) and Dynamic Threshold SSI mode), Substrate-Bias enhanced SSI (Body-mode) and Dynamic Threshold SSI

of Wrapped-Select-Gate SONOS (WSG-SONOS) in NOR-Type 3.1 Introduction

3.3.2 Comparison with Programming Efficiency among Conventional SSI (normal mode), Substrate-Bias enhanced SSI (Body-mode) and Dynamic Threshold SSI mode), Substrate-Bias enhanced SSI (Body-mode) and Dynamic Threshold SSI

(DTSSI)

Unlike single gate channel-hot-electron programming SONOS devices, the IPGM

induced by wrapped-MOSFET can maintain a high value due to the structural separation between the left-bit and the right-bit. Therefore, the electrical effects of the nitride-trapping charges can be as low as possible. Based on these concepts, there are three kinds of programming methods for WSG-SONOS devices: normal, DT, and body mode, as illustrated in Fig. 3.6. Figure. 3.7 shows the effect of VSG with 100ns of programming for each mode of WSG-SONOS memory under the same programming conditions (VWL= 9~12 V, VBL= 4V). A typical bell-shaped distribution

is observed in both normal and body modes, but not in DT mode. Here the DTSSI must be operated below VSG=0.65V, otherwise the junction diode of the well and source will activate. In our device, the Vth of embedded select-gate MOSFET is only 0.4V, which is defined by the constant current method IPGM=0.1 A, in WSG-SONOS memory under DT-mode by appropriately adjusting device process. Across all three modes, the higher VWL exhibits a larger programming window. This is because high VWL not only enhances the collection ability with increasing normal electric field but also raises the hot electron generation rate by increasing the voltage drop across the gap region. To understand the SSI mechanism, we simulate the dependence of VWL

and VSG on the electrical field. Both lateral and vertical electrical fields increase exponentially from the pinch-off point to the end of the neutral gap region, as shown in Fig. 3.8. The higher VWL increases the maximum field peak due to the higher potential transmission from the drain terminal by increasing the inversion charge density beneath the word gate. By the same token, the higher VSG, though it sufficiently enhances IPGM, degrades the electric field peaks at the same time. This is because as the wrapped-MOSFET overdrive becomes higher, the voltage drop across the neutral gap region decreases, decreasing the efficiency of programming. This explains the typical bell-shaped distribution found in Fig. 3.7.

Further, the DT mode exhibits different behaviors from those of the normal and body modes, as shown in Fig. 3.7. The typical programming characteristic of the DTSSI has a higher memory window while VSG is still at a low voltage. To detail this phenomenon, we simulate the electrical field dependence of each mode, as shown in Fig. 3.8. Compared to the normal and body modes, the DT mode possesses a larger acceleration electrical field between the wrapped-select gate and the word gate.

Therefore, the hot-electron generation rate can be enhanced. By contrast, the body mode improves only the IPGM, and degrades the lateral electrical field because of the higher VSG. As a result, the body mode produces a traditional bell-shaped distribution (Fig. 3.7).

In sum, there are two major enhancing mechanisms for high programming speed of WSG-SONOS under DTSSI operation. First, the IPGM increases in DT mode [3.19];

second, the maximum lateral electrical field enhancement occurs at the same time in the gap region. Owing to the body effect in DT mode, the equivalent oxide capacitance is increased by decreasing the depletion region under wrapped-MOSFET.

The increase of inversion charge density per area leads to the strong IPGM injection into the gap region. Furthermore, the charge reduction of the depletion width can effectively increase the lateral electric field by decreasing the vertical electric field effects, further resulting in better gate disturbance in the WSG-SONOS. The hot electron generation efficiency can be enhanced due to the tradeoff between the lateral and vertical electric fields in the gap region.

Figure 3.8 also shows that the crossover point of both electrical fields indeed occurs near the end of the gap region close to the word-gate in all three modes. Since DTSSI is used for programming, the slight reduction of potential differences between the word gate and the well, due to the positive body bias, can induce the hot-electron injection point to move toward to drain terminal. This phenomenon is similar to a slight decrease in the word-gate voltage. This improves the band-to-band hot-hole erasing process [3.19] without degrading the programming speed. In other words, the crossover point pointed out the most possible electrons injection place due to its maximum vertical electrical field. It also implies the charge storage spatial distribution in the nitride storage layer will vary with the applied program bias [3.23]

across different SSI mechanisms, when the hot electron injection point is beneath the word gate, not beside it.

Figure 3.9 displays comparisons of programming efficiency for WSG-SONOS memory using different SSI modes under the same programming conditions (VWL= 9~11 V, VBL= 4 V), where the supply charge is defined as QSupply charge =IPGM x

τ

PGM. We found that at the same supply charge, the DT mode exhibits a lower word gate bias with lower VSG, resulting in higher programming efficiency. Similar to the simulation results in Fig. 3.9, the very high programming speed with improvement of programming efficiency can be attributed to the simultaneous enhancement of IPGM

and the lateral electrical field in the gap region. In addition, in body mode, there is still a larger threshold voltage shift even with the lower lateral field. The drawback of body mode is its greater power consumption for the higher supply charge due to its lower programming efficiency.

In sum, this section shows the source-side-injection mechanism under normal, body, and DT modes of WSG-SONOS memories. Under DT mode, devices exhibited increased lateral electric field and IPGM. These changes enhanced the programming efficiency of wrapped-select-gate SONOS for NOR-type flash memory.

3.3.3

High-Performance and High-Reliability DTSSI Method for 2 Bit/Cell