Current-reused VCO with Low Power and Low Phase Noise

Chapter 4 Design of a Low Power, Low Voltage and Low Phase

4.4 Current-reused VCO with Low Power and Low Phase Noise

Figure 4.8 Proposed VCO2 circuit.

Figure 4.9 Parallel LC oscillator model of the proposed VCO2.

Figure 4.10 (a) Negative-resistance cell circuit; (b) Series circuit model of the negative-resistance cell.

e 2 5

1 2

R _q g^m

ω C C

≈ − (8)

2 1 2

5 1 2

eq m

C C C

g C C

≈ ω

+ (9)

Form (9), C1−C2 can be enlarged to Ceq by using a negative-resistance cell, and Ceq is positively correlated with (ω/gm5)² without any additional capacitance and thus can lower the phase-noise.

4.5 EXPERIMENTAL RESULTS

The die microphotograph of the proposed VCO is shown in Fig. 4.11, where the proposed VCO is fabricated by using the TSMC 0.18 μm CMOS process. Its die area is 0.56× 0.71 mm² including the pads. An on-wafer measurement is carried out for RF characterization. The measured oscillation frequencies cover 2.52 GHz to 2.41 GHz while the control voltage Vct is changed from 0 V to 1.3 V, as shown in Fig. 4.12. Fig. 4.13 shows the VCO output spectrum with values of -3.5 dBm. As shown in Fig. 4.14, the measured phase noise of the proposed VCO is about -125 dBc/Hz at 1MHz offset frequency. The power consumption of the proposed VCO core is 1.9 mW at the supply voltage of 1 V.

The figure of merit (FOM) of the proposed VCO is -190 dBc/Hz with the FOM defined by

{ } 10 log 20 log ⁰

where f0 is the oscillating frequency, Δf is the offset frequency, L{Δf} is the measured phase noise at Δf, and PDC is the DC power consumption of VCOs in mW. Table II summarizes the measured phase noise (PN), f0, power consumption and FOM of the proposed VCO and other published results. The comparison result shows that our proposed work yields very low phase noise even with a relatively low power consumption, and shows the best FOM performance.

Figure 4.11 Microphotograph of the VCO2.

Figure 4.12 Measure tuning range of the VCO2.

Figure 4.13 Measured the VCO2 output spectrum at 2.4 GHz.

Figure 4.14 Measured phase noise versus offset frequency of the VCO2 at 2.4 GHz.

50 TABLE II

Current reused VCO with Low Power and Low Phase Noise MEASURED PERFORMANCE SUMMARY AND COMPARISON

Chapter 5 Conclusion

A low power、low voltage and low phase noise LC-VCO operating at 2.5 GHz and 3.5 GHz is proposed and implemented by TSMC 0.18-μm 1P6M CMOS process. Our design, based on a current-reused topology and adding a negative-resistance cell shunt to the L-C tank, can effectively reduce of both the power consumption and supply voltage. With the current-reused topology, the proposed LC-VCO can operate using only half amount of DC current compared with the conventional topologies. An external negative-resistance cell is also added between the different outputs, which can effectively reduce both the power consumption and supply voltage. The proposed LC-VCO consumes 1.9 mW and 0.54 mW at 2.5 GHz and 3.5 GHz, respectively. The measured phase noise at 1 MHz offset frequency is -125 dBc/Hz and -116.89 dBc/Hz in the 2.5 GHz and 3.5 GHz. The FoM of proposed LC-VCO is -190 dBc/Hz and -190.4 dBc/Hz at operating frequency 2.5 GHz and 3.5 GHz, respectively. Although the power consumption is obviously improved, there is still a lot of space for noise reduction. Several extensive studies have been underway to further reduce phase noise of LC-VCOs. In this field, it may be worth our effort in the future works, such as low phase noise LC-VCOs.

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Appendix A Basic Oscillator Theory

Ring Oscillators

Ring oscillators employing more than three stages are also feasible. The total number of inversions in the loop must be odd so that the circuit does not latch up. For example, as shown in Fig A.1(a), a ring can incorporate N inverters, providing a frequency of 1/(2NTD). On the other hand, the differential implementation can utilize an even number of stages by simply configuring one stage such that it does not invert. Illustrated in Fig A.1(b), this flexibility demonstrates another advantage of differential circuits over their single ended counterparts.

1 2 3 N

Figure A.1 (a) N-stage single ended ting oscillator, (b) four-stage differential ring oscillator

Let A G R= _m _p ¹

ω = RC

Assume N is an odd number, according to Barkhausen criterion

( )^N 1 1 ( )2

H jω A ω

≥ ⇒ ≥ + ω ^∠

[

^{H j}⁽ ^ω⁾

]

^N ⁼²^k^π (3 To find minimum gain A, we have

N N

As shown in Fig A.2(a), an inductor L1 placed in parallel with a capacitor C1 resonates at a frequencyω_res =1/ L C_{1 1} . At this frequency, the impedances of the inductor, jL1ωres, and the capacitor, jC1ωres, are equal and opposite, thereby yielding an infinite impedance. We say the circuit has an infinite quality factor, Q. In practice, inductors and capacitors suffer from resistive components. For example, the series resistance of the metal wire used in the inductor can be modeled as shown in Fig A.2(b). We define the Q of the inductor as L1ω/Rs. For this circuit, the reader can show that the equivalent impedance is given by

Figure A.2 (a) Ideal and (b) realistic LC tanks

and hence,

That is, the impedance does not go to infinity at any s=jω. We say the circuit has a finite Q.

The magnitude of Zeq in (6) reaches a peak in the vicinity ofω=1/ L C_{1 1} , but the actual resonance frequency has some dependency on Rs.

The circuit of Fig A.2(b) can be transformed to an equivalent topology that more easily lends itself to analysis and design. To this end, we first consider the series combination shown in Fig A.3(a). For a narrow frequency range, it is possible to convert the circuit to the parallel configuration of Fig A.3(b). For the two impedances to be equivalent:

Considering only the steady state response, we assume s=jω and rewrite (7) as

1 1 2

(L R_p+L R j_{p s}) ω+R R_s _p−L L_pω =R L j_{p p} ω

(8) This relationship must hold for all values of ω, mandating that

1 p p s p

Figure A.3 Conversion of a series combination to a parallel combination

Calculating Rp from the latter and substituting in the former, we have

Recall that L1ω/Rs=Q, a value typically greater than 3 for monolithic inductors. Thus,

In other words, the parallel network has the same reactance but a resistance Q² times the series resistance.

Let us now consider the tuned stage of Fig A.4(a), where an LC tank operates as the load.

At resonance, jLpω=1/(jCpω) and the voltage gain equals –gm1Rp. The phase shift approach +90° at very low frequency and -90° at very high frequency. At resonance, the total phase shift around the loop is equal to 180°. Thus, the circuit does not oscillate.

Figure A.4 (a)Tuned gain stage, (b) stage of (a) in feedback

Crossed-Coupled Oscillator

Figure A.5 Two tuned stages in a feedback loop

Suppose we place two stages of Fig. A.4(a) in a cascade, as depicted in Fig. A.5.

Furthermore, at resonance, the total phase shift around the loop is zero because each stage contributes zero frequency dependent phase shift. That is, if gm1Rpgm2Rp≧1, then the loop oscillates.

The circuit of Fig. A.5 serves as the core of many LC oscillators and is sometimes drawn as in Fig. A.6(a). However, the drain currents of M1 and M2 and hence the output swings heavily depended on the supply voltage. Since the waveforms at X and Y are differential, the

drawing in Fig. A.6(a) suggests that M1 and M2 can be converted to a differential pair as depicted in Fig. A.6(b), where the total bias current is defined by Iss.

Lp Rp Cp

Figure A.6 (a) Redrawing of the oscillator shown in Fig. 8 (b) adding of tail current source to lower supply

sensitivity

The oscillator of Fig. A.6(c) is constructed in fully differential form. The supply sensitivity of the circuit is nonzero even with perfect symmetry. This because the drain junction capacitance of M1 and M2 vary with the supply voltage.

Assume Cp=0, consider only the drain junction capacitance, CDB, of M1 and M2. Since CDB

varies with the drain-bulk voltage, if VDD changes, so does the resonance frequency of the tank. Noting that the average voltage across CDB is approximately equal to VDD, we write

Note that the relationship between ωout and Vcont is nonlinear because KVCO varies with VDD and ωout.

Colpitts Oscillator

Figure A.7 (a) Colpitts oscillator (b) equivalent circuit of (a) with input stimulus

Approximating M1 by a single voltage dependent current source, we construct the equivalent circuit of Fig. A.7(b). Since the current through the parallel combination of Lp and Rp is given by Vout/(Lps)+Vout/Rp, the total current through C1 is equal to Iin-Vout/(Lps)-Vout/Rp,

The circuit oscillates if the closed-loop transfer function goes to infinity at an imaginary value of s.

We determine the ratio C1/C2 for minimum required gain. The reader can prove that the minimum occurs for C1/C2=1, requiring

(24)

m p 4 g R ≥

For cross-coupled LC-tank oscillator the minimum gain requirement (=1), (better than Colpitts oscillator). Consider the parasitic capacitance (Cp) in parallel with the inductor

Mathematical model of VCOs

Consider two waveforms V1(t) = Vm sin[φ1(t)] and V2(t) = Vm sin[φ2(t)], where φ1(t)=ω1t, Figure A.8 Variation of phase for two signals

The faster the phase of a waveform varies, the higher the frequency of the waveform, suggesting that the frequency can be defined as the derivative of the phase with respect to time:

A VCO senses a small sinusoidal control voltage Vcont=Vmcosωmt.

0 0 0 0

The output therefore consists of three sinusoids having frequency of ω0, ω0-ωm, and ω0+ωm. The spectrum is shown in Fig. A.9. The components at ω0±ωm are called “sidebands”

Figure A.9

Variation of the control voltage with time may create unwanted components at the output.

In practice, depending on the type and speed of the oscillator, the output may contain significant harmonics. If Vcont varies by ΔV, then the frequency of the first harmonic varies by KVCOΔV, the

frequency of the second harmonic varies by 2KVCOΔV.

1 0 1 2 0

( ) cos( ) cos(2 2 )

out VCO cont VCO cont

v t =V ω t K+

∫

V dt+θ +V ω t+ K

∫

V dt+θ ⁽³⁵⁾

TABLE III Comparison of oscillator topologies

Parameter Ring oscillator Colpitts LC resonator Cross-couples

Max. oscillation parasitic of at least three gates determine

Very high since minimum voltage gain as low as 1 is required

Output power Depends on output buffer

Depends on output buffer, advantage of differential following stage has to be driven, multistage

Moderate to low depends on buffer

Noise High since no high Q

frequency stabilisation Moderate to low

Moderate, noise generated in gate resonator is amplified

Low given weak loading of core by means of high impedance buffer, high voltage swing, differential inductor has higher Q Immunity against

single-ended Low since differential

Circuit size Very compact since no inductors required

Moderate, at least one differential inductor

Effect of Phase Noise in RF Communications

To understand the important of phase noise in RF systems, consider a generic transceiver as depicted in Fig. A.10, where a local oscillator provides the carrier signal for both the receive and transmit paths. If the LO output phase noise, both downconverted and upconcerted signals are corrupted. This is illustrated in Fig. A.11.

Figure A.10 Generic wireless transceiver

If the LO output contains phase noise, both the downconverted and upconverted signals are corrupt. This is illustrated in Fig. A.11(a) and (b) for the receive and transmit paths, respectively.

Referring to Fig. A.11(a), we note that in the ideal case, the signal band of interest is convolved with an impulse and thus translated to a lower frequency with no change in its shape. In reality, however, the wanted signal may be accompanied by a large interferer in an adjacent channel, and the local oscillator exhibits finite phase noise. When the two signals are mixed with the LO output, the downconverted band consists of two overlapping spectra, with the wanted signal suffering from significant noise due to tail of the interferer. The effect is called “reciprocal mixing”.

Show in Fig. A.11(b), the effect of the phase noise on the transmit path is slightly different.

Suppose a noiseless receiver is to detect a weak signal at ω2 while a powerful, nearby transmitter generates a signal at ω1 with substantial phase noise. Then, the wanted signal is corrupted by the phase noise tail of the transmitter.

Figure A.11 (a) Downconversion by an ideal oscillator, (b) reciprocal mixing

General considerations

Figure A.12 Perfectly efficient RLC oscillator

To highlight some import issues in a very approximate and general way, consider a single RLC bandpass resonator use in an oscillator. The resonator is connected to an active element that has the unrealizable property that is contributes no noise of its own; see Fig. A.12. The noiseless magic box supplies just enough energy to the tank to compensate for the dissipation by tank’s resistance, thereby leading to a constant amplitude oscillator. Although the magic box is noiseless, the tank resistance is not.

The signal energy stored in the tank is simply

so that the mean-square signal voltage is

2 stored sig

V E

= C (37)

where we have assumed a sinusoid waveform.

By postulate, the only source of noise is the tank resistance. The total mean-square noise voltage is found in the usual way, by integrating the resistor’s thermal noise over the noise bandwidth of the RLC filter:

2 2

Taking the ratio of mean-square voltages, we find that the noise to signal ratio is equal to the ratio of thermal energy to the stored signal energy:

Thus, we want to maximize the energy of the desired signal relative to the thermal energy.

All other factors held constant, one therefore needs to use the maximum possible signal levels if the noise to carrier ratio is to be minimized.

To bring power consumption and resonator Q explicitly into the discussion, recall from the chapter on passive RLC networks that Q is most generally defined as proportional to the energy stored, divided by the energy dissipated:

stored

The power consumed by this model oscillator is simply equal to Pdiss, the amount dissipated by the tank loss. The noise to carrier ratio is here inversely proportional to the product of resonator Q and the power consumed, and directly proportional to the oscillation frequency. This set of relationships still holds approximately for real oscillators, and explains

the near obsession of engineers with maximizing resonator, for example.

Minimization of phase noise A. Maximization of LO Power

Proper choice of the bias and the landline is important to maximize the LO power.

Corresponding design issues are very similar to those of power amplifiers. To increase the single swing, complementary P and NMOS structures are efficient in topologies capable of adding the individual voltage swings of the devices.

B. Optimum Gain

To ensure start-up, the negative resistance and consequently the gain provided by the active device must be high to compensate the losses in the system within a wide frequency band, temperature range and process variations. In steady-state, the LO signal is subject to power compression, whereas the phase noise is not compressed. That means that at a certain gain level the noise is amplified but not the LO signal leading to a degradation of L. thus, depending on the system requirements a reasonable tradeoff has to be found for the gain.

C. Maximization of Resonator Q

The Q of the resonator has a significant impact on the noise and must be kept as high as possible. At low to moderate frequencies, the Q fact of the resonator is clearly determined by the inductor in the resonator requiring lots of turns and large area. Thus, the inductor exhibits significant resistive losses associated with the large series resistance of the lines and the coupling to the lossy substrate. Towards very high frequencies, the varactor becomes more and more the limiting element since the varactor Q is more or less inversely proportional to frequency.

D. Choice of transistor

The noise floor is impacted by the noise properties of the device. A low average noise figure along the whole signal swing is important but more or less determined by the

technology used. What about the transistor type? On one hand, FET devices are less nonlinear than bipolar transistors. On the other hand, the ω1/fn of bipolar devices is much lower than for FETs. Values for ω1/fn range from 1 to 10 KHz for bipolar transistors and 0.1 to 1 MHz for FETs. Thus, typically, bipolar devices provide lower 1/f noise, which can dominate the total VCO noise performance.

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