Dielectric Polarization

Preliminary C-V measurements of the SiC film (Al-SiC-1 structure) demonstrated certain instabilities that are not typical of MIS structures incorporating clean thermal oxides. The instabilities are prevalent, even at room temperature, to such a degree that reliable C-V characteristic is difficult to be measured. There are four possible mechanisms may cause dielectric instability : (a) the 10 nm thick thermal oxide is unstable; (b) the SiC film is contaminated by mobile ions such as Na, K, Cu, etc.; (c) the SiC film is polarized under electric field; (d) charges are injected into SiC film under electric field. In the following subsections, these mechanisms are examined by further experiments.

The quality of the 10 nm thick thermal oxide was examined firstly. A simple Al/

SiO2 (10nm)/Si MOS capacitor (Al-SiO2-1) was fabricated. The dielectric constant obtained from high frequency C-V measurement is around 4.0 with flat-band voltage of -0.2 V. There is no any hysteretic phenomenon was observed. Therefore, the unstable of the thin thermal oxide is ruled out. Mobile ion contamination in SiC film is improbable. The SiC film had demonstrated very good barrier ability against Cu diffusion. If the room temperature instability should attribute to mobile ion, apparent C-V shift should have been observed in Fig. 4.5(b). SIMS analysis was performed to detect metal contamination of the Al-SiC-1 samples after etching away of the Al gate.

The mobile ions in SiC film, including Na, K, and Cu, are lower than the detection

limit of SIMS analysis.

Since the possibility of thermal oxide instability and mobile ion contamination are both ruled-out. We now examine the mechanism of dielectric polarization and charge injection.

The polarization of dielectrics in MIS structure had been reported long ago [8-10]. It is characterized by a shift of the C-V curve in the same direction as that caused by positive ion migration. The amount of shift will depends on the applied electric field and is symmetric for both polarities. The polarization rate is increased with temperature. Re-examining Table 4-3, it is observed that the shift of the C-V curve becomes more symmetric as the electric field becomes stronger. An electric field stress at ±20 V (2 MV/cm) and 25 ℃ was performed on the Al-SiC-1 samples.

The electric field was chosen based on the prerequisite that the Vfb would not shift to beyond ±15 V so the C-V measurement after stress can be limited in a voltage range that will not alter the C-V curve furthermore. Fig. 4.10 shows the C-V curves after continuous stress. It is found that the Vfb shift tends to be saturated with the increase of stress time. The final Vfb is approximately symmetric to the original value. It is thus possible to attribute the instability at high electric field to the polarization of the SiC film.

Fig. 4.11 schematically shows the effect of polarization on the shift of C-V

curve. As the electrical field exceeds threshold strength (about 1.8MV/cm at room temperature), the SiC film becomes polarized. This polarization should be attributed to the agreement of electrical dipoles’ orientation in the SiC film. The field due to these dipoles induces a charge in the silicon substrate, which is reflected by a shift in the C-V curve. As the C-V curve is measured at FVS mode, the SiC film was firstly polarized by the negative electric field and cause a positive flat-band voltage shift and vice versa.

The dielectric constant of a polarized dielectric should be increased according to the well-known polarization equation [11] :

P={[3(k-1)]/[4π(k+2)]} (1)

, where P is the volume polarization and k is the dielectric constant. As the polarity of a material becomes higher, the dielectric constant of this material should become higher, too. However, the measured capacitances at strong accumulation mode before and after electric field stress are not increased (refer to Fig. 4.7-4.10). It should be mentioned that the capacitance is measured at high frequency while the time constant for polarization at room temperature is estimated to be 5 minutes from Fig.4.10. The molecular dipoles can not follow the AC signal such that the measured capacitance and the corresponded dielectric constant does not changed after electric field stress.

To clarify this point, dielectric constant of SiC film were measured at lower frequencies and higher temperatures. The Al-SiC-1 capacitor was heated-up to the targeted temperature on a thermal chuck. The capacitor was then biased at –40 V (-4 MV/cm) for 2 minutes to polarize the SiC film before C-V measurement. The accumulated capacitance at 0V was then measured at various frequencies ranging from 1MHz to 100 HZ. The simple Al/ SiO2 (10 nm)/Si capacitor (Al-SiO2-1) was also measured. The dielectric constant of the thermal oxide was calculated from the capacitance at accumulation mode. This value was used to correct the dielectric constant of SiC film from the capacitance of Al-SiC-1 capacitor. Fig. 4.12 shows the extracted dielectric constant as a function of frequency with temperature as parameters. The Al-SiC-1 capacitor shows temperature independent dielectric constant because thermal oxide is known as an un-polarized dielectric. The slight increase of dielectric constant with decrease of frequency should be attribute to the parasitic effect of the measurement system. The dielectric constant of Al-SiC-1 capacitor at 100℃ is identical to that at 30℃ at all frequencies. However, as the temperature is higher than 150℃, the dielectric constant increases with the decrease of frequency below 500 Hz. These results are consistent with the prior addressed equation (1) and strongly support the proposed mechanism that the observed instability at high electric field is due to dielectric polarization.

It is still interesting to know why the SiC film is polarizable. It is well known that the pure SiC is a tetrahedral molecule such that it is impossible to be polarized.

However, with the additive of nitrogen in SiC film, Si-N chemical bond may be formed and no longer pure tetrahedral structure presents. The nitrogen content in the SiC film determined by RBS and ESCA analysis are 7.62% and 13%, respectively.

The electron binding energies of both silicon and nitrogen atoms determined by XPS analysis are shown in Fig. 4.13(a) and (b), respectively. The Si(2p) peak is centered at 100.98 eV between the binding energies corresponding to SiC (100.6 eV) and SiN (101.8 eV), which indicates Si atoms link to both C and N atoms. The N(1s) peak centered at 397.4 eV also indicated Si-N like chemical bonds [12-13]. It is postulated that these chemical bonds distort the symmetry of the tetrahedral SiC structure and result in polarization phenomenon.

4.3.4 Carrier Injection

Although the instability at high field can be explained by dielectric polarization, the asymmetric Vfb shift at low and medium electric field can not be simply attributed to polarization. Since the Al-SiC-1 capacitor is not a symmetric structure, the asymmetric flat-band voltage shift may be correlated to the asymmetric structure.

Thus another instability mechanism combining carrier injection and weak polarization

is proposed and is illustrated in Fig. 4.14.

As the Al-SiC-1 capacitor is biased at a low positive voltage (<10V), electrons must overcome the energy barrier between Si substrate and the 10 nm thick thermal oxide to be injected into the SiC film. At low electric field (<1 MV/cm), both of direct tunneling and F-N tunneling currents are negligible. Therefore, the small Vfb shift can not be explained by electron injection from substrate. It should be noted that the energy required to rotating the molecular dipole decreases with the increase of temperature. As the Al-SiC-1 capacitor is biased at low electric field but high temperature, slight polarization may occur. This may explain the small Vfb shift after positive electric field stress. Hole injection from gate can also result in a negative Vfb

shift, but the possibility is low because the gate material is metal.

As the Al-SiC-1 capacitor is biased at a low negative voltage, hole injection from substrate is still suppressed by the thermal oxide but electron can be injected easily from gate into SiC film. These electrons are blocked by the thermal oxide and are accumulated in SiC film until the electric field across oxide allows these electrons to tunnel through the oxide layer. Therefore, both of the high temperature enhanced dielectric polarization and the injected and trapped charges in SiC film would cause larger flat band shift after negative electric field stress.

Because the low field instability depends on temperature as shown in Fig. 4.9,

the electron tunneling mechanism must not be F-N tunneling. To find out the exactly carrier injection mechanism for the metal/SiC system, the I-V characteristic of Al-SiC-1 capacitor was analyzed furthermore. Fig. 4.15(a) shows the current density-electric field (J-E) curve of Al-SiC-1 sample at 30℃. The breakpoint around 1.8 MV/cm may be explained by the setup of polarization induced displacement current. The breakpoint around 3 MV/cm might be explained by the turn-on of electron tunneling through thermal oxide because the internal field becomes strong enough. To verify the assumption needs more quantified analysis, which is beyond the scope of this work. Here we only focus on the carrier injection mechanism at electric field below 1 MV/cm. By fitting the J-E characteristic to all possible mechanisms, it is found that the J-E characteristic can be best fitted with the Schottky emission model.

Fig. 4.15(b) shows the fitted result using Schottky emission model.

Because the A1-SIC-1 structure is asymmetric, the behavior of carrier injection is more complicated. An additional confirmation experiment was performed using Al-SiC-MIM structure. Because the Fermi energy of Al is close to that of degenerated n-type Si, the Al-SiC-MIM structure can be treated as a symmetric structure. Fig.

4.16(a) shows the J-E characteristics of the Al-SiC-MIM sample with both of gate injection and substrate injection. The two J-E curves are almost identical especially at electric field lower than 1 MV/cm as expected. The best-fitted carrier injection

mechanism is still the Schottky emission model (Fig. 4.16(b)). It is thus concluded that the dielectric instability at low electric field and high temperature is due to the combination of weak polarization and electron injection via the Schottky emission process, where the electron injection plays the major role.

4.4 Summary

In this chapter, a detail study of SiC electrical properties and instabilities were observed for the first time. It is expected that amorphous SiC deposited by CVD system is the most promising dielectric diffusion barrier to replace SiN in the Cu-interconnect structure. It can also serve as a good etch stop layer if etch stop layer is needed. The basic properties including low dielectric constant, good Cu barrier ability, and low moisture uptake are confirmed in this work and summarized in Table 4-2. By incorporating nitrogen into SiC film, the dielectric constant and leakage current can be reduced. However, the longest TDDB lifetime occurs at moderate nitrogen content. These results indicate that the SiC deposition condition must be carefully controlled to compromising material, electrical and reliability performances

Furthermore, at electric field higher than 1.8 MV/cm, independent of the polarity, charges will be built-up in the SiC film and the Vfb of the MIS structure will shift. The magnitude of Vfb shift in both positive voltage and negative voltage

dielectric polarization model was proposed to explain this high field instability. The origin of dipole is attributed to the incorporated nitrogen atoms, which distort the symmetric tetrahedral SiC molecule. The dielectric polarization is further verified by the symmetric C-V shift under both positive and negative electric field and by the increase of dielectric constant at high temperature and low measurement frequency after electric field stress.

As the stress temperature is raised, C-V shift can be observed at electric field as low as 0.4 MV/cm. If the film structure is asymmetric, Al-SiC-1 structure for example, the magnitudes of C-V shift at positive field and negative field will be quite different.

A carrier injection model combined with the polarization was proposed. It is assumed that slight polarization occurs at such a low electric field because dipole is easier to be aligned at high temperature. But the dominant mechanism is electron injection from metal gate into SiC film via the Schottky emission process. The mechanism is further confirmed using a symmetric test structure of Al-SiC-MIM structure.

Although the metal pitch is scaled down rapidly, the operating voltage is reduced simultaneous. Therefore, the electric field in IMD is always less than 0.5 MV/cm under normal operation. High field polarization will not be issue under normal operation. But, electro-static discharge (ESD) events may expose the IMD to a transient high temperature and high electric field. The dielectric may be polarized by

the transient events. On the other hand, metal contacts with SiC at sidewall of damascene structure directly. The carrier injection from the sidewall contact may result in instability of underlying devices. It is thus recommended that the film properties must be improved and the stability must be carefully evaluated at real circuit level.

Except the metal mobile ions effect in dielectric discussed in Chapter-2, in this chapter we also demonstrate two other different type of mechanisms, dielectric polarization and carrier injection, that would cause dielectric electrical instability. And these two mechanisms model were shown in Fig. 4.11. Table4-4 also summaries the C-V shift behaviors of three different electrical instability mechanisms.

References

1 N. Awaya,; H. Inokawa,; E. Yamamoto; Y.Okazaki,; M. Miyake, Y. Arita, T.

Kobayashi, “Evaluation of a copper metallization process and the electrical characteristics of copper-interconnected quarter-micron CMOS,” IEEE Trans. on Electron Devices, vol. 43, No. 8, pp. 1206-1212, 1996

2 J. Tao, N. W Cheung, C. Hu, ”Electromigration characteristics of copper interconnects”, IEEE Electron Device Letters, vol. 14, No.5, pp. 249-251, 1993 3 T. Lauinger,; J. Moschner,; and A.G. Aberle, “UV stability of highest-quality

plasma silicon nitride passivation of silicon solar cells”, R. Photovoltaic Specialists Conference, Conference Record of the Twenty Fifth IEEE, pp.413-416, 1996

4 S.M. Hu, ”Properties of Amorphous Silicon Nitride”, Journal of Electrochemical Society, vol. 113, No. 7, pp. 693-698, 1966

5 V.Y. Doo, D.R. Nichols, and G.A. Silvey, “Preparation and Properties of Pyrolytic Silicon Nitride”, Journal of Electrochemical Society, vol. 33, pp. 1279-1281, 1966 6 The National Technology Roadmap for Semiconductors, Semiconductor Industry

Association, San Jose, CA, 1999

7 P. Xu, K. Huang, A. Patel, S. Rathi, B. Tang, J. Ferguson, J. Huang and C. Ngai,

“BLOK- A Low-K Dielectric Barrier/Etch Stop Film for Copper Damascene Applications”, IEEE Int. Interconnect Technology Conf., pp. 109-111, 1999

8 E. H. Snow and B. E. Deal, “Polarization Phenomena and Other Properties of Phosphosilicate Glass Films on Silicon”, Journal of Electrochemical Society, vol.

113, No. 7, pp.263-269, 1966

9 E. H. Snow and M. E. Dumesnil, “Space-Charge Polarization in Glass Films”, Journal of Applied. Physics, vol. 37, No.5, pp. 2123-2131, 1966.

10 B. E. Deal, P. J. Fleming, and P. L. Castro, “ Electrical Properties of Vapor-Deposited Silicon Nitride and Silicon Oxide Films on Silicon”, Journal of Electrochemical Society, vol. 115, No. 3, pp. 300-307, 1968.

11 J. D. Jackson, “Classical Electrodynamics”, 3rd. ed., New York: John Wiley &

Sons, pp. 51-162, 1999.

12 J. L. Andujar, G. Viera, M. C. Polo, Y. Maniette, and E. Bertran, “Synthesis of nanosize Si-C-N powder in low pressure plasmas”, Vacuum, vol. 53, No. 1-2, pp.

153-156, 1999.

13 M. M. Guraya, H. Ascolani, G. Zampieri, J. I. Cisneros, J. H. dias da Silva, and M.

P. Cantao, “Bond densities and electronic structure of amorphous SiNx:H,”

Physical Review B, vol. 44, No. 2, pp. 5677-5684, 1990

Table 4-1 The deposition conditions of three SiC films.

Sample N

2

O (sccm) N

2

(sccm) He (sccm)

SiC(1) 300 5000 0

SiC(2) 0 5000 0

SiC(3) 0 2500 2500

Table 4-2 The summarized characteristics of three different SiC films (○: good,

△:medium, 〤: bad)

SiC(1) SiC(2) SiC(3) Dielectric constant 4.09 4.6 5.64

Moisture Immunity 〤 ○ ○

Cu barrier property 〤 ○ △

Leakage current ○ △ 〤

TDDB reliability △ ○ 〤

Table 4-3 The flat-band voltage measured with various DC voltage sweep range. FVS : from accumulation mode to inversion mode. RVS : from inversion mode to accumulation mode.

Sweep range FVS RVS

10V~-10V -2.06 -2.08

15V~-15V -2.04 -2.09

18V~-18V -1.8 -2.08

20V~-20V -0.6 -1.76

25V~-25V 3.22 -4.32

30V~-30V 10.2 -14.72

35V~-35V 15.27 -17.43

40V~-40V 20.12 -21.24

Table 4-4 C-V shift behaviors of three different electrical instability mechanisms

Instability

Mechanism Flatband Voltage (C-V) Shift

Dielectric Constant

Mobile Ions Asymmetric

Saturation

Polarization Symmetric Saturation Voltage dependent

History

independent Altered

IMD IMD IMD

Etch stop layer Etch stop layer

Dielectric diffusion barrier

Dielectric diffusion barrier

M1 M2

Fig. 4.1 Schematic structure of Cu-interconnect fabricated by dual-damascene process.

P-Si

Fig. 4.2 Schematic structures of the MIS capacitors used in this work. Al-SiC-1 : Al (500 nm)/ SiC (90 nm)/ SiO2 (10 nm)/ Si. Cu-SiC-MIM : Cu (500 nm)/ SiC (90 nm)/n+-Si. Cu-SiC-1 : Cu (500nm)/ SiC (90nm)/ FSG(750nm)/ Si. Cu-FSG-1:

Cu (500nm)/ FSG(750nm)/ Si. Al-SiC-MIM : Al(500nm)/ SiC (90nm)/ n+-Si.

Al-SiO2-1 : Al / SiO2 (10 nm)/ Si

100 200 300 400 500 600 200

400 600 800 1000

1200 SiC(1)

SiC(2) SiC(3)

Ion intensity (pA)

Temperature (

^o

C)

Fig. 4.3 TDS analysis of H2O molecules of the three different SiC films stored in cleanrrom for 2 weeks

0 500 1000 1500 2000 2500 10

¹⁴

10

¹⁵

10

¹⁶

10

¹⁷

10

¹⁸

10

¹⁹

10

²⁰

10

²¹

90nm SiC-1

SiC-2 SiC-3

Cu Ion Counts

Depth (Angstroms)

Fig. 4.4 SIMS depth profiles Cu ions in the three different SiC films after BTS at +2MV/cm and 200℃ for 500 minutes stress.

0.0 0.5 1.0 1.5 2.0 2.5

Fig. 4.5 (a)Vfb shift value of Cu-SiC-1 and Cu-FSG-1 capacitors after BTS (b) C-V characteristics of the Cu-MIS-1 sample after BTS for various lengths of time.

0 5000 1000015000200002500030000

Fig. 4.6. The leakage current and breakdown phenomenon of Cu-SiC-MIM capacitors under electric field stress at (a) 2MV/cm and 150℃ (b) 3MV/cm and 200℃.

-40 -20 0 20 40 60

120 180 240 300

Original 2nd FVS

1st RVS

2nd RVS

1st FVS

Capacitance (pF)

Voltage (V)

Fig. 4.7 The high frequency C-V characteristics of Al-SiC-1 sample measured in both of the FVS and RVS modes for two cycles. The voltage range is –40 to 40 V.

-10 -5 0 5 10

-10 -5 0 5 10 60

120 180 240 300

Original (c)

-0.6MV/cm

+0.6MV/cm

Capacitance (pF)

Voltage (V)

Fig. 4.8 Capacitance-voltage curves of Al-SiC-1 samples measured at room temperature after BTS at 200 ℃ for 3 hours. The electric field strengths are at (a) ±0.4; (b) ±0.5, and (c) ±0.6 MV/cm.

-10 -5 0 5 10

Fig. 4.9 Capacitance-voltage curves of Al-SiC-1 samples measured at room temperature after BTS at (a) 150 and (b) 175 ℃ for 3 hours. The electric field was fixed at ±0.5 MV/cm.

-14 -7 0 7 14

Fig. 4.10 Capacitance-voltage curves of Al-SiC-1 sample after continuous electric field stress. At (a) –20 V (-2 MV/cm) and (b) +20 V (+2 MV/cm). The temperature was fixed at 25 ℃.

Al

+ +

-- +

- +

-SiC SiC

+

-+

-P-Si P-Si

SiO

₂

SiO

₂

+Vg -Vg

Fig. 4.11 Schematic illustration of proposed polarization model for electrical instability of SiC film at high electric field and low temperature.

100 1k 10k 100k

4.0 4.5 5.0 5.5 6.0

SiO ₂ SiC Film

150

^o

C 100

^o

C

30

^o

C

30

^o

C 200

^o

C

200

^o

C

Dielectric Constant

Frequency (Hz)

Fig. 4.12 Extracted dielectric constant of SiC film as a function of frequency with temperature as parameters. Before measurement, Al-SiC-1 samples were biased at –40 V for 2 minutes at room temperature. Results of SiO2 measured from Al-SiO2-1 sample are also shown in the figure.

402 400 398 396 394 40

60 80 100 (a) 120

N(1s) 397.4 eV

Intensity (arb. unit)

Binding Energy (eV)

108 0 105 102 99 96

30 60 90 (b) 120

Si(2p) 100.98 eV

In tensit y (arb. unit)

Binding Energy (eV)

Fig. 4.13 XPS spectrum of SiC film shows (a) Si(2p) and (b) N(1s) electron binding energy.

P-Si

SiO

₂

P-Si

SiO

₂

SiC SiC

+

-+

-+Vg -Vg

Fig. 4.14 Schematic illustration of proposed instability mechanism combining carrier injection and weak polarization to explain electrical instability at low electric field but high temperature.

0 1 2 3 4

600 800 1000 1200 1400

-32.90

Fig. 4.15 (a) Current density-electric field (J-E) curve of Al-SiC-1 sample at 30℃. (b) The measured J-E curve at low electric field (<1 MV/cm) can be well fitted by Schottky emission model.

0.0 0.5 1.0 1.5 2.0

Fig. 4.16 (a) Current density-electric field (J-E) curve of Al-SiC-MIM sample at 30℃. (b) Because of the quasi-symmetric sample structure, the measured J-E curve at all electric field range can be well fitted by Schottky emission model.

Chapter 5

A Novel Wafer Reclaim Method for Silicon Carbide Film and Carbon Doped Oxide Low Dielectric

Constant Films

5.1 Introduction

According to the results presented in chapter 4, it is expected that amorphous SiC (a-SiC) film deposited by chemical vapor deposition method will replace SiN in the Cu dual-damascene structure as a Cu dielectric diffusion barrier and/or etching-stop layer in order to further reduce circuit delay and thus improve circuit performance [1-2]. The a-SiC film is chemically inert and hard to etch by wet processing. These properties are benefits from the process point of view. However, they become adverse effects from the wafer reclaim point of view. On the other hand, lots of low-k materials are developed every year. We have demonstrated in chapter 3 that carbon doped oxide (CDO) and porous carbon doped oxide are very promising low-k materials for different generations Cu interconnect applications [3-8].

In the back-end-of-line (BEOL) process, fabrication parameters such as film thickness, thickness uniformity, film composition, particle counts, etc. must be

carefully and precisely controlled. Therefore, lots of monitor wafers must be used to optimize the film deposition condition during process development and to monitor the process stability during mass-production daily. Wafers deposited with a-SiC or low-k films must be reclaimed to reduce wafer cost. Unfortunately, there is no universal chemical solution that can etch a-SiC film and various low-k films. Wafer polish becomes the only method to reclaim these wafers, but the cost of wafer polish is high.

Furthermore, the over polish of Si substrate limits the reclaim times.

In this chapter we report the phenomenon and kinetics of thermal oxidation of

In this chapter we report the phenomenon and kinetics of thermal oxidation of

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