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Edge Direct Tunneling and Modeling Description

Chapter 2 Effective Channel Length Extraction

2.4 Edge Direct Tunneling and Modeling Description

The EDT (edge direct tunneling) method in this thesis is based on the triangular potential approximation. The detailed triangular potential profile for nMOSFET devices is schematically shown in Fig. 5. When MOSFET devices are operated under accumulation or inversion conditions, corresponding band bending at n+ poly-gate surface or silicon-substrate surface can be characterized by a triangle-like electrostatic potential well. Replacing the electrostatic potential in Shrödinger wave equation with the triangular potential leads to the Airy equation with solutions, which is called the triangular potential approximation method. We can derive the quantized energy of the first subband directly with this approximation [9], [17]

(2.14)

The voltage balance relationship for an nMOSFET device operated under accumulation conditions as illustrated in Fig. 6, can be expressed as

(2.15)

V

dg

V

FB

( ≅ 0 ) = V

ox

+ V

poly

+ V

DE

where VFB is the flat-band voltage, Vox = toxFox is the potential drop across the oxide, Vpoly is polysilicon depletion potential drop, and VDE is the band bending in the drain extention region. The accumulated charge Q available for the tunnel process mainly populates in the first subband E1 due to the lowest quantized energy dominating. This sheet charge density Q here is modeled as field induced and related to the number of occupied subband states, which can build up the charge conservation relationship [9]

(2.16) ox

(

fn

)

2d

where Efn is the quasi-Fermi level in the n+-poly gate and η is the degeneracy factor. By applying the lowest subband approximation to the accumulated n+-poly gate and the depletion approximation to the drain diffusion extention, we get [9]

where NDE is the dopant concentration of the drain diffusion extention. For

<100> oriented n+-polysilicon grains, mz=0.98mo, md=0.19mo, and η=2 were adopted to approximate the band structure [2]. The edge tunneling current here is modeled by incorporating the accumulation layer quantization effect with a finite potential barrier height as the boundary condition and choosing a modified Wentzel-Kramers-Brillouin (WKB) method [2] to calculate the electron tunneling probability. Then within the effective mass approximation, the

tunneling probability can be expressed as

(2.19)

T = T

WKB

× T

R

where TWKB is the usual WKB approximation of the tunneling probability for slowly varying potentials, and TR is the correction factor taking into account the reflections from potential discontinuities. The SiO2 band-gap dispersion relation is modeled as the Franz-type E-k dispersion relation [18]

(2.20)

= = ⎜ − ⎟

Here kox and vox are the purely imaginary wave vector and group velocity of electrons within the oxide gap energy, respectively. Eox is the magnitude of the electron energy with respect to the oxide conduction band edge, mox = 0.61mo is the effective mass in the oxide based on the Franz-type dispersion relationship, and Eg @ 9 eV is the band gap for SiO2. With these conditions shown in Fig. 7,

where qψcat and qψan are the net barrier heights for the electrons at the cathode

( )

and anode interfaces, respectively. They are expressed as

(2.23)

q φ

cat

= q χ

c

( E

1

+ E

2

)

(2.24)

q q ( )

where qχc @ 3.15eV is the discontinuity between the silicon and the SiO2

conduction bands [2],[3]. The correction factor TR is obtained by considering reflections from the material interfaces as

(2.25)

where vSi,^(E1) and vSi,^(E1+qVox) are the interface-normal component group velocities of the electrons incident onto and leaving from the oxide, respectively.

With the oxide potential drop Vox, voxcat) and voxan) are the imaginary group velocities of the electrons at the cathode and anode side within the oxide, respectively. The tunneling lifetime of the electrons from the lowest subband can be connected with the tunneling probability, as defined below [3]

(2.26)

With the established relation between the accumulated charge and the tunneling lifetime to oxide field, the edge direct tunneling current can be calculated analytically with the estimated effective edge-tunneling area ( LTN × W ):

(2.27)

I

EDT

= × ( )

where LTN is the estimated value of the drain diffusion extension length and W is the channel width of the MOSFET device. In conclusion, the process flow for this EDT model operation is drawn in Fig. 8. With IEDT fitting to the experimental data, LTN can be evaluated, leading to quantified ΔL:

(2.28)

W τ L

Q

TN 1

×

L 2L Δ =

TN

Like the capacitive method, this EDT method also has no assumption regarding the mobility. It might be feasible to extract Leff for highly scaled MOSFET devices with the EDT method becauce the EDT method has no apparent equipment detection limit which is the major problem for the capacitive method. In addition, the EDT method was involved with the huge leakage current which is the universal phenomenon for highly scaled MOSFET devices with ultra-thin oxide.

It must be noted that the above-mentioned EDT model is for nMOSFETs because the major objects examined in this thesis are nMOSFETs. However, the framework of the EDT model for pMOSFETs is similar to that for nMOSFETs except for the complicated effective mass of hole which is the major carrier of pMOSFETs and the energy band structure [24].

Chapter 3

Key Parameters Extraction

3.1 Threshold Voltage Extraction

Before extracting the series resistance and effective mobility, the first job is to extract the threshold voltage (Vth). For MOSFET devices, the Vth is a fundamental parameter which represents the onset of the noticeable drain current flow, and is also recognized as the critical gate voltage at which the transition between weak and strong inversion arises in the MOSFET channel [19]. In correct extraction of Vth leads to significant errors in extracted effective mobility as mentioned in [20], and therefore, accurate Vth extraction is necessary.

Many Vth extraction methods have been developed as introduced in [19].

Those extraction methods are mostly done with a low drain voltage so that the devices operate in the linear region. The extrapolation line in the linear region (ELR) method is the most popular Vth method. It is the common practice to find the Vth as the gate voltage axis intercept (i.e., Id = 0) of the linear extrapolation of the Id-Vgs characteristics at the maximum transconductance. One of the Vth extraction methods developed to avoid the dependence on the series resistances is second-derivative (SD) method. It determines the Vth from the peak of dgm/dVgs = d2Id/dVgs2 (the derivative of the transconductances).

3.2 Series Resistance Extraction

When the Vth of the MOSFET device is extraced, the next task is to extract the series resistance Rsd. The Rsd extraction method used here is based on the constant-mobility bias conditions as recently introduced in [10]. Regarding the mobility, it is convenient to express the effective mobility

µ

eff in terms of either the inversion layer charge or the effective surface vertical field Eeff for the basic

surface studies [20]. The typical relationship between the measured

µ

eff and Eeff

at the Si/SiO2 interface under different body-voltage (Vbs) conditions is schematically shown in Fig. 9. The behavior of

µ

eff can be elucidated with the Eeff expression given by [10]

(3.1)

E = ⎜⎜ Q + Q ⎟⎟

inv dep

si eff

1 1

η ε

where εSi is the silicon permittivity, η is an empirical factor with the value @ 2 generally used for electron carriers at room temperature, Qinv is the inversion-layer charge, and Qdep is the depletion-layer charge. The different Vbs conditions resulting in Qdep variance can be interpreted with the following formula

(3.2)

Q

dep

= 2

si

N

sub

[ φ

S

(V

g

)V

bs

]

where Nsub is the doping concentration of silicon substrate estimated by C-V curves fitting along with Poisson-Schrödinger self-consistent simulations, and ψs is the substrate band bending. In low Eeff (low-Vg) regime, the quantity of the Qdep is compared with the Qinv, leading to the obvious fluctuations of Eeff under different Vbs conditions. On the contrary, the variances of the Qdep under different Vbs conditions cannot be compared with the Qinv component in high Eeff region because the Qinv is much larger than the Qdep in amount. Hence, the

µ

eff under different Vbs conditions has the behaviour that disperses in low Eeff region and converges toward one universal curve when Eeff is sufficiently high. The other expression of Eeff can be described as [10]

(3.3)

where VFB is the flatband voltage, ψB is the potential difference between the Fermi level and the intrinsic Fermi level, and V

B

th is the threshold extracted with Id- Vgs data via gm-method. For a single device, both VFB and ψBB essentially remain intact under different bias conditions. Thus, the formula (3.3) implies that a constant Eeff can be preserved from Vgs(1) and Vth(1) to other biases Vgs(2) and Vth(2) under different Vbs conditions. In other words, we can keep the fixed Eeff by adjusting the Vgs and Vth simultaneously which satisfy the following expression [10]

(3.4)

Eventually, the constant-mobility bias conditions are established on the basis of the above-mentioned theory.

By integrating the constant-mobility criterion into the Id equation of MOSFET devices operating in the linear region, the results for the two specific bias conditions (individually labeled with the superscript 1 and 2) are

(3.5)

(3.6)

The Rsd expression can be derived by dividing (3.5) by (3.6) under the constant-mobility conditions, i.e.

µ

(1) =

µ

(2) under a high Eeff

(3.7)

After the treatment the effective channel length Leff, the effective channel width Weff, and the inversion gate-oxide capacitance Cox are canceled out because they are identical for a single device. This distinctive property makes this Rsd extraction method immune to the process variation for highly scaled MOSFET devices where the explicit definitions of Leff, Weff, and Cox are difficult to procure.

3.3 Effective Mobility Extraction

The effective mobility in MOSFET devices is a key parameter to describe the carrier transport and a also probe to study the electric properties of a two-dimensional carrier system. In order to extract the

µ

eff, one of the most powerful methods is the combination of split capacitance-voltage (C-V) measurments, which are to deal with the used inversion and depletion charges, and linear Id-Vgs measurements [6]. Fig. 10 schematically shows the equivalent circuit of a MOSFET device. If we take the Rsd into account in (2.1), the drain and source voltages are rewritten [21]

(3.10)

V

ds

I

d

R

sd

= V

ds

'

(3.11)

I R

sd

V '

device is operated in the linear region (Vgs-Vth >> Vds). The series resistances can be considered nearly the same between the drain and source. With the formulas (3.10) and (3.11), the Cox(Vgs-Vth-0.5Vds) factor in (2.1) is kept

The inversion charge Qinv under strong inversion condition, which is used in evaluating

µ

eff and Eeff, can be approximately expressed [22]:

⎟ ⎠

The approximation made in (3.13) is frequently employed to extract the mobility, but it leads to large errors in extracting mobility around the Vth. There are two essential approahes to improve the accuracy of (3.13) in extracting

µ

eff [20]. One is to measure the gate-to-channel capacitance Cgc and obtain the Qinv from the voltage integral of the Cgc [4], [6], [23]. The second approach is to perform a split C-V measurement to get C-V characteristics, then comparing the experimental and the simulated C-V characteristics (via Poisson-Schrödinger

self-consistent simulations) to obtain the Qinv.

Futhermore, it must be noted that the Vth through calculated Qinv may not be exactly equal with that of Id(Vgs), especially for different devices. For this reason, we can extract the

µ

eff more accurately by shifting Qinv characteristics such as to compensate for the Vth discrepancy [4], [20]. Finally, the expression of

µ

eff can be deduced from (2.1), (3.10), and the obtained Qinv

(3.14)

⎟ ⎟

⎜ ⎜

⎟⎟ ⎠

) (V Q

1 V

) (V I W L

g inv ds

gs eff d

eff

= ⎜⎜ '

μ

Chapter 4

Experimental Data and Interpretations

The halo-implanted bulk n-channel MOSFET devices with the gate width of 10µm, 1µm, 0.6µm, and 0.24µm under investigation were fabricated in a state-of-the-art manufacturing process. The major parameter extractions are focused on the nMOSFET devices with the channel length from 0.05µm to 0.1µm. Fig. 11 schematically shows the flowchart summarizing the procedures of

µ

eff extraction. In the flowchart diagram, the bold, solid line, and dashed dots blocks indicate the expreimental data, extracted parameters, and simulated results during the measurements, respectively.

The objective for the C-V measurement is extracting the oxide thickness tox, the dopant concentration of poly gate Npoly and substrate Nsub, and the effective channel length Leff of the devices. The C-V characteristics of an nMOSFET device are measured by means of the HP4284A LCR meter, followed by parameter extraction by comparing the measured and simulated C-V characteristics of an nMOSFET device. With the extraction results shown in Fig.

12, we get tox = 1.215 nm, Npoly = 4×1019 cm-3, and Nsub = 4×1017 cm-3.

I-V measurement includes Id-Vgs and Ig-Vgs characterizations for an nMOSFET device. The Id-Vgs and Ig-Vgs experimental data are obtained by HP4156B semiconductor parameter analyzer, which are adopted for the extractions of series resistance Rsd, threshold voltage Vth, oxide thickness tox, effective channel length Leff, and the dopant concentration of the drain extension NDE.

After performing the I-V measurement, the first task is to extract the Vth for nMOSFET devices. The comparision between the Vth extracted by extrapolation line in the linear region (ELR) method and that by second-derivative (SD)

method is shown in Fig. 13, which indicates more obvious difference of Vth values with shorter channel devices. Because the Rsd extraction via the Vth values in ELR method shows more consistent results than that with the Vth

values extracted by SD method generally, the subsequently extraction procedures of Rsd and

µ

eff would use the Vth values extracted by ELR method.

Fig. 14 and 15 present the Leff extraction results for the W/L = 1μm/0.1 μm nMOSFET device by both the channel-resistance method and the shift-and-ratio (S&R) method. The channel-resistance method fails because there is no explicit intersect point of the Rtot-L characteristics for different gate voltages, and the Leff

extraction results from the S&R method appear to be overestimated. Thus, we continue to try Leff extraction with the capacitive method. The experimental Cgc(Vgs) curves for several nMOSFET devices with a largest width plotted in a logarithm scale are plotted in Fig. 16. The Leff extracted by the constant ΔL method and the individual ΔL method are displayed in Fig. 17 and 18, respectively. The corresponding Leff values for L = 1um are 61.57nm and 75.45nm. Furthermore, the EDT method is adopted for narrower and shorter devices under which the capacitive method can not work well. Fig. 19 demonstrates the example of EDT method for the W/L = 1μm/0.1 μm nMOSFET device, which leads to Leff = 72nm by comparing the measured (triangular symbol) Ig-Vgs characteristics with the simulated (solid curve) under accumulation conditions. Subsequently, the statistical analysis of the relations between ΔL and gate length and width is shown in Fig. 20 and 21, respectively.

The figures reveal that the EDT method can preserve considerable accuracy for the narrower and shorter devices. Fig. 22 exhibits the Leff behavior with different gate lengths. It must be noted that the difference between Leff and L becomes larger with shorter channel length.

After finishing the Leff extraction, we proceed with the Rsd extraction by the constant-mobility method. As demonstrated in Fig. 23, the Rsd value for the W/L

= 1μm/0.1 μm nMOSFET device is extracted by estimating the value with the universal curve at high Eeff. Fig. 24, 25, and 26 show that the Rsd values apparently reduce with shorter devices, and have no visible dependence on the width and overlap length.

When the Leff and Rsd are extracted further, we can accurately carry out the

µ

eff extraction for highly scaled nMOSFET devices accordingly. Fig. 27 displays the resulting

µ

eff curves of the W/L = 1μm/0.1μm nMOSFET device with raw data also shown are corrected Leff , Rsd, and both Leff & Rsd corrected. The variations of the peak mobility induced by overlap length for nMOSFET devices with different length and width are shown in Fig. 28 and 29, respectively. They illustrate that the mobility variations caused by overlap length are bigger with short devices but seem to be a weak function of the width. The variations of the mobility induced by Rsd at Vgs = 1.5V (higher Eeff) for nMOSFET devices with different length and width are also illustrated in Fig. 30 and 31. As can be clearly seen, the variations of the mobility result from the Rsd seemingly decrease with shorter length because the Rsd values reduce slightly with decreasing gate length. In addition, the Rsd induced mobility variations are connected with ΔL factor, rather than the width. At the end, the comparision between the raw and the corrected µeff values at Vgs = 1.5V are exhibited in Fig.

32 and 33 for different lengths and widths. The corrected µeff value for L = 0.1 µm nMOSFET device arises because the deviation caused by Rsd is worse than that of ΔL. However, with device length scaling, the deviation caused by ΔL is larger than that by Rsd for highly scaled devices. From Fig. 32 and 33, the µeff

deviations tend to increase with reduced device length; nevertheless, it appears that the deviations are independent of the device width.

Chapter 5 Conclusion

The novel key parameter extractions for highly scaled MOSFET devices have been systematically executed. First, the Rsd extraction with constant-mobility method neither considers the mobility dependence on channel length nor requires the precise values of mobility and channel length. Moreover, it provides immunity against process variation. Second, the problems of the Leff extraction with capacitive method such as the gate leakage issue and the equipment detection limit, have been solved with the EDT method. Furthermore, for more accurate extraction of process parameters such as Nsub, Npoly, NDE, Qinv, and tox, the EDT method and split C-V measurement can complement each other.

Because of the above-mentioned reasons, the

µ

eff eventually can be extracted accurately. Moreover, the extraction methods also furnish the convenient and fast approaches that do not need to perform measurements in a large device sample size.

References

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