5.8 Simulation Results
5.8.2 Error probability performance
Computer simulation results reported in this section firstly use the RSC code of the 3GPP standard, G(D) = h
1,1+D1+D+D2+D33
i [1], the interleaver of the same standard or the
modified semi-random interleaver of eqn. (5.30) for the intra-block permutation while the S-IBP follows the algorithm of Table 5.1. Each simulation run consists of 1000 blocks for S-IBPTC. We use the Log-MAP or MAX-Log-MAP algorithms to decode classic TC
0 2 4 6 8 10 12 14 0
2 4 6 8 10 12 14
S-IBPTC 0.5dB 1.0dB Turbo Code 0.5dB 1.0dB 1.5dB 2.0dB SNR of a priori information of 2nd decoder = SNR of extrinsic information of 1st decoder
SNR of a priori information of 1st decoder
= SNR of extrinsic information of 2nd decoder
Figure 5.9: SNR evolution chart behavior of the S-IBPTC and the classic TC at different Eb/N0’s.
and stream-oriented TP-IBPTC (S-TP-IBPTC) and the sliding-window Log-MAP or the sliding-window MAX-Log-MAP algorithms to decoding stream-oriented TB-IBPTC (S-TB-IBPTC) and S-C-IBPTC. In most cases, we compare the performance of classic TC and S-IBPTC under the assumption that either both codes have the same interleaver delay.
Figs. 5.11 and 5.12 show the BER performance of rate 1/3 turbo coded systems with 10 iterations and Log-MAP algorithm. The interleaver parameter values for the S-IBPTCs are L = 402, S = 1 or L = 265, S = 2. Compared with the performance of the classic TC with L = 400, the S-IBPTCs yield 0.7–0.9 dB performance gain at BER=10−4 and 1.0–1.2 dB gain at BER=10−6. When both codes have the same interleaver delay, the S-IBPTCs provides 0.4–0.6 dB performance gain at BER between 10−4 and 10−6.
Figs 5.13 and 5.14 show the BER performance of rate 1/2 turbo coded systems. The MAX-Log-MAP algorithm is used in this example. We compare the performance of the classic TC with L = 1320 and the S-IBPTCs with L = 660, S = 1 and L = 440, S = 2.
Using L = 660, S = 1 and the 3GPP interleaver as the intra-block permutation, the
1 2 3 4 5 6 0.2
0.4 0.6 0.8 1.0
Covariance of a priori information of two bits in one symbol
Number of iterations
Bit-level S-IBP SNR=0.5dB SNR=1.0dB Symbol-level S-IBP
SNR=0.5dB SNR=1.0dB
Figure 5.10: A comparison of covariance of bit-level and symbol-level IBP.
S-IBPTCs have 0.4–0.45 dB and 0.3 dB gain at BER=10−5 and 10−6, respectively. For other cases, the S-IBPTCs give 0.4–0.45 dB gain at BER=10−5 and 0.4-0.6 dB gain (except for the case S-TP-IBPTC with L = 440, S = 2) at BER=10−6. It is clear that the S-IBPTCs outperform the classic TCs with nearly the same interleaver delay.
Furthermore, the proposed modified s-random interleaver outperforms the 3GPP defined interleaver, especially when the interleaver span is small S = 1.
These figures reveal that the proposed S-IBPTCs yield superior performance, sharper slope of the BER curve at the waterfall region and lower error floor when compared with the corresponding performance curves of the classic TCs for a variety of different code rates and decoding algorithms. The improvement is more impressive for smaller block interleaver with the same interleaver delay, i.e. a larger S-IBP interleaver span S leads to better performance.
Fig. 5.15 shows the BER performance of rate 1/3 S-IBPTCs that use the 3GPP interleaver as the intra-block interleaver. Either the MAP algorithm or the Log-MAP algorithm is used and 15 decoding iterations is assumed. All these S-IBP parameter
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Figure 5.11: BER performance of the S-IBPTCs with interleaver delay ≈ 800, block size L = 402 and interleaver span S = 1 and the classic TCs with block sizes L = 400, 800.
values, (L, S) = (660, 1), (440, 2) or (330, 3), give the same interleaver delay of 1320 bits.
The performance is consistent with our prediction: the larger the interleaver span is, the better the system performance becomes. The performance deteriorates when the period of encoder, Tc, and the period of the S-IBP interleaver, Ts, are the same. For this case the lower-bound of eqn. (3.16) becomes 2(1 + α + β) which is much smaller than the corresponding upper-bound given in Theorem 3.2. By contrast, the two bounds are much closer if Tc 6= Ts and both bounds give identical value if Tc and Ts are relative prime.
Finally, we want to show that the S-IBPTC requires an interleaver latency much smaller than that of classic TCs with similar BER performance. Fig. 5.16 shows the BER performance of rate 1/3 turbo coded systems that employ 10 decoding iterations and the Log-MAP algorithm. All the interleavers are taken from the 3GPP interleaver.
The average interleaver and deinterleaver latency of the S-IBPTCs is about 800. It is observed that the performance of the S-IBPTCs is bounded by those of turbo codes with block size L = 2800 and L = 3600. In other words, an S-IBPTCs achieves BER
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Figure 5.12: BER performance of the S-IBPTCs with interleaver delay ≈ 800, block size L = 265 and interleaver span S = 2 and the the classic TCs with block sizes L = 400, 800 are also given.
performance similar to that of a classic TC which requires an interleaving latency 3.5 to 4.5 times longer.
All these figures show that the S-TB-IBPTC has the best performance, followed by the S-C-IBPTC and then the S-TP-IBPTC.
This part evaluates the performance of stream-oriented IBP duo-binary turbo code (S-IBPDTC) and compare with the duo-binary turbo code (DTC) defined in DVB-RCS/RCT [37, 38]. The RSC code, G(D) = defined in the DVB-RCS/RCT [37, 38] is used as the component code. The stream-oriented IBP duo-binary turbo code (S-IBPDTC) applies the 53Bytes DVB-RCS/RCT interleaver as its intra-block permutation and the bit-level and symbol-level S-IBPs ap-plies the algorithm shown in Table 5.1. The DTCs with 53Bytes and 106Bytes inter-leavers are simulated as reference curves. Each simulation run consists of 1000 blocks for the S-IBPDTC. Sliding window Log-MAP and sliding window MAX Log-MAP al-gorithms are also used in this simulation. Fig. 5.17 shows the simulation results. The
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 1E-7
1E-6 1E-5 1E-4 1E-3 0.01 0.1 1
R=1/2 PCCC 8-state (15/13) 10 iterations MAX Log-MAP 3GPP interleaver
S-IBPTC S-TP-IBPTC
L=440,S=2 L=660,S=1 S-TB-IBPTC
L=440,S=2 L=660,S=1 S-C-IBPTC
L=440,S=2 L=660,S=1 Turbo Code
L=1320
Bit Error Rate
Eb/N
0 in dB
Figure 5.13: BER performance of S-IBPTCs and the classic TC with interleaver delay 1320 and the 3GPP interleaver.
bit-level and symbol-level S-IBPDTCs outperform the DTC with 53Bytes by 0.8−1.0dB and 0.6 − 0.8dB at block error rate (BLER)=10−4. If we consider the same interleaving delay, the bit-level and symbol-level S-IBPDTCs outperform the DTC with 53Bytes by 0.5 − 0.9dB and 0.2 − 0.6dB at BLER=10−4. Under the same block size or identical interleaving delay, the S-IBPDTC outperforms the DTCs.
The comparison between the bit-level and symbol-level IBPs is also of our interest.
The symbol-level IBP outperforms the bit-level IBP at low SNR but loses at high SNR.
This implies that the bit-level IBP provides better distance property than the symbol-level IBP. However the bit-symbol-level IBP necessities the marginalization for conversion from a symbol to two bits on the decoder and this induces information loss. If the target BLER is on 10−2, the symbol-level IBPDTC is a better choice. If the target BLER is on 10−4 or lower, the bit-level IBPDTC is our favorite.
0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Figure 5.14: BER performance of S=IBPTCs and the classic TC with interleaver delay 1320 and the modified semi-random interleaver.
0.0 0.2 0.4 0.6 0.8 1.0 1.2
Figure 5.15: Influence of the interleaver span on the BER performance for various S-IBPTCs with interleaver delay 1320.
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
Figure 5.16: BER comparison of S-IBPTCs and the 3GPP defined turbo code of various block sizes.
Figure 5.17: A comparison of S-IBPDTC applying bit-level and symbol-level IBP with DTC using both Log-MAP and MAX Log-MAP APP decoders.
Chapter 6
Dynamic IBPTC decoder and stopping criteria
This chapter presents a novel dynamic decoder architecture for IBPTC. A general multiple-round stopping test and a memory manager are proposed as an integrated part of the decoder. A scheduler is needed to coordinate the shared hardware resources, namely, the APP decoding units and memory storage. The scheduler can arrange the processing procedure of these APP decoders in accordance with the pipeline decoder and the dynamic decoder can reach the same performance; the decoder implementa-tion trade-off between decoder complexity and decoding throughput is easily achievable.
The dynamic decoder can implement stopping test inside to early stop decoding; the computation complexity or power consumption is further reduced. If the dynamic de-coder decodes an S-IBPTC, the storage of received samples and extrinsic information can be further released in advance by the result of stopping test and the necessary storage of the dynamic decoder can be less comparing to that of the pipeline decoder.
The highly reliable multiple-round stopping test provides extra information assisting in decoding neighboring unstopped blocks; this decreases both the number of average decoding rounds and error rates. Therefore the joint stopping mechanism dynamic de-coder not only requires less hardware complexity but also achieves better error rate and average decoding rounds performance comparing to the pipeline decoder. The following sections will describe the dynamic decoder and the associated modification in reducing
complexity and power consumption for S-IBPTC. The multiple-round stopping test will be described in the later section.
6.1 IBP turbo coding system with stopping mecha-nism
This section presents a reliable stopping mechanism for an IBPTC codec system.
The extrinsic information used in a conventional turbo decoder is usually generated in the course of decoding a component code and there are many well-developed soft output decoding algorithms. An error detection code that is often used in a packet switching network can also generate extrinsic information with no extra cost/complexity when the corresponding undetectable error probability is negligibly small. However, the detector output is generally used for making a stopping decision only. In order to utilize this stopping message, we can partition an information sequence into multiple blocks and these blocks are separately CRC-coded. If one block is stopped and some blocks are unstopped, the “pass” message can be passed to the unstopped blocks as the a priori information. IBPTC suits this nature and can have better performance by paying little incremental complexity and slightly extra CRC overhead. The detail will be expounded in the following subsections.