• 沒有找到結果。

Fabrication and measurement for amorphous silicon thin film solar

3.1 Experimental Procedures

In this thesis, we employed the structure of the superstrate p-i-n hydrogenated amorphous silicon solar cells, and the solar cell structure employed was glass (Asahi's textured TCO Glass)/front ZnO/p-i-n/back ZnO/Ag with an active of 0.25 cm2. The device deposition condition: front ZnO contact layer was deposited ZnO:Ga with 20 nm thickness by sputter. All (a-Si:H) p, i, and n layers were subsequently deposited with very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) [3.13-17] multi-chamber system at 40 MHz. In deposition window layer (P-layer) process, the p-layer were deposited μc-Si:B and a-SiC:B and a-SiO:B thin films with 20 nm thickness at different devices, respectively. The intrinsic layer was deposited a-Si:H with 400 nm thickness. The n-layer was deposited a-Si:P with 30 nm thickness.

Back ZnO contact layer was deposited ZnO:Ga with 100 nm thickness by sputter.

Back Silver metal layer was deposited Ag with 200 nm thickness.

The solar cells were characterized by current–voltage (J–V) under standard air mass 1.5 (100mW/cm2) illuminations. The current-voltage characteristic measurement of thin film solar cell devices was performed by Agilent 4156, capacitance profiling by drive level capacitance profiling methods have been carried out by using an HP 4284A impedance meter.

3.2 Results and Discussion

Figure 3.1 shows current-voltage characteristics of amorphous silicon thin film solar cells under standard illumination conditions. These devices were varied films for window layer, and the films represent μc-Si and a-SiC and a-SiO, respectively. We

15

could observe that open circuit voltage (Voc) is maximum for a-SiO window layer;

and is medium for a-SiC window layer; and is minimum for μc-Si window layer.

However, shirt circuit current (Jsc) is maximum for μc-Si window layer; and is medium for a-SiO window layer; and is minimum for a-SiC window layer. Table 3-1 summarizes the illuminated J–V parameters of a-Si:H p–i–n solar cells obtained for varied window layers. Because the value of Voc is the difference between EFn and EFp

and energy band gap (Eg) which is larger could extend the difference between EFn and EFp. And energy band gap of a-SiC window layer is larger than of μc-Si window layer.

Hence, the larger Eg would obtain the larger Voc for a-SiC window layer. Although the value of Jsc for a-SiC window layers is poorer than for μc-Si window layer, the whole of conversion efficiency have improve. Here the reason for Jsc have dropped, we deduce that this phenomenon are associated with the quality of intrinsic layers and the conductivity for window layer. Follow-up, we would make use of a technique of drive-level capacitance profiling (DLCP) measurement to examine the quality of intrinsic layers.

Figure 3.2(a)-3.4(a) show typical capacitance-voltage curve of the variation of junction capacitance with 100Hz for varied window layers of p-i-n a-Si solar cells at room temperature, respectively. Figure 3.2(b)-3.4(b) show NDL versus depletion width for varied window layers of p-i-n a-Si solar cells at room temperature, respectively.

We could observe that number of defects in the vicinity of the intrinsic layer of p/i interface were more than of bulk and i/n interface for all solar cells. We observe that number of defects for a-SiC window layer are more than for μc-Si window layer, result in electric field of intrinsic layer for a-SiC window layer is weaker than for μc-Si window layer, as shown in as shown in figure 3.5. Hence, the value of Jsc for a-SiC window layer is poorer than for μc-Si window layer. The another reason that the conductivity for a-SiC window layer is poorer than for μc-Si window layer, then

16

the value of Jsc for a-SiC window layers is poorer than for μc-Si window layer. In order to improve conversion efficiency further, we employ to increase electric conductivity for window layer. We adopt a-SiO material as window layer to improve Jsc. The result that have not only improve Jsc and Voc but also improve conversion efficiency. From DLCP analysis, We observe that number of defects for a-SiO window layer are less than for a-SiC window layer, as shown in figure 3.6. Although the value of Jsc for a-SiO window layer increase, it is not better than for μc-Si window layer. The conductivity for μc-Si window layer is lower than for a-SiO window layer after all.

Figure 3.7 show the measured values of current-voltage characteristics for a-Si thin film solar cells with temperature measurement from 25℃ to 85℃ under standard illumination conditions. We could observe with the value of Voc decrease as the temperature increase, as shown in figure 3.8; with the value of Jsc increase as the temperature increase, as shown in figure 3.9; with the value of conversion efficiency increase as the temperature increase, as shown in figure 3.10 .The first, Voc is associated with energy band gap Eg, is given by

eV EF EF E kTln G

bRN N where Eg is the energy band gap

G is the generation rate

bR is the recombination rate coefficient

NV is effective density of states in the valence band NC is effective density of states in the conduction band

k is Boltzmann constant T is Kevin temperature

17

Eg is associated with temperature, and when temperature is rise with Eg is dropped.

Therefore, with the value of Voc decrease when temperature is rise. Device of μc-Si of p layer reduce the maximum amount of Voc with temperature increase to 85oC and the value about 4.63%, as shown in table 3-2. The second, Jsc is associated with collect electron-hole pairs capability. Because they generate a mass of electron-hole pairs in the intrinsic layer as temperature is rise, it can collect a mass of electron-hole pairs output abundant currents. Therefore, with the value of Jsc increase when temperature is rise. Device of μc-Si of p layer increase the maximum amount of Jsc with temperature increase to 85oC and the value about 2.94%. The last, conversion efficiency is associated with Voc and Jsc. Although with the value of Voc decrease as temperature is rise, with the value of Jsc increase more than the value of Voc decrease as temperature is rise. The whole of conversion efficiency improve as temperature rise.

Device of a-SiO of p layer increase the maximum amount of conversion efficiency with temperature increase to 85oC and the value about 14.8%. According to the above results, Device of a-SiO of p layer is the most sensitive to temperature.

Figure 3.11 show the measured values of current-voltage characteristics for a-Si thin film solar cells with temperature measurement from 25℃ to 85℃ under the condition of darkness. We could observe that current density increase as the temperature of solar cells increase for any temperature condition. Under the forward bias, we would observe change in current density rise is not the same in the voltage region of 0.1~0.5V and 0.7~0.8V and 1.2~1.3V. The characteristics of solar cells and pn diodes are the same under the condition of darkness. The current-voltage characteristics of ideal diodes are given by

J J Exp KTV 1 (1)

18

When the ideal diffusion current dominates, n equals 1; whereas when the recombination current dominates, n equals 2.Therefore, we attempt to extract the value of n by fitting from eq. (1) in the voltage region of 0.1~0.5V and 0.7~0.8V and 1.2~1.3V, respectively, and shown in Table 3-3. In the voltage region of 0.1~0.5V and 0.7~0.8V and 1.2~1.3V, Jo also increased with increasing temperature for the cell, so temperature dependence of Jo. However, the value of n is greater than 1 for all cells.

This phenomenon could be associated with series resistance effect or other factor effects. Hence, current increases more gradually with forward voltage.

19

Chapter 4 Fabrication and measurement for microcrystalline

相關文件