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Influence of Ti, TiN, Ta and TaN Layers on Integration of Low-k SiOC:H and Cu

Impact of Diffusion Barrier Layers on Integration of Low-k SiOC:H and Copper

4.3.1 Influence of Ti, TiN, Ta and TaN Layers on Integration of Low-k SiOC:H and Cu

4.3.1-1 Physical Property

Figure 4.3 presents the TDS spectra of the SiOC:H/Si sample from 25° to 800°C.

In the TDS spectra, the primary peaks observed are H2O with a major mass peak at 18 and CH4 with a major mass peak at 16, physically and chemically absorbed in the SiOC:H film. TFSEM analysis was used to analyze the microstructure and identify possible surface reactions. Figures 4.4 present the top-views of the as-deposited Ti on SiOC:H using CVD and PVD system. Figure 4.4(a) indicates that some fine compounds and cracks are present on the surface of the CVD-Ti/SiOC:H sample, but almost no compound is found on the surface of the PVD-Ti/SiOC:H sample, as depicted in Fig. 4.4(b). The formation of the compounds was caused by the reaction between the inorganic precursor (TiCl4) with SiOC:H in CVD-Ti deposition at 550°C.

A considerable amount of O atoms desorbed from SiOC:H, which is confirmed using TDS analysis, and reacted with Ti atoms to form a Ti(O) compound, raising the resistivity of Ti significantly. Moreover, Ti atoms begin to react and form silicide at

~550°C [19].

The variation of sheet resistance as a function of the annealing temperature is commonly used to examine the capability of reaction between diffusion barriers and SiOC:H film. The difference of sheet resistance between the annealed and as-deposited samples, divided by the sheet resistance of as-deposited samples, is called the variation percentage of sheet resistance and is defined as follows [20]:

%

Figure 4.5 plots the percentage variation in sheet resistance of the barriers/SiOC:H samples following furnace annealing for 30 min at various temperatures. The results indirectly reveal the interactions between the diffusion barriers and SiOC:H. Except for that of CVD-Ti sample, the sheet resistance initially declines gradually as the annealing temperature increases because the number of crystal defects reduce and the grains of the diffusion barrier films grow. However, at certain temperature, failure of the diffusion layers result from the reaction between the diffusion barriers and the SiOC:H, and the formation of compounds. The increase in sheet resistance of the Ti sample is higher than those in TiN and TaN samples. Low increasing rate for TaN is believed to alleviate the interdiffusion and formation of compound.

Figures 4.6(a) and (b) show the experimental content percentage of C and O results from the interaction of the barriers with SiOC:H, based on the AES. The analyses show that the as-deposited and annealed CVD and PVD Ti, TiN, Ta and TaN films on SiOC:H films upon 600°C. As shown in Fig. 4.6, it is obvious that the as-deposited CVD barrier films, especially the CVD-Ti film, have a much higher C and O contents than the PVD barriers. Reaction occurs in CVD-Ti/SiOC:H system due to the decomposition of SiOC:H into Ti during deposition at 550°C. Upon 400°C annealing, a significant amount of C and O atoms incorporate into the Ti film. The high content of C and O are due to the formation of the Ti(C) and Ti(O) compounds.

For the PVD-Ti film, the AES results are in agreement with sheet resistance analysis, showing the formation of compounds above 500°C annealing. Moreover, the CVD-TiN film has higher C and O contents than other nitride films. However, there is the evidence of the low reaction between TaN and underlying SiOC:H film.

Figures 4.7 display the AFM images of the PVD-Ti, PVD-TiN and CVD-TiN

layers on SiOC:H films. Figures 4.7(a) and (b) reveal that the PVD-barriers have a great roughness and a significantly columnar microstructure, which can enhance the rapid out-diffusion (at the grain boundaries) of H atoms [16]. As shown in Fig. 4.7(c), the CVD-TiN film has a low roughness and fine-grained microstructure so the out-diffusion path of H atoms from the SiOC:H film reduces. Hence, the CVD-TiN barrier is expected to be more resistant to the out-diffusion of H atoms than PVD-TiN barrier. Accordingly, the C and O impurities are speculated posited to stuff the grain boundaries of the finely grained CVD-TiN barrier and to block atomic diffusion - at least the initial out diffusion of H atoms from SiOC:H. Moreover, O impurities can stuff the grain boundaries of TiN, enhancing the property of TiN barrier layers [22].

Atoms normally diffuse much more quickly through grain boundaries than through the crystal lattice. However, the diffusion of H atoms through the lattice is also fast because these atoms are small and have extremely high mobility. The Ti film has a hexagonal close-packed (hcp) structure with two types of interstitial sites - octahedral and tetrahedral [23]. The atomic radius of H (rH=0.2rTi) is less than the minimum radius of the interstitial sites, so such interstices can provide the lattice diffusion paths for H atoms. However, the TiN film has a NaCl-type face-centered-cubic (fcc) structure, with Ti atoms’ occupying normal fcc lattice sites and N atoms’ filling the octahedral interstitial sites [24]. N atoms block the lattice diffusion paths for H atoms, so the lattice diffusion coefficient of H diffusion in the Ti barrier layer exceeds that the TiN film.

4.3.1-2 Electrical Property

Figures 4.8 illustrate the distribution of breakdown field for the as-deposited Cu/barrier/SiOC:H MIS capacitors having a CVD-TiN, PVD-TiN as well as TaN

diffusion barrier after annealing at 400 and 500ºC for 30 min. Compared to the samples with CVD and PVD TiN diffusion barrier, significant improvement in thermal stability was obtained, apparently due to the barrier effectiveness of a TaN layer. In fact, the sheet resistance measurement was reported that the TaN barrier in MIS capacitor can sustain a 30 min thermal annealing up to 600ºC, without causing degradation to the devices’ electrical characteristics. Thus, the TaN diffusion barrier layer is believed to be enhanced the thermal stability of the Cu and SiOC:H in back-end process.

Figures 4.9 show the C–V results of MIS capacitors subjected to BTS at 250ºC for different stressing time. In BST/C-V analysis, capacitors were stressed under 60 V (2 MV/cm). The Cu+ ions drift rate will change when stressing time increase. This can happen because Cu+ ions can pile up at a dielectrics-Si interface creating increasing electric field opposing the external electric field. Continuous flatband voltage shift (∆VFB) in negative direction under 2 MV/cm is likely caused by Cu+ ions drift through SiOC:H and reached SiO2-Si interface or even gone into Si substrate. For the Cu/PVD-TiN/SiOC:H MIS capacitor, ∆VFB is much larger than that of other capacitors, thus, some of these Cu+ ions might become neutralized and generate electrically effective trap centers near the Si interface and in bulk Si substrate. These deep-level states generated by Cu near the SiO2-Si interface reduce the device lifetime.

As shown in Fig. 4.9(c), the constant inversion capacitance of Cu/TaN/SiOC:H MIS capacitor after BTS suggests that low Cu+ ions drift through SiOC:H and reach SiO2-Si interface, as expected.

4.3.2 Influence of Bias-Temperature Stressing on the Electrical