Introduction

As described above, device performance of conventional Schottky gate AlGaN/GaN HEMT device suffers from high gate leakage current. As a result,

13

the drain current collapse when operating at high-frequency and poor long-term reliability of Schottky gate. In order to reduce the gate leakage current, a concept of high-k insulators layers between gate metal and semiconductor were investigated in the past years. A schematic comparison between HEMT and MOS-HEMTs for AlGaN/GaN is illustrated in Fig. 2.8.

2.4.2 The requirements of high-k insulators oxide

(A) Insulator constant

Insulator constant is the most important parameter for oxide material used in the MOS structure. Due to the reduction of chip’s size in the future, the horizontal electrical field is increased and the gate modulation ability is decreased. In order to solve these problems, the capacitance per unit area must be improved to decrease the effect of undesired electrical field.

(2-2) where C is capacitance, Q is charges, and V is turned on voltage.

, ε ן C (2-3) where ε is the insulator constant of oxide, A is cross section area, and d is the distance between the two plates. According to Eq. (2-2), the devices with larger accumulation capacitance can be turn on more easily by a smaller voltage. Using smaller operating voltage will result in higher device efficiency and cost saving.

According to the Eq. (2-3), the MOS device which using oxide material with larger insulator constant as its gate insulator will have larger accumulation capacitance. So, the high-k oxide is desired for III-V MOS devices technology.

The energy band gap versus insulator constants of different oxide materials is

14

plotted depicted in Fig. 2.9.

(B) Energy band gap

The energy band gap of oxide materials is an important factor which influences the leakage current of the MOS devices. The oxide with smaller energy band gap causes the carrier tunneling more easily; it will induce undesired leakage current and influence the devices performance. The oxide with larger energy band gap can prevent the carriers tunneling. But, the oxide with higher insulator constant will have the smaller energy bandgap. So, it is important to find the suitable oxide to improve the MOS devices performance.

Several gate oxide candidates are listed in Table 2.4. Besides, the band offset of oxide on semiconductor material is also needed to be considered, the value must exceed 1 eV so that the oxide can serve an effective insulator ^[18].

ALD Al₂O₃ is introduced in this study due to its relatively high band gap (about 8.7 eV) and remains amorphous under typical processing conditions. In addition, Al₂O₃ also possesses high breakdown electric field (5~20 MV/cm), high thermal stability (up to 1000℃) and strong adhesion with dissimilar materials [25]. With well-controlled thickness and uniformity for the Al₂O₃ layer deposited by ALD technology by the good insularity of Al₂O₃ layer, ALD Al₂O₃ is the leading candidate for the gate insulators in MOS-HEMT device.

15

Table 2.1 Advantages of GaN material for electronic applications.

Material property Advantages Wide bandgap

3.42 eV

„ Great endurance for high device operating temperature

„ Suitable for high power applications.

„ Working under high temperature environment +High breakdown field

4×10⁶ V/cm

„ Larger power density

High thermal conductivity

~1.3W/cm* K

„ Better heat dissipation, enhanced device performance

„ Easier device packaging High saturate electron velocity

~2.7×10⁷ cm/sec

„ Suitable for high frequency applications

Table 2.2 Material properties and figure of merit (FOM) of GaN, 4H-SiC, GaAs and Si at 300K for microwave power device applications. All FOMs are normalized with respect to those Si.

Material Bandgap

16

Table 2.3 Comparison of 2DEG mobility and sheet carrier concentration of AlGaN/GaN structure grown by MOCVD and MBE on different substrates. The carrier mobility and concentration are measured at 300, 77, 4.2 or 0.3 K unless specify in the bracket; x is the Al content in AlGaN layer.

Growth

Method substrate

Al content

2DEG mobility (cm²/Vs)

(Sheet carrier concentration (ns (cm^-2)) Reference x 300K 77K 4.2K 0.3K

Higashiwaki et al., (2008) [24]

Sapphire 0.18 10300 (1.5K)

(6.9×10¹²)

Selvaraj et al., (2009) [28]

Silicon 1800

(1×10¹³)

Arulkumaran et al., (2010) [29]

Sapphire 0.19 1500 (9×10¹²)

17

Table 2.4 Comparison of the gate oxide’s properties

Fig. 2.1 Band gap (E_g) versus lattice constant at 300 K for wurtzite (α-phase) and zincoblende (β-phase) GaN, InN, and AlN. The right-hand scale gives the light wavelength, corresponding to the band gap energy.

18

Fig. 2.2 Semiconductor materials for RF applications.

Fig. 2.3 Electron drift velocity of GaN, SiC, Si and GaAs at 300 K computed using the Monte Carlo technique.

19

Fig. 2.4 Schematic drawing of the crystal and energy band structure of wurtzite GaN and Zinc Blende GaN.

Fig. 2.5 Schematic of the crystal structure of wurtzite Ga-face and-face GaN.

The spontaneous polarization (P_sp) direction is also shown.

Psp

Psp

20

Fig. 2.6 Polarization induced sheet density and directions for the spontaneous and piezoelectric polarization in Ga- and N-face AlN/GaN heterostructures.

Fig.2.7 Basic structure and its band diagram AlGaN/GaN HEMT.

21

Fig. 2.8 Structure comparisons between AlGaN/GaN HEMT (on the left) and Al₂O₃ HEMT (MOS-HEMT) (on the right).

Fig. 2.9 Energy band gap versus Insulator constant diagram of oxides.

22

Chapter 3

Experimental Methods of AlGaN/GaN MOS-HEMTs with Al

₂

O

₃

High-K Gate Oxide

The fabricated AlGaN/GaN MOS-HEMT with Al₂O₃ high-k gate oxide in this study brings together a novel design to enhance the electronic properties of the devices, the process flow of AlGaN/GaN MOS-HEMT with Al₂O₃ high-K gate oxide fabrication in this study includes several steps as shown in Fig 3.1, and they are:

1. Ohmic contact formation

2. Active region definition (Mesa isolation) 3. Atomic layer deposition (ALD) Al₂O₃ 4. Gate formation

3.1 Ohmic Contact Formation

An ohmic contact is a low resistance junction formed in between metal and semiconductor. The purpose of an ohmic contact on semiconductor is to allow the electrical current to flow in and out of the semiconductor. A good ohmic contact is important for a better device performance such as lower power consumption, low noise and so on. An ohmic contact should obey the ohms law;

that is, it should have a linear I-V characteristic either under forward or reverse bias. Therefore, to obtain a low resistance ohmic contact, we have to create a

23

heavily doped interface between metal and semiconductor. In addition, an ohmic contact not only should be stable over time and temperature, but also should have as small resistance.

First, the negative photoresist AZ5214E and I-line aligner were used to define the ohmic metal pattern after wafer cleaning by using ACE and IPA. Unlike the Si-based devices, the lift-off process is used for III-V based device because of the lack of appropriate etching selection between ohmic metals and III-V materials. The undercut profile of the negative photoresist AZ5214E will benefit the metal lift-off process. Then, the wafers underwent O₂ plasma descum to remove residual photoresist and the dipped in HCl:H₂O (1:4) solution for 15 s to remove the native oxide on the GaN surface before Ohmic metallization. ohmic metal was composed of Ti/Al/Ni/Au from the bottom to the top, and it was deposited by e-gun beam evaporation system. Finally, tcontacts were annealed by rapid thermal annealing (RTA) at 850℃ for 30s in N2 atmosphere after metal lift-off process as shown in Fig 3.1. The specific contact resistance was checked by the transmission line method (TLM) in the process control monitor (PCM). It containing a linear array of metal contacts with various spacings between them.

The distances between TLM electrodes are 3 μm, 5 μm, 10 μm, 20 μm, and 36 μm, respectively in this study. In general, the typical measured contact resistance must be less than 1 x 10^-5 Ω-㎝².

3.2 Mesa isolation

For III-V devices, the mesa isolation is to isolated devices from each other. In these specific areas, the current flow is restricted to the desired path. In addition,

24

parasitic capacitance, parasitic resistance, and leakage current can all be reduced with effective isolation. A successful isolation provides sufficient insulating area to form passive elements such as transmission lines, capacitors, pads, etc.

First, the active areas were masked by Shipley S1818 photoresist, and then the dry etch process was conducted by inductive couple plasma (ICP) with Cl₂ in Ar ambient. After the dry etch process, the etching depth should reach the buffer layer as shown in Fig 3.3. Finally, the photoresist was striped by ACE.

According to the device structure, the mesa was etched to the buffer layer to provide good device isolation. Finally, the etching depth was approximately 2500Å measured by p-10 surface profiler after the strip of photoresist, and the etching profile was carefully checked by scanning electron microscopy (SEM).

3.3 Atomic layer deposition (ALD) Al

2

O

3

In this study, the Al₂O₃ was deposited by ALD system. ALD developed in Finland by T. Suntolan in 1974, and this method is considered as an advanced variant of the CVD technique.

Before the Al₂O₃ deposition, the chemical surface treatment was used to remove the surface native oxides. Firstly, the wafers were immersed by HCl : H₂O (1:4) solution to remove the native oxides, and followed by rinsing in the water for 30 s and blowing dry by N₂ gas. Then, the wafer was directly immersed in (NH₄)₂S solution for 15 min at room temperate, and also rinsed for 30 s in water and blown dry by N₂ gas after (NH₄)₂S treatment. After the chemical surface treatments, the wafer was loaded into the ALD chamber. The Al₂O₃ films (TMA/N₂/H₂O/N₂ with periods of 0.2s/5s/0.2s/5s) were deposited

25

over 50 cycles and the thickness Al₂O₃ was about 10 nm as shown in Fig 3.4.

Finally, the post deposition annealing (PDA) was used to improve the interface quality. The PDA was performed at 400℃ for 5 min in N₂.

3.4 Gate Formation

Schottky barrier gate is one of the most important elements of the HEMTs.

Both the dimension length and placement of the gate are very critical. For high speed and high frequency applications, short gate length is desired. Decreasing gate length (L_g) can increase the electronic field under the gate so as to accelerate the transport property of channel electron.

In this study, the 1.5 μm gate length was defined by AZ 2020 photoresist, and then the remnant photoresist was removed by ICP with Ar and O₂ ambient.

Beside, the wafer was dipped into the HCl:H₂O (1:4) solution for 15 s to remove the negative oxidation before the gate metal deposition. Here, the multilayer gate metals Ti/Pt/Au were deposited by the e-gum system. Finally, the wafer was immersed into the ACE for 30 min to lift –off the undesired metal, and the ICP was used to clean the wafer as shown in Fig 3.5.

26

Fig. 3.1 the whole wafer

Fig. 3.2 Ohmic contact formation

27

Fig. 3.3 Mesa isolation

Fig. 3.4 Atomic layer deposition (ALD) Al₂O₃

28

Fig. 3.5 Gate formation

29

Chapter 4

Fundamentals of Electrical Characteristization

After the device fabrication, DC and RF performances of the AlGaN/GaN HEMT and MOS-HEMT were evaluated by using on-wafer measurement. For the DC measurement, the I-V characteristics were obtained by using an HP4142B Modular DC source/monitor and SUSS PA200 semi-auto probe station. The TLM method was used for determining specific contact resistance was by the 4-wires measurement. The S-parameters were measured by HP8510XF vector network analyzer using on-wafer GSG probes from Cascade MicroTech. However, evaluating the RF behaviors of a device on a wafer was a complicated process. For conventional RF measurement of a packaged device, the wafer needs to be diced and then an individual die should be mounted into a text fixture. Discriminating between the die’s and the fixture’s responses became an issue. Furthermore, fixturing die was a time-consuming process, making it impractical for high-volume screening. On-wafer RF characterization can simplify the process [26].

The method of characterization of the AlGaN/GaN HEMT and MOS-HEMT devices are stated in the following section. In this study, de-embedding which must also be performed to obtain the true RF performance of the device is also performable.

4.1 DC Characteristics Measurment [27]

Before RF performance analysis, DC measurement was performed to

30

evaluate the device characteristics, including the saturation drain current (Id_ss), threshold voltage (V_th), transconductance (G_m), breakdown voltage (V_BK). For I_DS-V_DS curve, the drain voltage sweeps from 0 to 10V, and the gate voltage is from 1 to pinch-off voltage with a step of -1V. For I_DS-V_GS curve, the gate voltage sweeps from 6V to pinch-off voltage such as -8V for MOS-HEMT and -6 for Schottky-gate HEMT, and the drain voltage is from 4 to 15V. The measured breakdown voltage in this study is off-state breakdown voltage. The gate bias is pinch-off voltage, and the drain bias sweep from 0 to a specific value.

4.2 TLM Method

The specific contact resistance between contact metal and cap layer can be extracted by the TLM method [28]. The TLM pattern, as illustrated in Fig. 4.1, was designed in the process control monitor (PCM). In this particular approach, a linear array of contacts pad is fabricated with various spacing in between them.

The distances between TLM electrodes are 3, 5, 10, 20, and 36 μm, respectively.

The resistance between the two adjacent electrodes can be plotted as a function of the space between electrodes and is expressed by the following equation

R = 2Rc +Rs L/ W , (4-11) where R is measured resistance, R_C is contact resistance, R_S is sheet resistance of channel region, W is electrode width, and L is the space between electrodes. As Fig. 4.2 shows, extrapolating the data to L=0, one can calculate a value for the term RC. And the specific contact resistance ρ_C can be further extracted by the following formula.

　 　

RS

R W C

2

= 2

ρ (4-12)

31

4.3 Linearity

Linearity of amplifiers is often assessed by the third-order intercept point (IP3). If an amplifier is presented with two signals closely spaced in frequency, and a perfectly linear amplifier would simply amplify the two signals. However, the real amplifier is never with perfectly linearity, and nonlinearity will result in additional output signals. A nonlinear amplifier will have a transfer function that can be approximated as：

P_o = a₁P_in + a₂P²_in + a₃P³_in + … (4-13) where P_in and P_o are the input and output power, and a_i are coefficients. A linear amplifier would have a_i =0 for i >1. Consider an input signal with two closely spaced frequencies, f1 and f2：

Pin = P1sin(2πf1t) + P2sin(2πf2t) (4-14) If Eq. (4-14) were substituted into Eq. (4-13), we can use elementary algebra and trigonometric identities to show that the output power (P_o) contains the following components：

t

32

Assuming P₁ = P₂, second-order product power is proportional to the square of the input signal power, third-order product power is proportional to the cube of the input signal power, and so on. But only the odd and greater than third-order terms have greater attribution to the fundamental signal. So we usually consider the fundamental signal and the third-order product signal only.

Fig. 4.3 is the output power diagram of the fundamental and the third-order product signals. From Fig. 4.3, we can identify the third-order intercept point (IP3). The P_in value of IP3 is also called IIP3, which is important for low noise amplifier. From the fundamental diagram of microwave front-end device (Fig.

4.4), the low noise amplifier is used to receive signals. So a higher IIP3 value results in a higher linearity of the amplifier, and the less distortion of the input signals.

4.4 Breakdown Voltage (BV

gd

)

Breakdown mechanisms and models have been discussed in many articles.

One of the models showing it is dominated by the thermionic filed emission (TFE) / tunneling current from the Schottky gate. This model predicts that the two-terminal breakdown voltage is lower at higher temperature because tunneling current increases with the temperature. Higher tunneling current occurs at higher temperature because carriers have higher energy to overcome the Schottky barrier. Other model suggests that impact-ionization determines the

33

final two-terminal breakdown voltage, because the avalanche current decreases with increasing temperature. Lower avalanche current occurs at higher temperature because phonon vibrations as well as carrier-carrier scattering increase with increasing temperature. Either model is incomplete since coupling exists between TFE and impact ionization mechanisms. In addition, different devices may suffer from different breakdown mechanisms, depending on the details of the device design (insulator thickness, recess, channel composition, and so forth). In this study, the gate-to-drain breakdown voltage BV_gd is defined as the gate-to-drain voltage when the gate current is 1mA/mm.

4.5 Extrinsic Transconductance (g

m

)

The transconductance of the HEMTs indicates the ability of the gate voltage on the control of the drain current. It can be defined as：

(4-15) where the v_sat is the electron velocity of the “two dimensional electron gas”

(2-DEG).

The measurement requires specification of the initial gate voltage, the gate voltage step, and the drain voltage at which the measurement is made. Because of the nonlinear behavior of source-drain current as a function of gate voltage, g_m typically will become less as the bias approaches pinch-off approaches. This also means that a smaller voltage step will yield a higher transconductance. The extrinsic transconductance is a function of the total gate width of the device, so the width must also be given. Besides, g_m may also be normalized to a unit gate

sat

34

width, usually mS/mm.

4.6 Scattering Parameters [3-2]

Generally, the Scattering parameters, which referred to as S-parameters, are

fundamental to microwave measurement. S-parameters are a way of specifying return loss and insertion loss or insertion gain. Fig. 4.5 shows the equivalent two-port network schematic at high frequency. The relation of the microwave signals and s-parameters are defined as follows:

⎥⎦

S signals going into or coming out of the input port are labeled by a subscript 1. Signals going into or coming out of the input port are labeled by a subscript 2. The electric field of the microwave signal going into the component ports is designated a; that leaving the ports is designated b. Therefore,

a1 is the electric field of the microwave signal entering the component input.

b1 is the electric field of the microwave signal leaving the component input.

a2 is the electric field of the microwave signal entering the component output.

b2 is the electric field of the microwave signal leaving the component output.

By definition, then,

0

35

Consequently, s₁₁ is the electric field leaving the input divided by the electric field entering the input, under the condition that no signal enters the output. Because b₁ and a₁ are electric fields, their ratio is a reflection coefficient.

Similarly, s21 is the electric field leaving the output divided by the electric field entering the input, when no signal enters the output. Therefore, s₂₁ is a transmission coefficient and is related to the insertion loss or the gain of the device. s₂₂ is similar to s₁₁, but looks in the other direction into the device.

4.7 Current-Gain Cutoff Frequency (f

_T

) and Maximum Oscillation Frequency ( f

_max

)

The intrinsic device model for the HEMT device is shown in Fig. 4.6. If we only consider the intrinsic part, the current can be expressed as：

'

36

f_max can be obtained by using unilateral gain：

d

If we further consider gate resistance R_g, ohmic contact resistance R_s and R_d, then the small signal equivalent circuit is shown as Fig. 4.7.

assume (ωC_gsR_i)² <<1

37 Transfer y parameter into Z parameter：

s

f_T and f_max are parameters often used to indicate the high frequency capability of the transistors.

38

Fig. 4.1The Transmission Line Method (TLM ) pattern.

Fig. 4.2 The illustration of utilizing TLM to measure ohmic contact resistance

39

-30 -25 -20 -15 -10 -5 0 5 10 15

-120 -100 -80 -60 -40 -20 0 20 40 60

3rd ORDER PRODUCTS FUNDAMENTALS

3rd ORDER INTERCEPT POINT OP_1dB

OIP3

Output Power (dBm)

Input Power (dBm)

Fig. 4.3 Output power diagram of fundamental andthird-order product signals.

Duplexer Antenna

f_RF

f_IF

f_LO

LNA Filter Mixer IF amplifier

Signal process

circuit

Modulator PA Pre-amplifier

LO

Fig. 4.4 Fundamental diagram of the microwave front-end device.

40

Fig. 4.5 The equivalent two-port network schematic at high frequency.

G ' D '

Fig. 4.6 AlGaN/GaN HEMT intrinsic device model.

G D

Fig. 4.7 AlGaN/GaN HEMT small signal equivalent circuit.

41

Chapter 5

Study of AlGaN/GaN MOS-HEMTs on Silicon substrate with Al

₂

O

₃

Gate Insulator for Device Linearity Improvement

As shown in chapter 2, device performance of conventional Schottky-gate AlGaN/GaN HEMTs suffers from high gate leakage current. Also, the drain current collapses occurs when operating at high bias voltage resulting in poor long-term reliability of the Schottky gate. To improve the leakage characteristics

As shown in chapter 2, device performance of conventional Schottky-gate AlGaN/GaN HEMTs suffers from high gate leakage current. Also, the drain current collapses occurs when operating at high bias voltage resulting in poor long-term reliability of the Schottky gate. To improve the leakage characteristics

在文檔中 研究藉由氧化鋁為閘極絕緣層來改善成長於矽基板上之氧化鋁鎵/氮化鎵高電子遷移率電晶體之線性度 (頁 24-0)