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Material Analyses of Location-Controlled Vertical Single Grain-Boundary (VSGB)

Low Temperature Poly Silicon (LTPS) Thin Films with Bottom Gate (BG) Structures Fabricated by Excimer Laser Annealing (ELA)

2-1 Introduction

Currently, high driving-current capacity, low leakage-current and good uniformity of TFT characteristics over a large area of glass substrate were imperative for devices aiming at AMLCD/AMOLED drivers and matrix. Low-temperature polycrystalline silicon (LTPS) technology has been the most promising method to manufacture high performance thin film transistors (TFTs) for the past decades. As comparison to amorphous silicon (amorphous silicon), The mobility of polycrystalline silicon TFTs was generally much higher than that of amorphous silicon TFTs. The high drive current allows smaller TFTs to be used as the pixel-switching elements, resulting in higher aperture ratio. In addition, the capability to realize complementary metal-oxide-semiconductor (CMOS) circuits allowed low-power

driver circuitry to be integrated with the active matrix, for reduced display-module cost and improved reliability. As comparison to high temperature poly silicon (HTPS), the thermal budget was much lower for LTPS TFTs. The LTPS technology was compatible with glass substrate even plastic substrate. Therefore, the cost of LTPS technology was much lower than HTPS technology, especially in large panel application.

Among many techniques reported to date, excimer-laser crystallization (ELC) method seemed the most promising method for preparing high quality polycrystalline silicon thin films. The major advantage was that the polycrystalline silicon film obtained by this technology possesses good crystallinity with very few intragrain defects, due to the melt-regrowth process. But the conventional top-gate ELC LTPS TFTs have some drawbacks . First, there was higher surface roughness between active layer and insulator due to the ridge formation of grain boundaries. Second, the location of grain boundaries cannot be controlled due to the random position of nucleation during excimer laser crystallization. Third, although large grains could be obtained in the super lateral growth (SLG) regime, many small grains still spread between these large grains. According to SLG model [2.1], the lateral grain growth distance was determined by the quenching rate of liquid silicon and the retain-solid Si seed distance. Thus, a little deviation in spatial and/or pulse-to-pulse energy density and amorphous silicon thin film thickness could easily result in partial or full melting of amorphous silicon thin film at local region. Fourth, after the deposition of active layers, there were many process steps such as the pattern of active region and laser crystallization before the deposition of gate insulators. Therefore, there was possible contamination between the deposition of active layers and gate insulators.

Polycrystalline silicon thin films with large grain always resulted in high-performance polycrystalline silicon thin film devices due to the reduction of defect traps of the grain boundaries. Hence, enlarging grain size was the most effective manner for improving the

performance of the polycrystalline silicon devices. A variety of crystallization methods have been proposed to produce large grains with superior grain size distribution uniformity. They include sequential lateral solidification (SLS) [2.2]-[2.4], grain-filters (or substrate-embedded seeds) method [2.5][2.6], phase-modulated ELC using an optical phase-shift mask [2.7], ELC of selectively floating amorphous silicon thin film [2.8], ELC of pre-patterned amorphous silicon thin film [2.9]-[2.11], dual beam ELA [2.12], dual pluses ELA [2.13], slicing channel [2.14] and so on. Although all of them provided alternatives to produce large-grain polycrystalline silicon thin films, these methods could not be compatible with conventional LTPS process equipments.

It was desired that the growth of high-quality large grain could be controlled in the device channel region from the viewpoint of device performance and uniformity. In this chapter, a novel process for producing high-mobility polycrystalline silicon was described. In order to induce lateral grain growth, a lateral temperature gradient must be created between the adjacent areas and there must be retained solid Si to act as the seeds for lateral crystallization. By completely melting the amorphous Si thin film in a certain region and partially melting the one at adjacent area, a large lateral temperature gradient would exist between these two regions, and grains would grow laterally towards the complete melting region from the retained solid Si. In this method, bottom gate structures were adopted. A thick amorphous silicon region was formed in the corner due to the step structures of bottom gate which they served as the seeds for lateral grain growth during excimer laser irradiation. The laser energy density must be controlled to completely melt the thin region in the channel and partially melt the thick region near the corner. Thus, a large-grain polycrystalline silicon film was obtained which would lead to improved device performance. In addition, the lateral grain growth starting from channel edge could progress along the opposite direction toward the center of channel region. There was only one longitudinal boundary in the center of the channel. So we call this novel method, location-controlled Vertical single grain-boundary

(VSGB) Low Temperature Poly Silicon (LTPS) Thin Films. Due to the artificial controlling of the lateral growth in the channel region, the uniformity of device characteristic could be further improved.

Besides, another advantage of VSGB-LTPS method was that it could be used to fabricate thinner gate insulator TFTs. Due to the smoother interface between the gate insulator and active region of TFTs, thinner gate insulator could be used. Therefore, VSGB-LTPS-TFTs would exhibit higher drivability and better subthreshold swing. The performance of the VSGB-LTPS-TFTs could be easily improved at the some condition of crystallization of polycrystalline silicon.

In this chapter, experimental procedures of VSGB-LTPS thin films would be introduced.

We studied the mechanisms of lateral growth of VSGB-LTPS method by many material analysis equipments. The material properties of VSGB-LTPS thin films were analyzed by scanning electron microscope (SEM), transmission electron microscope (TEM) and atomic force microscope (AFM). Besides, the electrical properties of VSGB-LTPS TFTs, including the field effect mobility, the subthreshold swing and the threshold voltage, the uniformity and bidirectional electrical properties were also investigated.

2-2 Process Flows for Material Analyses of Vertical Single