where tch is the thickness of the inversion layer. Therefore, the drain current ID of polysilicon TFT then can be given by
( )
2Obviously, this I-V characteristic is very similar to that in MOSFETs, except that the mobility is modified.
2-2. Methods of device parameter extraction
In this section, we will introduce the methods of typical parameters extraction such as threshold voltage (Vth), subthreshold slope (SS), drain current ON/OFF ratio,
field-effect mobility (µFE).
2-2-1. Determination of the threshold voltage
Many ways are used to determinate the Vth which is the most important parameter of semiconductor devices. In polysilicon TFTs, the method to determinate the threshold voltage is constant drain current method. The gate voltage at a specific drain current IN value is taken as the threshold voltage. This technique is adopted in most studies of TFTs. Typically, the threshold current IN = ID / (Weff / Leff ) is specified 100 nA for VD = 5V (saturation region) in this thesis.
2-2-2. Determination of the subthreshold slope
Subthreshold slope SS (V/dec.) is a typical parameter to describe the gate control toward channel. The SS should be independent of drain voltage and gate voltage.
However, in reality, SS might increase with drain voltage due to short-channel effects such as charge sharing, avalanche multiplication, and punchthrough-like effect. The SS is also related to gate voltage due to undesirable factors such as serial resistance and interface state. In this experiment, the SS is defined as one-half of the gate voltage required to decrease the threshold current by two orders of magnitude (from 10-8A to 10-10A).
2-2-3. Determination of On/Off Current Ratio
Drain On/Off current ratio is another important factor of TFTs. High On/Off ratio
represents not only large turn-on current but also small off current (leakage current). It affects gray levels (the bright to dark state number) of TFT AMLCD directly.
There are many methods to specify the on and off current. The practical one is to define the maximum current as on current and the minimum leakage current as off current while drain voltage is applied at 5V.
2-2-4. Determination of the field-effect mobility
The field-effect mobility (µFE) is determined from the transconductance (gm) at
low drain voltage (Vd = 0.1V). The transfer I-V characteristics of polysilicon TFT can be expressed as
2 ]
W is channel width,
L is channel length,
VTH is the threshold voltage.
If VD is much smaller than VG-VTH ( i.e. VD << VG-VTH ) and VG > VTH, the drain current can be approximated as:
D
The transconductance is defined as
D
Therefore, the field-effect mobility can be obtained by
gm
2-3. TFT non-ideal effect
There are two major non-ideal effects will limit the TFTs application, including leakage current, kink-effect. The mechanism of these three non-ideal effects is described briefly as bellow.
2-3-1. Leakage current
In AMLCD, TFTs play a switching device to turn ON/OFF the current path for charging/discharging the liquid crystal capacitor. Thus, the leakage current should be low enough to remain a pixel gray level before it must be refreshed. The leakage current mechanism in polysilicon has been studied by Olasupe [5]. The leakage current resulted from carrier generation from the polysilicon grain boundary defects.
There are three major leakage mechanisms, as shown in Fig. 2-3. The dominant mechanism is a function of the prevailing drain bias. They pointed out carrier
generation from grain boundary defects via thermionic emission and thermionic field emission to be prevalent at a low and medium drain biases, and carrier pure tunneling from polysilicon grain boundary defects to be the dominant mechanism at higher drain bias.
2-3-2. Kink effect [6]
During devices operation, a high field near the drain could induce impact ionization there. Majority carriers, holes in the p-substrate for an n-channel polysilicon TFTs, generated by impact ionization will be stored in the substrate, since there is no substrate contact to drain away these charges. Therefore the substrate potential will be changed and will result in a reduction of the threshold voltage. This, in turn, may cause an increase or a kink in the current-voltage characteristics. The kink phenomenon is shown in Fig. 2-4. This float-body or kink effect is especially dramatic for n-channel devices, because of the higher impact-ionization rate of electrons. The kink effect can be reduced in TFTs by lowering lateral field inside the channel.
2-4. MILC formula mechanism
[7]-[8]In the last few years, several articles have been devoted to study of the growth mechanism of metal-induced-lateral-crystallization (MILC). Earlier observation of Ni
induced crystallization of a-Si revealed that the onset temperature for crystallization of a-Si was significantly reduced in presence of NiSi2 precipitates and crystallization occurred at around 5000C. The NiSi2 precipitates acts as a good nucleus of Si, which has similar crystalline structure (the fluorite type, CaF2) and a small lattice mismatch of 0.4% with Si. In the case of Ni induced crystallization, the growth of crystallites depends strongly on the migration of NiSi2 precipitates, and the driving force for the migration of NiSi2 precipitates is the reduction in free energy associated with the transformation of metastable a-Si to stable c-Si.
In the MILC process, nickel deposited onto the seed window first reacts with silicon to form a thin nickel silcide film which reduces the activation energy for a-Si crystallization. Thus, a-Si under the silicide is thermally crystallized into polysilicon, and this is called the initial nucleation of crystalline Si on nickel silicide. As this polysilicon is formed by a direct metal induced method, it is also referred as metal-induced-crystallization (MIC) polysilicon. There are many grain boundaries inside the MIC polysilicon layer and these grain boundaries provide good locations for trapping the metal atoms. Due to the fast nickel diffusion in crystalline silicon structure and good nickel trapping property at the crystalline silicon to a-Si interface, most of nickel atoms in the MIC region diffuse to and are trapped at the grain boundaries. The trapped metal atoms react with silicon atoms to form thin layers of
nickel silicide at the grain boundaries. At the MIC to a-Si interface, the nickel silicide at grain boundaries exist as a continuous sandwich layer between MIC polysilicon and a-Si as illustrated in Fig. 2-5a and Fig. 2-5b This continuous nickel silicide layer is a reactive layer, which will be responsible for the grain growth, so it is called nickel silicide reactive grain boundary (RGB). The nickel silicide RGB propagates toward the a-Si region during MILC annealing and a-Si will then be crystallized.
The nickel concentration at the RGB is higher than the neighboring a-Si.
Continuous annealing after MIC leads metal atom diffusion to the a-Si layer in lateral directions. Once the nickel atoms are pushed toward the a-Si region, those atoms repair the intrinsic traps and form a new nickel silicide RGB. The nickel atoms lower the activation energy of a-Si crystallization and construct the silicon atoms into a crystalline structure. Since the nickel diffusion in crystalline silicon region is relatively faster, the nickel atoms in the polysilicon region then diffuse to the new silicon grain boundary quickly. This increases the nickel concentration at the RGB and subsequently pushes the nickel atoms to the a-Si again and again. As a result, the a-Si is crystallized to polysilicon in the lateral direction, and this polysilicon is called metal-induced-lateral-crystallization (MILC) polysilicon. As the MILC formation is led by the propagation of the nickel silicide RGB, the MILC polysilicon grains grow along the direction of nickel diffusion. Fig. 2-6 illustrates the silicon crystallization
process during the MILC annealing. The mechanism described does not only explain the polysilicon growth of MILC, but also help to explain the epitaxial silicon growth mechanism by nickel silicide layer propagation from crystalline silicon toward a-Si (refer to Fig. 2-7) proposed by other researches. It tells us why the nickel silicide absorbs silicon atoms from the a-Si region and rejects the excess Si atoms to the crystalline silicon area during epitaxial silicon growth.
Fig. 2-1 Sketch of the band diagram of the polycrystalline silicon films.
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Chapter 1.
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