ON/OFF current ratio

A poly-Si TFT with good characteristics should have not only high ON state driving current but also low OFF state leakage current. For pixel transistors, the OFF state is frequently encountered in normal operation. Therefore, ON/OFF current ratio is obviously a better evaluation parameter compared with ON state current alone.

The leakage current mechanism in poly-Si TFTs is not like that in MOSFET. In MOSFET, the channel is composed of single crystalline Si and the leakage current is due to the tunneling of minority carrier from drain region to accumulation layer located in channel region. However, in poly-Si TFTs, the channel is composed of poly crystalline Si. A large amount of trap densities in grain structure attribute a lot of defect states in energy band gap to enhance the tunneling effect. Therefore, the leakage current due to the tunneling effect is much larger in poly-Si TFTs than that in MOSFET. Considering large negative gate bias VG is applied, a hole channel forms under the gate. In principle, little current flows because the junction between the hole

channel and the drain is reverse-biased. However, due to the existing numerous trap states in the polysilicon film and the large electric field, electron and hole emission from trap states becomes a strongly increasing function of electric field. Here, a trap could be modeled by a potential well. For large electric fields, it is possible for electrons to escape the potential well by quantum mechanical tunneling. The tunneling rate increases strongly with electric field because the barrier thickness decreases. The effect is a rapid increase in leakage current. The tunneling rate depends upon the total electric field, and consequently the leakage current is highest when both drain and gate voltages are large.

In this thesis, take n-channel poly-Si TFTs for examples, the ON current is defined as the drain current when gate voltage equals to 15 V and drain voltage is 0.5 V. The OFF current is specified as the minimum current when drain voltage equals to 0.5 V.

(1) 550-nm thick buried oxide and 40-nm thick a-Si were deposited.

(2) 600°C annealing for 24-hr and active region definition.

(3) 50-nm thick TEOS oxide , 50-nm thick a-Si and 150-nm thick nitride layer.

(4) Gate definition.

a-Si

Buried oxide

poly-Si

Buried oxide

TEOS a-Si Nitride

Buried oxide

poly-Si

TEOS a-Si

Buried oxide

poly-Si Nitride

(5) Phosphorous implantation.

(6) TEOS spacer formation.

(7) Nitride layer was etched by H3PO4.

(8) Ni and TiN deposition.

(9) NiSi formation by RTA 550°C.

Fig. 2-1 Process flows of fully Ni-salicidation TFTs.

TEOS

Buried oxide

poly-Si

Ni-salicided TEOS

a-Si

Buried oxide

poly-Si N+

N+

TiNNi

Chapter 3

Electrical Characteristics of the Fully Ni-Salicided TFTs

At first, the cross-section TEM of FSA-TFTs (un-doped gate RTA 550°C 30-sec) is shown in Fig.3-1. Thicknesses of channel film, TEOS oxide and gate are shown in Fig.3-2. In this chapter, the electrical characteristics of control TFTs and FSA-TFTs (in-situ doped gate) with RTA 550°C 30-sec are compared at first in 3.1. Then the electrical characteristics of control TFTs and FSA-TFTs (un-doped gate) with RTA 550°C 30-sec are compared in 3.2. Device parameters including parasitic resistance (RP), threshold voltage (VTH), subthreshold swing (S.S.), field-effect mobility (µFE), ON current (ION), OFF current (IOFF), and ON/OFF current ratio are all extracted. Next step, we will explain the electrical characteristics of control TFTs and FSA-TFTs. We found that S/D fully salicidation resulted in the reduction of VTH、kink effect、

threshold voltage roll off、subthreshold swing roll off and Gate-Induced-Drain- Leakage (GIDL) enhancement current.

3.1 Basic electrical characteristics of FSA-TFTs (in-situ doped gate)

Figure 3-3 shows the parasitic resistance (RP) of the control TFTs. The extracted

value of RP is 7.521 kΩ. Figure 3-4 shows the parasitic resistance (RP) of the FSA-TFTs. The extracted value of RP is 0.7965 kΩ. Obviously, the RP of the FSA-TFTs is significantly lower than that of the control TFTs.

Figure 3-5 exhibits ID-VG and field-effect mobility characteristics of control TFTs with W/L=10 µm/10 µm and Tox=500 Å. The drain bias is 0.5 V and 5.0 V. The ON current (ION) at VD=0.5 V and VG=15 V of control TFTs is 12.68 µA. The OFF current (IOFF，the minimum value of drain current) of control TFTs is 1.25 pA. So, the ON/OFF current ratio (ION/IOFF) is 1.01×10⁷. The maximum mobility of control TFTs is 29.58 cm²/V-s.

Figure 3-6 exhibits ID-VG and field-effect mobility characteristics of the FSA-TFTs with W/L=10 µm/10 µm and Tox=500 Å. The drain bias is 0.5 V and 5.0 V.

The ON current at VD=0.5 V and VG=15 V of FSA-TFTs is 14.44 µA. The OFF current of FSA-TFTs is 0.1 pA. So, the ON/OFF current ratio is 1.444×10⁸. The maximum mobility of the FSA-TFTs is 33.96 cm²/V-s. Based on the above electrical results, significant improvements can be found for the FSA-TFTs. All devices’

parameters of the control TFTs and the FSA-TFTs are listed in the Table 3-1.

Figure 3-7 shows the comparison of ID-VG characteristics at VD=0.5 V between control TFTs and FSA-TFTs with W/L=10 µm/10 µm. Figure 3-8 shows the comparison of mobility between control TFTs and FSA-TFTs with W/L =10 µm/10

µm. Fully Ni-salicidation remarkably improves the mobility of TFTs. From Table 3-1, FSA-TFTs give smaller threshold voltage, higher mobility, higher ON current and higher ON/OFF current ratio.

Figure 3-9 show ID-VD characteristics of control TFTs and FSA-TFTs with W/L

=10 µm/10 µm (VG-VTH=3.0 V, 4.0 V, 5.0 V, 6.0 V). The output current of FSA-TFTs is obviously larger than that of control TFTs. The low parasitic resistance by fully Ni- salicidation greatly boosts the output current.

Figure 3-10 shows ID-VD output characteristics of control TFTs and FSA-TFTs with W/L=10 µm/0.8 µm. The output characteristics exhibit in fact an anomalous current increase in the saturation region. The kink effect [31-32] is observed. The detailed explanation about the kink effect is shown in 3.3.2.

Figure 3-11 exhibits VTH roll off characteristics of control TFTs and FSA-TFTs.

All threshold voltages of control TFTs and FSA-TFTs are summarized in Table 3-2.

The threshold voltage roll off from 10 µm to 0.8 µm of control TFTs at VD=0.5 V is 1.402 V. The threshold voltage roll off from 10 µm to 0.8 µm of FSA-TFTs at VD=0.5 V is 0.37 V. Obviously, threshold voltage roll off phenomenon of control TFTs is more severe than that of FSA-TFTs. Because the floating body effect of control TFTs is more severe than that of FSA-TFTs. So, VTH roll off phenomenon of control TFTs is more severe.

Figure 3-12 exhibits subthreshold swing (S.S.) roll off characteristics of control TFTs and FSA-TFTs. The drain bias is 5 V. The channel width is 10 µm. The S.S. roll off from 10 µm to 0.8 µm of control TFTs at VD=5 V is 295.84 mV/dec. The S.S. roll off from 10 µm to 0.8 µm of FSA-TFTs at VD=5 V is 148.04 mV/dec. Table 3-3 shows detailed data about subthreshold swing from 10 µm to 0.8 µm. Obviously, S.S. roll off phenomenon of control TFTs is more severe than that of FSA-TFTs.

Figure 3-13 shows the mobility of control TFTs and FSA-TFTs when the channel length is 10 µm and 0.8 µm. The channel width is 10 µm. Table 3-4 shows detailed data about maximum mobility. The maximum mobility of FSA-TFTs are 33.96 cm²/ V-s and 32.01 cm²/V-s when the channel length is 10 µm and 0.8 µm. The degradation of mobility from 10 µm and 0.8 µm is 1.95 cm²/V-s. The maximum mobility of control TFTs is 29.58 cm²/V-s and 23.03 cm²/V-s when the channel length is 10 µm and 0.8 µm. The degradation of mobility from 10 µm and 0.8 µm is 6.55 cm²/V-s.

Clearly, the mobility degradation of control TFTs is more severe than that of FSA- TFTs. This can be explained from Fig. 3-14. Where A is the channel length, B is the S/D regions. When channel length is decreased, the serious S/D resistance becomes prominent. This will result in the across voltage of the channel region becomes smaller. When the lateral electrical field becomes smaller, the mobility becomes smaller. But fully Ni-salicidation can result in the decrease of parasitic resistance. So,

the mobility roll off of FSA-TFTs from 10 µm to 0.8 µm is not severe.

The off-state leakage currents in n-type device are measured for channel length of 10 µm and 0.8 µm at VG=-5 V as shown in Fig. 3-15. Obviously, the leakage current of FSA-TFTs from 10 µm to 0.8 µm has little variation. However, the leakage current of control TFTs from 10 µm to 0.8 µm increases very quickly at VD=8 V. This is because the fully Ni-salicidation can suppress parasitic BJT effect, the FSA-TFTs do not have severe GIDL enhancement current. About GIDL enhancement current is explained clearly in section 3.3.3.

3.2 Basic electrical characteristics of FSA-TFTs (un-doped gate)

In this section, the electrical characteristics of control TFTs and FSA-TFTs (un-doped gate) with RTA 550°C 30-sec are compared.

The parasitic resistance (RP) of the control TFTs is 7.521 kΩ. Figure 3-16 shows the parasitic resistance (RP) of the FSA-TFTs. The value of RP is 0.7224 kΩ.

Obviously, the RP of the FSA-TFTs with un-doped gate is much lower than that of the control TFTs.

Figure 3-17 exhibits ID-VG and field-effect mobility characteristics of the FSA-TFTs with W/L=10 µm/10 µm and Tox=500 Å. The drain bias is 0.5 V and 5.0 V.

The ON current at VD=0.5 V and VG=15 V of FSA-TFTs is 13 µA. The OFF current of FSA-TFTs is 0.1 pA. So, the ON/OFF current ratio is 1.3×10⁸. The maximum mobility of the FSA-TFTs is 32.36 cm²/V-s. All devices’ parameters of the control TFTs and the FSA-TFTs are listed in the Table 3-5. Similar to the results of device with doped gate, ON current, ON/OFF current ratio, the maximum mobility of FSA-TFTs with un-doped gate is higher than those of control TFTs.

Figure 3-18 shows the comparison of ID-VG characteristics at VD=0.5 V between control TFTs and FSA-TFTs with W/L=10 µm/10 µm. Figure 3-19 shows the comparison of mobility between control TFTs and FSA-TFTs with W/L =10 µm/10 µm. The fully Ni-salicidation remarkably improves the mobility of TFTs.

Figure 3-20 show ID-VD characteristics of control TFTs and FSA-TFTs with W/L= 10 µm/10 µm (VG-VTH=3.0 V, 4.0 V, 5.0 V, 6.0 V). The output current of FSA- TFTs is obviously larger than that of control TFTs.

Figure 3-21 shows ID-VD output characteristics of control TFTs and FSA-TFTs with W/L=10 µm/0.8 µm. The kink effect is observed.

Figure 3-22 exhibits VTH roll off characteristics of control TFTs and FSA-TFTs.

All threshold voltages of control TFTs and FSA-TFTs are summarized in Table 3-6.

The threshold voltage roll off from 10 µm to 0.8 µm of control TFTs at VD=0.5 V is 1.402 V. The threshold voltage roll off from 10 µm to 0.8 µm of FSA-TFTs at VD= 0.5

V is 0.48 V. Obviously, threshold voltage roll off phenomenon of control TFTs is more severe than that of FSA-TFTs.

Figure 3-23 shows subthreshold swing (S.S.) roll off characteristics of control TFTs and FSA-TFTs. The drain bias is 5 V. The channel width is 10 µm. Table 3-7 shows detailed data about subthreshold swing from 10 µm to 0.8 µm. The S.S. roll off from 10 µm to 0.8 µm of control TFTs at VD=5 V is 295.84 mV/dec. The S.S. roll off from 10 µm to 0.8 µm of FSA-TFTs at VD=5 V is 172.17 mV/dec. Obviously, S.S. roll off phenomenon of control TFTs is more severe than that of FSA-TFTs.

Figure 3-24 shows the mobility of control TFTs and FSA-TFTs when the channel length is 10 µm and 0.8 µm. The channel width is 10 µm. Table 3-8 shows detailed data about maximum mobility. The maximum mobility of FSA-TFTs is 32.36 cm²/V-s and 29.46 cm²/V-s in the channel length of 10 µm and 0.8 µm. The degradation of mobility from 10 µm and 0.8 µm is 2.9 cm²/V-s. The degradation of mobility from 10 µm and 0.8 µm is 6.55 cm²/V-s in the control TFTs. Clearly, the mobility degradation of control TFTs is more severe than that of FSA-TFTs.

The off-state leakage currents in n-type device are measured for channel length of 10 µm and 0.8 µm at VG=-5 V as shown in Fig. 3-25. Obviously, the leakage current of FSA-TFTs from 10 µm to 0.8 µm has much less variation. However, the leakage current of control TFTs from 10 µm to 0.8 µm increases significantly at VD=8

V. So, the FSA-TFTs does not have severe GIDL enhancement current.

Figure 3-26 shows the GIDL enhancement current for in-situ doped gate and un-doped gate FSA-TFTs with W/L=10 µm/10 µm. The gate voltage is -5 V. The GIDL enhancement current of FSA-TFTs (un-doped gate) is higher than that of FSA -TFTs (in-situ doped gate). The doping of the poly-Si gate prior to complete gate silicidation affects the NiSi workfunction. The different dopant’s amount can tune the work function of NiSi [29]. Different work function of NiSi results in the larger leakage for FSA-TFTs with un-doped gate.

3.3 Analysis of the poly-Si TFT’s electrical characteristics

In this section, some electrical characteristics of devices will be discussed, including the reduction of VTH using the S/D fully salicidation processes, kink effect, Gate-Induced-Drain-Leakage (GIDL) enhancement current.

3.3.1 The reduction of V

TH

using the S/D fully salicidation processes

Fully Ni-salicidation in the S/D region can result in the reduction of the threshold voltage. In the following, a equivalent circuit model is used to explain this phenomenon in Fig.3-27 [33]. A source resistance RS and a drain resistance RD are assumed to connect an intrinsic TFT to the external terminals where VDS and VG are applied. The internal voltages are V’DS and V’G for the intrinsic TFT. The following

relations are :

V’DS=VDS-(RS+RD)IDS--- (Eq. 3.1) V’G=VG-RS×IDS--- (Eq. 3.2) As shown in Fig. 3-27, an actual device with parasitic resistance is equivalent to an intrinsic TFT with a grounded source, with V’G and V’DS at the gate and the drain terminals, and with a negative bias –RSIDS on the substrate. A negative bias on the substrate leads to the body effect. This phenomenon results in the higher threshold voltage.

Fully Ni-salicide in the S/D region can result in the drastic decrease of the series resistance RS and RD. Therefore, the negative bias on the substrate is decreased and the body effect is alleviated. So, the threshold voltage of TFTs could be reduced by the Ni-salicidation process.

3.3.2 Kink effect

The output characteristics exhibit an anomalous current increase in the saturation region. The kink effect is observed. The kink effect in TFTs is showed in Fig. 3-28.

The short gate length and high drain bias result in the lateral electric field becomes stronger. The stronger lateral electric field causes impact ionization near the drain, generating more electron-hole pairs. Due to impact ionization occurring at the drain end of the channel, holes are injected into the floating body. The presence of these holes raises the body potential, which may become large enough to forward bias the

body-source. The hole current flowing into the source forces the electron injection from the source into the body. These electrons flow along the electric field into the drain region. This added drain current augments impact ionization which forward biases the floating body harder. The entire process is like a positive feedback to make the problem serious.

Because FSA-TFT’s source region can be used as a sink for holes [30], holes in the floating body do not accumulate. So, FSA-TFT’s kink effect is not more severe than that of control TFTs.

3.3.3 Gate-Induced-Drain-Leakage (GIDL) enhancement current

GIDL is the off-state leakage current, which occurs when the gate potential is very low or negative and a high drain potential is applied [34]. The leakage current is the tunneling current in the deep depletion region due to the high vertical electric field.

Fig. 3-29 shows the energy band diagram about the tunneling current. The tunneling

theory predicts that

ID=AESexp(-B/ES) --- (Eq. 3.3) Where A is a pre-exponential constant and B has a theoretical value of 21.3MV/cm.

ES is the surface electric field.

In the n-type TFTs, holes generated on the surface of drain by band-to-band tunneling mechanism are swept into the floating body. The floating body potential

rises and becomes forward biased with respect to source (i.e. as emitter). The parasitic npn bipolar therefore enters into forward active mode. The GIDL current, thus, serves as the base current for the lateral bipolar transistor as shown in Fig. 3-30. The resultant

current near the drain junction is thus given by

ID=βIGIDL+IGIDL=(β+1)IGIDL--- (Eq. 3.4) Where β is the gain of the lateral BJT.

The current gain of the lateral BJT increases as the base width decreases.

Therefore, for short channel devices, β is significant, which is not the case with long channel devices. In our above result, we have shown that control TFT’s GIDL current from 10 µm to 0.8 µm is more severe than that of FSA-TFTs. Hence, Ni-salicidation has demonstrated as a very promising technology to eliminate this lateral bipolar transistor effect.

Table 3-1 Summary of parameters of control TFTs and FSA-TFTs (in-situ doped gate, RTA 550°C 30-sec) with W/L=10 µm/10 µm and V

_D

=0.5 V.

V

_TH

(V)

S.S.

(mV/dec)

µ

_FE

(cm

²

/V-s)

I

_ON

(µA)

I

_OFF

(pA)

I

_ON

/I

_OFF

ratio Control

TFTs

1.61 746.28 29.58 12.68 1.25 1.01×10⁷

FSA-

TFTs

1.05 371.71 33.96 14.44 0.1 1.44×10⁸

Table 3-2 V

_TH

(V) roll off of control TFTs and FSA-TFTs (in-situ doped gate, RTA 550°C 30-sec).

10µm/

0.982 0.89 0.887 0.737 0.173 -0.04

Table 3-3 Subthreshold swing (mV/dec) roll off of control TFTs and FSA -TFTs (in-situ doped gate, RTA 550°C 30-sec) with V

_D

=5 V.

10µm/

10µm

10µm/

8µm

10µm/

5µm

10µm/

3µm

10µm/

2µm

10µm/

1µm

10µm/

0.8µm Control

TFTs 727.82 724.12 700 685.79 614.57 495.59 431.98 FSA-

TFTs 340.5 333 328.57 328 290 203.4 192.46

Table 3-4 Maximum mobility (cm

²

/V-s) of control TFTs and FSA-TFTs (in-situ doped gate, RTA 550°C 30-sec).

10µm/10µm 10µm/0.8µm

Control TFTs

29.58 23.03

FSA-TFTs

33.96 32.01

Table 3-5 Summary of parameters of control TFTs and FSA-TFTs (un- doped gate, RTA 550°C 30-sec) with W/L=10 µm/10 µm and V

_D

=0.5 V.

V

_TH

(V)

S.S.

(mV/dec)

µ

_FE

(cm

²

/V-s)

I

_ON

(µA)

I

_OFF

(pA)

I

_ON

/I

_OFF

ratio Control

TFTs

1.61 746.28 29.58 12.68 1.25 1.01×10⁷

FSA-

TFTs

1.69 396 32.36 13 0.1 1.3×10⁸

Table 3-6 V

_TH

(V) roll off of control TFTs and FSA-TFTs (un-doped gate,

Table 3-7 Subthreshold swing (mV/dec) roll off of control TFTs and FSA-TFTs (un-doped gate, RTA 550°C 30-sec) with V

_D

=5 V.

10µm/

10µm

10µm/

8µm

10µm/

5µm

10µm/

3µm

10µm/

2µm

10µm/

1µm

10µm/

0.8µm Control

TFTs 727.82 724.12 700 685.79 614.57 495.59 431.98 FSA-

TFTs 376.5 375.13 372.2 350 301 228.1 204.33

Table 3-8 Maximum mobility (cm

²

/V-s) of control TFTs and FSA-TFTs (un-doped gate, RTA 550°C 30-sec).

10µm/10µm 10µm/0.8µm

Control TFTs

29.58 23.03

FSA-TFTs

32.36 29.46

Fig. 3-1 Cross-section TEM of FSA-TFTs.

Fig. 3-2 Thickness of Poly-Si channel film, Gate oxide and NiSi gate.

Ni Silicide TEOS Spacer

Poly - Si Channel

Wet oxide Gate Source

Drain

Poly - Si Channel Gate Oxide

NiSi Gate

Control

Linear Least Square Fit Curve

7.521k

Fig. 3-3 Parasitic resistance Rp is extracted from the ID-VG of control TFTs

FSA-TFTs

Linear Least Squre Fit Curve

0.7965 k

Fig. 3-4 Parasitic resistance RP is extracted from the ID-VG of FSA-TFTs (in-situ doped gate).

Control

Field-Effect Mobility µ

FE

( cm

2

/V-s )

0

Fig. 3-5 ID-VG and field-effect mobility characteristics of control TFTs with W/L=10 µm/10 µm and TOX=500 Å.

FSA-TFTs

Field-E ffect Mobility µ

FE

( cm

2

/V-s )

0

Fig. 3-6 ID-VG and field-effect mobility characteristics of FSA-TFTs (in-situ doped gate) with W/L=10 µm/10 µm and TOX=500 Å.

VD=0.5 V W/L=10 µm/10 µm TSi = 40 nm Gate Voltage VG ( V )

-5 0 5 10 15

Drain Current I D ( A )

10^-14 10^-13 10^-12 10^-11 10^-10 10^-9 10^-8 10^-7 10^-6 10^-5 10^-4

Control

FSA-TFTs with in-situ doped gate

Fig. 3-7 Comparison of ID-VG characteristics between control TFTs and FSA-TFTs (in-situ doped gate) with W/L=10 µm/10 µm and VD=0.5 V.

VD=0.5 V W/L=10 µm/10 µm TSi = 40 nm Gate Voltage VG ( V )

-5 0 5 10 15

Field-E ffect Mobility µ

FE

( cm

2

/V-s )

0 10 20 30 40

Control

FSA -TFTs with in-situ doped gate

Fig.3-8 The mobility is plotted versus gate voltage at VD=0.5V for both control TFTs and FSA-TFTs (in-situ doped gate) with W/L=10 µm/10 µm. The peak mobility is 29.58 cm²/V-s for control TFTs and 33.96 cm²/V-s for FSA-TFTs.

VG-VTH=3 V,4 V,5 V,6 V W/L=10 µm/10 µm TSi = 40 nm

Drain Voltage VD ( V )

0 2 4 6 8

Drain Current I D ( µA )

0 5 10 15 20 25 30 35

FSA-TFTs with in-situ doped gate Control

Fig. 3-9 ID-VD characteristics of control TFTs and FSA-TFTs (in-situ doped gate) with W/L=10 µm/10 µm. VG-VTH=3.0 V, 4.0 V, 5.0 V, 6.0 V.

VG-VTH=0.5 V,1.0 V,1.5 V,2.0 V W/L=10 µm/0.8 µm

TSi = 40 nm

Drain Voltage VD ( V )

0 1 2 3 4 5

Drain Current I D ( µ A )

0 10 20 30 40 50 60 70

FSA-TFTs with in-situ doped gate Control

Fig. 3-10 ID-VD output characteristics of control TFTs and FSA-TFTs (in-situ doped gate) with W/L=10 µm/10 µm. VG-VTH=0.5 V, 1.0 V, 1.5 V, 2.0 V. Note that kink effect is observed at high drain bias.

V

_TH

roll off Comparsion T

_Si

= 40 nm Gate Length L ( µm )

0 2 4 6 8 10

Threshold Voltage V TH ( V )

-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0

FSA-TFTs with in-situ doped gate VD=0.5 V FSA-TFTs with in-situ doped gate VD=5 V Control VD= 0.5 V

Control VD= 5 V

Fig. 3-11 Threshold voltage roll off vs. channel length. The channel width is 10 µm.

The drain voltage is 0.5 V and 5 V.

S.S. roll off V

_D

=5 V T

_Si

= 40 nm Gate Length L ( µm )

0 2 4 6 8 10

Subthreshold Sw ing S.S. ( mV/dec )

0 100 200 300 400 500 600 700 800

FSA-TFTs with in-situ doped gate Control

Fig. 3-12 Subthreshold Swing roll off vs. channel length. The channel width is 10 µm.

The drain voltage is 5 V.

Gate Voltage VG ( V )

-5 0 5 10 15

Field-E ffect Mobility µ

FE

( cm

2

/V-s )

0 10 20 30 40

FSA-TFTs with in-situ doped gate 10/10 FSA-TFTs with in-situ doped gate 10/0.8

Control 10/10 Control 10/0.8

Mobility T

_Si

= 40 nm

Fig.3-13 The mobility is plotted versus gate voltage for both control TFTs and FSA -TFTs (in-situ doped gate) with W/L=10 µm/10 µm and W/L=10 µm/0.8 µm.

Fig.3-14 Schematic structure of device layout

G

D S

A

B

Fig.3-15 The GIDL enhancement current for both control TFTs and FSA-TFTs (in- situ doped gate) with W/L=10 µm/10 µm and W/L=10 µm/0.8 µm.

GIDL Enhancement Current VG= -5 V

TSi = 40 nm Drain Voltage VD ( V )

0 2 4 6 8

Drain Current I D ( A )

10^-14 10^-13 10^-12 10^-11 10^-10 10^-9 10^-8 10^-7 10^-6

FSA-TFTs with in-situ doped gate 10/10 FSA-TFTs with in-situ doped gate 10/0.8 Control 10/10

Control 10/0.8

Fig. 3-16 Parasitic resistance Rp is extracted from the ID-VG of FSA-TFTs (un-doped

Linear Least Square Fit Curve

0.7224 k

FSA-TFTs

Field-Effect Mobility µ

FE

( cm

2

/V-s )

0

Fig. 3-17 ID-VG and field-effect mobility characteristics of FSA-TFTs (un-doped gate) with W/L=10 µm/10 µm and TOX=500 Å.

VD=0.5 V W/L=10 µm/10 µm TSi = 40 nm Gate Voltage VG ( V )

-5 0 5 10 15

Drain Current I D ( A )

10^-14 10^-13 10^-12 10^-11 10^-10 10^-9 10^-8 10^-7 10^-6 10^-5 10^-4

Control

FSA-TFTs with un-doped gate

Fig. 3-18 Comparison of ID-VG characteristics between control TFTs and FSA-TFTs (un-doped gate) with W/L=10 µm/10 µm and at VD=0.5 V.

Gate Voltage VG ( V )

-5 0 5 10 15

Field-Effect Mobility µ

FE

( cm

2

/V-s )

0 10 20 30 40

FSA-TFTs with un-doped gate Control

VD=0.5 V W/L=10 µm/10 µm TSi = 40 nm

Fig.3-19 The mobility is plotted versus gate voltage at VD=0.5 V for both control TFTs and FSA-TFTs (un-doped gate) with W/L=10 µm/10 µm. The peak mobility is 29.58 cm²/V-s for control TFTs and 32.36 cm²/V-s for FSA-TFTs.

VG-VTH=3 V,4 V,5 V,6 V W/L=10 µm/10 µm TSi = 40 nm

Drain Voltage VD ( V )

0 2 4 6 8

Drain Current I D ( µA )

0 5 10 15 20 25 30 35

FSA-TFTs with un-doped gate Control

Fig. 3-20 ID-VD characteristics of control TFTs and FSA-TFTs (un-doped gate) with W/L=10 µm/10 µm. VG-VTH=3.0 V, 4.0 V, 5.0 V, 6.0 V.

VG-VTH=0.5 V,1.0 V,1.5 V, 2.0 V W/L=10 µm/0.8 µm

TSi = 40 nm

Drain Voltage VD ( V )

0 1 2 3 4 5

Drain Current I D ( µA )

0 10 20 30 40 50 60 70

FSA-TFTs with un-doped gate Control

Fig. 3-21 ID-VD output characteristics of control TFTs and FSA-TFTs (un-doped gate) with W/L=10 µm/10 µm. VG-VTH=0.5 V, 1.0 V, 1.5 V, 2.0 V. Note that kink effect is observed at high drain bias.

VTH roll off Comparsion TSi = 40 nm Gate Length L ( µm )

0 2 4 6 8 10

Threshold Voltage V TH ( V )

-1 0 1 2

FSA-TFTs with un-doped gate VD=0.5 V FSA-TFTs with un-doped gate VD=5 V Control VD= 0.5 V

Control VD=5 V

Fig. 3-22 Threshold voltage roll off vs. channel length. The channel width is 10 µm.

The drain voltage is 0.5 V and 5 V.

S.S. roll off VD = 5 V TSi = 40 nm Gate Length L ( µm )

0 2 4 6 8 10

Subthreshold Sw ing S.S. ( mV/dec )

0 100 200 300 400 500 600 700 800

FSA-TFTs with un-doped gate Control

Fig. 3-23 Subthreshold swing roll off vs. channel length. The channel width is 10 µm.

The drain voltage is 5 V.

Gate Voltage VG ( V )

-5 0 5 10 15

Field-E ffect Mobility µ

FE

( cm

2

/V-s )

0 10 20 30 40

FSA-TFTs with un-doped gate 10/10 FSA-TFTs with un-doped gate 10/0.8 Control 10/10

Control 10/0.8

Mobility TSi = 40 nm

Fig.3-24 The mobility is plotted versus gate voltage for both control TFTs and FSA-

Fig.3-24 The mobility is plotted versus gate voltage for both control TFTs and FSA-

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