3.3 P ERFORMANCE A NALYSIS
3.3.4 Overall System Performance
The overall system performance will be shown in this section. For separating fixed reception from portable reception, we divide the overall system performance into two parts:
static channel and mobile channel.
(1) Static channel
The overall system performance in static Gaussian channel, Ricean channel and Rayleigh channel are depicted in Fig 3.16, Fig 3.17 and Fig 3.18 respectively. The transmission works in 2k mode, GI=1/4, code rate=2/3, SCO 20ppm, CFO 10.3.
Fig 3.16 Overall system performance in static Gaussian channel
Fig 3.17 Overall system performance in static Ricean channel
Fig 3.18 Overall system performance in static Rayleigh channel
It’s clear that the frequency selective channel leads to an unavoidable degradation of several decibels with respect to nonselective AWGN channel. Severe frequency selectivity caused by very long channel delay profiles means the OFDM spectrum exhibits many notches which degrades the channel estimation gain and causes the noise enhancement. In the Rayleigh channel, the ideal system performance has SNR degradation of about 8dB compared with AWGN channel. The SNR loss of each case is listed in Table 3-8.
Table 3-8 SNR loss in static Gaussian, Ricean and Rayleigh channel Gaussian Ricean Rayleigh
QPSK 0.21 0.15 ~0
16-QAM ~0 0.11 0.12
64-QAM ~0 0.28 0.31
(2) Mobile channel
In the case of mobile reception condition, the Doppler spread has to be considered. For providing practical environment simulation, we assume the maximum Doppler frequency as 70 Hz which is corresponding to velocity of 150 km/h. The overall system performance in Rayleigh channel with Doppler spread 70Hz is shown in Fig 3.19. The simulation performs in 2k mode, GI=1/4 and code rate=2/3, SCO 20ppm, CFO 10.3.
Fig 3.19 Overall system performance in Rayleigh channel with Doppler frequency 70Hz
The Doppler tolerance varies with transmission mode and constellation mapping. The synchronization loss is less than 0.2dB in every transmission mode. The detail values of synchronization loss are listed in Table 3-9.
Table 3-9 Synchronization loss and total SNR loss in mobile channel
QPSK 16-QAM 64-QAM Synchronization Loss ~0 0.20 0.13
Chapter 4 .
Hardware Integration
For overall synchronization system, it concludes 4 parts: acquisition, tracking, TPS decode and RS header synchronization. In section 2.4, we have already discussed the TPS decode and RS header synchronization. In this section, two parts of synchronization schemes for integration is brought out: the acquisition part and tracking part. The acquisition part concludes GI/Mode detector, coarse symbol synchronizer, fractional/integer CFO synchronizer and scattered pilot mode detector. Tracking part concludes fine symbol synchronization, SCO and residual CFO tracking. The overall synchronization scheme is shown in Fig 4.1. The block diagram of integration synchronization scheme is shown in Fig 4.2.
Fig 4.1 overall synchronization scheme
Fig 4.2 locations of integration synchronization system in receiver platform
4.1 Acquisition
(1) GI/Mode Detector
The Blind Detection of guard interval length and transmission mode must be done prior to timing synchronization and channel estimation. Mode/GI detection can exploit the cyclic prefix property of guard interval and use correlation method with normalization (NMC), as shown in Fig 4.3. The equation is expressed as:
1
where we choose moving length as 1/32 symbol length, it is the shortest guard interval length.
And then correlating and normalizing the received data. According to cyclic prefix property we can obtain a moving sum curve and a fixed threshold. If we do not normalize the
correlation, the threshold is dynamic with guard interval length. Besides, first we check 2k mode and then check 8k mode.
Moving Sum (GI/Mode)
GI GI
Moving window
threshold
Fig 4.3 Normal Maximum Correlation algorithm for GI/Mode Detector
(2) Coarse Symbol Synchronizer
Coarse Symbol Synchronization is the first action after Mode/GI detector. The target of Coarse Symbol Synchronization is to make a one-shoot decision finding symbol boundary. It must locate in the guard interval for ISI error free. We use correlation concept and choose the NMC algorithm to illustrate the moving sum curve, as shown in Fig 4.4. The equation is expressed as:
The moving length is the guard interval length that is the most notable different between Coarse Symbol Synchronizer and GI/Mode Detector. Hence, we can consider choosing NMC algorithm can reach the most relation and obtain the best cost saving.
Moving Sum (Coarse sym)
Moving window Choose maximum
to find symbol bound
GI GI
Fig 4.4 Normal Maximum Correlation algorithm for Coarse Symbol Synchronizer
(3) Fractional CFO synchronizer
From chapter 2, we can know that the phase of the received signal in time domain is rotated by CFO linearly according to the sample time instant tn as (2-4) shows. When the difference of sample time instant between two received signals is equal to FFT length N, the phase error difference caused by CFO between them can be expressed as
( ) ( ) 2 2 The tail received sample and its cyclical prefix show the same property except for a phase rotation error which is exactly 2πεF. The estimation of fractional CFO value can be accomplished with the MLE of differential phase between guard interval and the tail of symbol [18], and can be expressed as
(4-4) shows that the distinguishable phase error is within ± , so the estimation range of the π fractional CFO synchronization is also limited within ±0.5 subcarrier space. In the proposed acquisition synchronization scheme, the rough estimation of fractional CFO is calculated with the first symbol after symbol boundary is decided. And then the estimated fractional CFO value
ε
^F will be sent to the CFO compensator before data being sent to FFT demodulator.The MLE is a correlator and a moving summation of length GI. It can be shared from NMC correlator.
(4) Scattered Pilot Mode Detection
It is known that the distribution of scattered pilots has four modes. The proposed scattered
pilot mode detection exploits the property of boosted power level scattered pilots. Since the power level of scattered pilots is 16/9 while other data subcarrier is 1, we take one OFDM symbol and divide the subcarriers into 4 groups. Afterward, we accumulate the power of subcarrier belong to each group respectively as shown in (4-5)
/12 1
Although the power of each subcarrier is possible larger than 16/9 such as maximum power level of 7/3 in non-hierarchical 64-QAM, many times of accumulations make the false detection rate almost reduce to zero. This correlator can be shared from NMC correlator.
(5) Integer CFO synchronizer
In order to utilize the advantage of lower computational complexity and to improve the performance in critical channel condition, in [19], it proposes a new guard band power detection based algorithm but not continual pilot based algorithm. By deciding the CFO is positive or negative, the search range of integer CFO can be reduced effectively and more OFDM symbols can be utilized to improve the acquisition performance. Thus, the guard band power detection based algorithm still keeps the moving window scheme and calculates the summation of signal power within three successive OFDM symbols, and can be expressed as
max while negative value estimated by the first stage, and − ≤ ≤ while positive value, w1 i m respectively. As Fig 4.10 shows, by the use of summation within three successive OFDM symbols, the distortion induced by noise in severe environment can be decreased effectively.
exploited from NMC algorithms.
Kmax
Kmin
Fig 4.5 The proposed guard band power detection based approach
4.2 Tracking
Tracking system concludes three parts, one is fine symbol synchronization and the others are residual CFO and SCO tracking. The CFO tracking and SCO estimation algorithm and tracking loop are similar to each other. In this paper, we use conclusion of section 2.4: SP based algorithm and feedback forward tracking loop to determine the SCO and residual CFO synchronization. SCO equation is expressed in (2-30) and architecture is shown in Fig 2.29.
The CFO estimation can be expressed as:
( )
and the tracking loop architecture is shown in Fig 4.6. And timing diagram is shown in Fig 4.7.
1 4 2 1× π⎛⎜⎝ +N Ng/ ⎞⎟⎠
4 2 1 g/ ki⋅ × π⎛⎜⎝ +N N⎞⎟⎠
Fig 4.6 the architecture of proposed residual CFO tracking loop with SP method
1 2 3
FFT_in 4 5 6 7 8 9
1 2 3 4 5 6 7 8
∆f15 Phase compensated
current 1 2 3 4 5 6 7 8
1 2 3 4
∆f37
∆f26
Fig 4.7 timing diagram of proposed residual CFO tracking loop architecture with SP method
From the tracking loop architecture and estimation algorithm, we can see the residual CFO and SCO is only different in one coefficient D1,k and D2,k. Hence, the reuse of their hardware is applied.
4.3 Integration Result
The hardware analysis reference is from [1] proposed in ISSCC2006, and is listed in Table 4-1. In Table 4-1, It shows the synchronization function and the relative gate count.
Table 4-1 the hardware gate count of synchronization function in [1]
Function Gate count
GI/Mode detector 7861 Coarse symbol Sync. 8590 SP mode detection 2963 Fractional CFO Sync. 8219 Integer CFO Sync. 12224 SCO tracking 11006 Residual CFO tracking 11686
Total 62549
The proposed hardware integration result is listed in Table 4-2, in Table 4-2, it shows the gate count of proposed synchronization function and the reused part, moving correlation core and tracking core.
Table 4-2 the hardware gate count of synchronization function for the proposed design
Function Gate count
GI/Mode detector 784 Coarse symbol Sync. 1535 SP mode detection 329 Fractional CFO Sync. 1117 Integer CFO Sync. 5020 Moving correlation core 7268
SCO tracking 1195
Residual CFO tracking 1399 Tracking core 10156
Total 28803
In Table 4-1 and Table 4-2, we can calculate the proposed design hardware integration. The hardware decreases from 62549 to 28803, and the saving of hardware reaches 46% than conventional design [1] in ISSCC2006.
Chapter 5 .
Conclusion and Future Work
The synchronization system for DVB-T/H standard is completed in this paper. In this paper, we propose three synchronization designs: carrier phase alignment, sampling clock synchronization and fast synchronization. First, Carrier phase alignment solves worst channel in the mobile environment. At SCO 20ppm and Doppler frequency 70Hz in Rayleigh multipath with SNR 34dB, our DVB-T/H system still reaches Quasi Error Free (QEF) criterion. Second, sampling clock synchronization separates into two parts: SCO estimation and SCO tracking. The target is different for these two parts. Target of SCO estimation is estimation accuracy and targets of SCO tracking are tracking convergence and convergent time. In this paper, the proposed design improves the SCO estimation accuracy 2~5 times and reduces the SCO tracking time 3 times. Third, in fast synchronization discussion, our proposed design can decrease the synchronization time 2~4.5 times. It also means that, in timing slicing architecture for DVB-H standard, we can save power consumption 65%~95%
and reduce receiver buffers 1Mbits~3Mbits. Finally, the overall system performance of the proposed synchronization system loses below 0.31dB for all kinds of channels, including static and mobile environments.
In this paper, we also integrate the hardware of synchronization schemes. We proposed to reuse the similar part of the synchronization architecture. The proposed hardware integration method decreases 46% gate counts than the conventional design [] proposed in ISSCC2006.
In the future, we plan to integrate the proposed designs, including the 3 proposed synchronization designs and proposed hardware integration, with the DVB-T/H system in [1].
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作 者 簡 歷
姓名 ：李家豪
出生地 ：台灣省台南市 出生日期：1982. 8. 22
學歷： 1989. 9 ~ 1994. 6 台南市立永華國民小學 1994. 9 ~ 1997. 6 台南市立新興國民中學 1997. 9 ~ 2000. 6 國立台南第一高級中學
2000. 9 ~ 2004. 6 國立暨南國際大學 電機工程學系 學士 2004. 9 ~ 2006. 7 國立交通大學 電子研究所 系統組 碩士