Plasma Treatment Time Dependence

Fig. 3-1 – Fig. 3-3 illustrate IDS–VGS and Gm–VGS characteristics of n-channel poly-Si TFTs for control sample and the samples with NH3 plasma pre-SPC-treatment, post-SPC-treatment, and after-AA-treatment at VDS of 0.1 V, respectively. These poly-Si TFTs were exposed to NH3 plasma with power of 50 W, and the plasma treatment time varied from 15 min to 120 min. The subthreshold double-hump phenomenon has been measured in these poly-Si TFTs. The subthreshold double-hump phenomenon indicates that there are two conduction paths for the device [3.4]. During plasma dry etching processing, especially in active area patterning, high energy photons may cause various types of damage, such as a shift in the threshold

voltage and the formation of crystalline defects [3.5]-[3.8]. It has been reported that plasma-induced charging stress produces the generation of hole traps and interface states in the gate oxide. The generation of hole traps will lead to negative VTH shift [3.9]-[3.10]. The top-view of bottom gate poly-Si TFTs with different channel width are shown in Fig. 3-4 (a) and (b). For the poly-Si TFT in the width direction, the equivalent channel width can be divided into the flat plate and corner edge portions.

During active area patterning, plasma may cause damage on the sidewall of the oxide, and the plasma-induced charging will generate new hole traps at the corner edge portions. These hole traps in the gate oxide lead to negative VTH shift at the corner edge portions, and the corner edge portions will have lower VTH than the flat plate portion. As shown in Fig. 3-5, this transistor can be equivalent to flat plate transistor and corner edge transistor in parallel. At low VGS region, corner edge transistor which has low VTH will be turned on first, then the flat plate transistor which has high VTH

will be turned on as VGS is further increased [3.11]. Moreover, the non-uniform VTH

exhibits the early turn-on phenomena.

Once the channel width decreases from 10 μm to 2 μm, the corner edge portions will gradually dominate the device characteristics as shown in Fig. 3-4 (b). The IDS– VGS characteristics for the samples with 2 μm channel width are shown in Fig. 3-6 and Fig. 3-7. The poly-Si TFTs with 2 μm channel width have large off-state leakage current (IOFF) due to the impacts of the corner edge portions. The hole traps generated by plasma dry etching at the corner edge portions construct a leakage path and lead to a large IOFF. In addition, for the poly-Si TFTs with NH3 plasma after-AA-treatment as shown in Fig. 3-7, the IOFF become smaller with longer NH3 plasma treatment time.

We hypothesize NH3 plasma after-AA-treatment may eliminate some of the hole traps generated by active area patterning, and after-AA-treatment may decrease the IOFF.

Threshold voltage (V ), and maximum transconductance (G ) as a function

of plasma treatment time are shown in Fig. 3-8 – Fig. 3-9. VTH is defined as the gate voltage that yields a drain current (IDS) of 100 nA , where IDS = 100 nA × (W/L). As shown in Fig. 3-8, the poly-Si TFTs with NH3 plasma pre-SPC-treatment have the largest VTH and the lowest Gm_max. Besides, the poly-Si TFTs with NH3 plasma pre-SPC-treatment have even larger VTH and lower Gm_max than control sample without any NH3 plasma treatment. It has been revealed that although NH3 plasma pre-SPC-treatment before SPC annealing significantly shortens the a-Si film crystallization time, the average grain size of the device with NH3 plasma pre-SPC-treatment is smaller than that of the device without any plasma treatment [3.3]. In general, the smaller grain size usually leads to the worse device performance because of the larger amount of grain boundaries defects. Furthermore, even though some nitrogen and hydrogen radicals terminate the dangling bonds at the grain boundaries during plasma pre-SPC-treatment processing, the following SPC annealing at high temperature (600℃) will lead to the out-diffusion of nitrogen and hydrogen radicals. The passivation effect breaks since the nitrogen and hydrogen radicals release from the defect sites [3.1]. Hence, due to 1) the smaller grain size of the device with NH3 plasma pre-SPC-treatment, and 2) the out-diffusion of nitrogen and hydrogen radicals during high temperature SPC annealing, the poly-Si TFTs with NH3 plasma pre-SPC-treatment will have worse performance than control sample without any NH3 plasma treatment.

Moreover, the poly-Si TFTs with post-SPC-treatment or after-AA-treatment have substantial improvements of performance compared with control sample. The poly-Si TFTs have the smallest VTH with NH3 plasma after-AA-treatment. In addition, the poly-Si TFTs with NH3 plasma after-AA-treatment have higher Gm_max than those with post-SPC-treatment ones for plasma treatment time ≤ 30 min. I. W. Wu et al.

demonstrated that the deep states, which originate from the dangling bonds at grain

boundaries, degrade the threshold voltage and the subthreshold swing. The tail states, which originate from the strain-bond-related intra-grain defects, degrade the field-effect mobility and minimum leakage current [3.12]. According to the literature, we presume the improvements, including smaller VTH and higher Gm_max of the poly-Si TFTs come from the passivation effect by after-AA-treatment. Moreover, it has been revealed that gate oxide is the major diffusion path for plasma radicals, because radicals diffuse rapidly in SiO2. In contrast to SiO2, for the poly-Si thin film, Si dangling bonds in the gain boundaries act as traps rather than as paths of enhanced diffusion [3.13]. Even though the cross-sectional area of the SiO2 is small, radicals are directly guided along the SiO2 to the SiO2/poly-Si interface. By diffusing laterally within the SiO2, radicals effectively passivate the traps in the middle of the channel.

Therefore, after-AA-treatment passivates channel traps not only by radicals diffusing vertically through the poly-Si channel, but also by radicals diffusing laterally through the gate oxide as shown in Fig. 3-10. Because After-AA-treatment additionally passivates traps by radicals diffusing laterally through the gate oxide, it has higher passivation efficiency than post-SPC-treatment. As a result, NH3 plasma after-AA-treatment is indeed a technique to effectively passivate the dangling bonds at grain boundaries (deep states) as well as the intra-grain traps (tail states).

For plasma treatment time > 30 min, the poly-Si TFTs with NH3

after-AA-treatment have smaller VTH but lower Gm_max compared with the samples with post-SPC-treatment. The degraded Gm_max may be attributed to the following mechanisms. Although after-AA-treatment passivates traps much more efficiently than post-SPC-treatment, the poly-Si TFTs with NH3 plasma after-AA-treatment suffer from heavier ion bombardment damage. During plasma treatment processing, bombardment by energetic ions may cause breakage of chemical bonds and damage the poly-Si channel [3.8]. Furthermore, ion bombardment may also lead to the

generation of interface traps, degrade carrier transport and decrease the Gm_max. Due to the extra damage on the sidewall of the channel as shown in Fig. 3-11, after-AA-treatment results in heavier damage than post-SPC-treatment. Therefore, for plasma treatment time > 30 min, ion bombardment damage becomes the non-negligible mechanism for performance degradation for the samples with after-AA-treatment. For these reasons, the poly-Si TFTs with after-AA-treatment have lower Gm_max than those with post-SPC-treatment ones for plasma treatment time

> 30 min. Since the poly-Si TFTs with NH3 plasma pre-SPC-treatment have even worse performance than control sample without any NH3 plasma treatment, we do not take results of the poly-Si TFTs with pre-SPC-treatment into account in the following discussions.

Fig. 3-12 and Fig. 3-13 illustrate IDS–VDS characteristics of n-channel poly-Si TFTs for control sample and the samples with NH3 plasma post-SPC-treatment, and after-AA-treatment, respectively. At low VDS region, both of the poly-Si TFTs with post-SPC-treatment and after-AA-treatment exhibit better performance than control sample. As VDS is further increased, the kink effect has been measured in these poly-Si TFTs, and the kink effect is more significant for control sample than the samples with NH3 plasma post-SPC-treatment or after-AA-treatment. The slopes of IDS–VDS characteristics for VDS from 3 V to 6 V are shown in Fig. 3-14 and Fig. 3-15.

The steeper slope indicates the kink effect more obviously. According to these results, the longer NH3 plasma treatment time can alleviate kink effect more effectively.

Hence, we hypothesize that kink effect can be suppressed by NH3 plasma treatment because of the reduction of traps. There are several explanations for kink effect, which is related to traps, have been reported. M. Hack et al. claimed that it is the presence of grain boundaries or traps in the poly-Si that causes kink effect to be much more significant than in comparable single-crystal silicon counterparts [3.14].A. K. K.

P. et al. demonstrated that due to grain boundaries, the local electric field near the irregular surface might be appreciably greater than the average electric field, which might initiate additional impact ionization [3.15]. Besides, B. Kim et al. indicated that the kink effect exists at the non-treated poly-Si TFTs do not appear at the surface-treated ones because the kink effect has been known to depend on the nature of surface states [3.16]. Thus, the reduction of traps by NH3 plasma treatment is a reasonable explanation for the suppression of the kink effect.

During processing of plasma, such as thin film deposition, plasma etching and plasma treatment, gate oxides are also subjected to plasma-induced damage. Due to the electron, ion and particle bombardment, the gate oxide may be weakened by plasma related processes [3.17]. On the contrary, H. C. Cheng et al. claimed that after NH3 plasma treatment, the oxide quality is improved because the nitrogen and hydrogen radicals in the oxide may strengthen the strained bonds and passivate the trap-states [3.2]. Nevertheless, the samples of the above-mentioned literatures were top gate structure, not bottom gate structure. In order to clarify the influences on bulk oxide quality for bottom gate poly-Si TFTs by NH3 plasma treatment, Fig. 3-16 and Fig. 3-17 show gate-leakage current characteristics of poly-Si TFTs. All samples with different plasma treatment time exhibit comparable gate-leakage current characteristics, which indicate the bulk oxide quality for bottom gate poly-Si TFTs are insensitive to NH3 plasma treatment with plasma power of 50 W.