2.2 Device Fabrication 4
2.3.4 Principle of the IFCP Measurement for High–K Dielectrics 11
We mentioned that low leakage IFCP measurement can reduce the leakage component and extract interface state density accurately. Unfortunately this excellent method can not be applied to high K devices due to fast oxide traps. When a low frequency is applied to the gate, the ICP includes two component which are ICP,Nit and ICP,Not. On the other hand, a high frequency applying to gate, the composition of charge pumping current is almost Nit. This
phenomenon has already been described by R. Degraeve and A. Kerber [11]. Fig. 2.6 shows the charge pumping measurement at 1MHz and 2MHZ. We could find unreasonable results since ICP has two components at low frequency, if we applied the IFCP measurement to high K device. In the meanwhile, we also find that high frequency CP measurement is more sensitive in gauging the interface state density. Using this characteristic, we improve IFCP for high K device. Eqs. (2.5), (2.6), and (2.7) show the ICP that measured for high K device, i.e.,
ICP,ƒ1=2MHz with-leakage= ICP,ƒ 1=2MHz,Nit + ICP,ƒ 1=2MHz,Not + ICP,leakage@ƒ 1 (2.5) and
ICP,ƒ 2=2.1MHz with-leakage= ICP,ƒ2=2.1MHz,Nit + ICP,ƒ 2=2.1MHz,Not + ICP,leakage@ƒ2 (2.6) and
ICP,ƒ 3=2.2MHz with-leakage= ICP,ƒ 3=2.2MHz,Nit + ICP,ƒ 3=2.2MHz,Not + ICP,leakage@ƒ 3. (2.7)
Since the DC leakage currents are the same, we will take out leakage current by IFCP method. IFCP for high K can expressed as :
ICP,100KHzcorrect= ICP,ƒ 2=2.1MHz,Nit － ICP,ƒ 1=2MHz,Nit (2.8) and
ICP,200 KHz correct= ICP,ƒ 3=2.2MHz,Nit － ICP,ƒ 1=2MHz,Nit. (2.9)
If the correct CP curve is directly proportional to the frequency, it will be equal to the difference of two CP curves. Furthermore, we show evidences to prove that IFCP can be applied to high K devices, shown in Eq. (2.10) and Fig. 2.7
-0.45 -0.30 -0.15 0.00 0.15 0.30 0.45 0.60 0
3 6 9 12 15
I
CP, f1 = 2MHz≠ 2 X I
CP, f2 = 1MHzI CP,f1 = 2MHz
I CP,f2 = 1MHz
Charge P u mpi ng Curre n t, I
CP(n A)
High Level Gate Voltage, Vgh (V)
Leakage Current
NMOS
HfSiON/IL(A) EOT = 10.2Å
Fig. 2.6 Measured I
CP at two frequencies. We can find the inconsistency of the results using IFCP method.-0.45 -0.30 -0.15 0.00 0.15 0.30 0.45 0.60 0
5 10 15 20 25 30
NMOS
HfSiON/IL(A) EOT = 10.2Å
I
CP,f2 = 2.1MHz- I
CP,f1 = 2MHzI
CP,f3 = 2.2MHz- I
CP,f1 = 2MHzI
CP,f1 = 0.2MHzI
CP,f2 = 2.1MHzI
CP,f3 = 2.2MHzCharge Pumpi ng Current , I CP (nA)
High Level Gate Voltage, Vgh (V)
Leakage Current
Fig. 2.7 This figure shows I
CP,200 KHz correct = 2．ICP,100 KHz correct, and we can apply IFCP to high-K devices.As aforementioned, we can monitor the charge pumping current by observing the interface trap density for high K devices.
2.4 Extraction of the Traps in High-K Dielectrics
The technique of charge pumping is frequently used in the study of interface traps by applying a square wave to the gate of the device and measuring the resulting current through the source and drain. The interface traps charge and discharge with a charge pumping current (ICP) directly proportional to frequency f; however, the charge recombined per cycle (QCP = ICP/f remains the same irrespective of the measurement frequency [12]. In a device, with traps located spatially near Si/IL (interfacial layer) interface, is held in inversion for a period of time longer than the tunneling time constant, then communication may occur between the interface traps and traps in the high-K film. This results in an additional current component and gives rise to an increase of the charge recombined per cycle. In this work, devices fabricated with the HfSiON film are characterized by a high concentration of traps in the high-k film with a well-defined trapping distance, corresponding to the interfacial layer.
Fig. 2.8 shows that at low frequency, nMOS exhibits significantly higher Nt. Such charge trapping in nMOS not only reduces the amount of free carriers in the channel but also serves as additional coulomb scattering centers to lower the electron mobility. Nt of nMOS can be divided into two parts based on its dependence on frequency: one is frequency independent part named as interface traps (Nit), which locates at Si/IL interface next to channel with very short time constant. Another is frequency dependent part, which is referred to as oxide traps (Not) of the HfSiON layer. In this thesis, we will separate the influence of the traps in HfSiON from the influence of interface traps on the charge recombined per cycle in a
Fig. 2.8 The recombined charge per cycle (Qcp) for the high-k device. The charge pumping current is seen to increase for lower frequencies indicating that the charge pumping current is the sum of an interface trap component and a bulk trap in high-k dielectric..
2000000 4000000 6000000
8 9 10 11 12 13 14 15
Charge Recombi ned per Cycle(10
-10)
Frequency (Hz)
nMOSFET Halo(1)
W/L= 10/0.09 µ m
EOT=10.2Å
charge-pumping experiment. Since, by varying the charge-pumping frequency we can sense different fractions of the trap density. Therefore, using the above skill and the time constant of the electron trap-to-band tunneling detrapping process, it will help us to obtain the trap density in the HfSiON away from the interfacial layer.
2.5 Summary
In this chapter, experimental analysis methods have been described. In the latter discussions, we will use these experimental techniques to discuss the traps in the gate dielectrics and interface trap in Si/IL (interfacial layer) for nMOSFET under CVS (constant voltage stress). By using the IFCP method and the method of separating Nit and Not, the difference between halo(1) and halo(2) samples will also be studied.
Chapter 3
Investigation of the Properties in HfSiON Film
3.1 Introduction
Device scaling is a driving force of semiconductor industry in productivity and performance as predicted by Moor’s law. Nano-scale MOSFET transistor and MOS capacitor have reached their fundamental limits and the introduction of new gate dielectric materials has been surveyed and investigated for a continued scaling. As a trade-off for very short channel device length, ultra-thin and high quality gate oxide is strongly needed. Among them, high-K materials as a gate stack has attracted great interest. Recently, HfSiON has been successfully integrated into CMOS as gate dielectrics for low power applications, with good reliability and comparable mobility.
Although, high-k dielectrics increase the physical thickness, the direct tunneling leakage still exists with EOT (equivalent oxide thickness) scaling down to below 16Å. Therefore, the leakage current will induce measurement error for ultra-thin gate dielectrics CMOS devices.
To investigate the properties of HfSiON correctly, we need to eliminate the leakage current during the measurement by the IFCP method. The traps in the HfSiON and interface will be evaluated.