Redundant Residue Calibration Technique

To correct the nonlinearity of the residue amplifier, [70] applied a redundant residue mode to estimate the nonlinearity in the background. Figure 4.12 (a) shows the simplified ADC block diagram. The first stage with 1.5-bit/stage MDAC configuration is applied as an example to describe the calibration technique. The sub-ADC operates with extra one bit resolution by using redundant comparators. To complete the estimation, a simple digital logic is inserted to control the sub-DAC with sub-ADC output D1 and control signal MODE. The control signal MODE is generated from the post-processor, which collects the output D₁ and Z-ADC output Dz to do the estimation and compensation. There are two residues, one is for MODE=0 and the other is for MODE=1, shown in Figure 4.12 (b). If the residue is ideal, without any nonlinearity, the distance (h) between two residues is constant, which is independent on the value of V₁. However, if the residue amplifier is not ideal but with nonlinearity, the distance H1is different from H2for variable V1inputs Va and Vb respectively. Figure 4.12 (c) shows these two residues with the nonlinearity.

The shadow area represents the lost information caused by the distortion of the residue amplifier. If H₁ and H₂ can be obtained, the compensation factor p₂ can be applied to correcting the Z-ADC output Dzin the post-processor.

The above method is applied if the input V₁ can be assigned at the central value V_a and boundary value Vb. However, input assignment can not operate in the background.

To avoid this, a histogram-based estimation technique was proposed in [70]. The distance estimation process is based on evaluating cumulative histograms of the corrected Z-ADC output D_z^c in the post-processor. The cumulative histogram count (CH (x)) is collected for all output code D^c_zwhich is less than or equal to the code x. The control signal MODE is generated from a binary random sequence with equal probability for zero and one. The cumulative histogram counts for different two residues at same input V1are expressed as CH(q) and CH (r) for MODE=0 and MODE=1 respectively. One important feature of the redundant residue calibration is that the count for arbitrary input V1 does not change

V1 V2

Figure 4.12: Redundant residue calibration (a) block diagram, (b) two residue modes and (c) redundant residues with nonlinearity.

due to MODE switching. If no MODE switching, only CH (q) is counted to have n counts. Ideally, if MODE is switching with equal probability for zero and one, the count of CH (q) is equal to that of CH (r), which is equal to n/2. But due to randomness in the modulation, particular outcomes will vary and most often not result in a perfect n/2 split. However, the neighbor cumulative histogram counts for CH (r) are also collected with a large number of samples to suppress the error due to randomness. From the closest match, the distance estimate H1 is obtained. For the example shown in Figure 4.12 (c), the distance H₁ is equal to (r − 1 − q). It can be shown that H₁ is an asymptotically unbiased estimate of the true residue distance H₁, i.e., for increasingly large sample sizes, the estimate approaches the true value. Actually, the variance of H₁ is approximately inversely proportional to the total number of samples processed by the counter evaluation.

Similar to H₁, H₂can also be obtained with the cumulative histogram counts. For the boundary input with MODE switching, the distance H₂ of the corrected code D^c_zis esti-mated by the statistics based estimation technique. Figure 4.13 shows the post-processor which was proposed by [70]. The Z-ADC output D_z^c is corrected by the following equa-tion,

D^c_z= Dz+ e(Dz, p₂) (4.15) where the error term e(Dz, p₂) represents the distorted amount, which is generated by the look-up table. The distances H₁ and H₂ are estimated by the corrected data D_z^c. If the distance H₁is different from H2, the nonlinearity caused error is still not yet compensated with correct coefficient p2. With the LMS algorithm, the coefficient p2 can be estimated asymptotically to achieve the equality: H₁= H2. To correct the gain error, the coefficient p₁ is also estimated by the LMS algorithm to achieve the equality: H₂ = hideal [65]. If both equalities are achieved, the distances H₁ and H₂ are half a transition height, which is the digital representation of Vr/2.

The redundant residue calibration technique provides a possible implementation using a simple residue amplifier, such as the open-loop amplifier [70], to adapt for scaled CMOS technologies. However, there are two constraints necessary to be concerned. One is the assumption of a busy input. The calibration algorithm fails if the input is not sufficiently

”busy” around the input voltages at which the distance estimates are taken. If cumulative histogram of the corrected output D^c_z is ”flat” around the estimated input voltages, the

V1 V2 Dz

Figure 4.13: Digital post-processor for the redundant residue calibration.

neighborhood codes will be extended widely to result in the wrong distances. The other is the calibration time. The trade-off between the accuracy and tracking time constants in the LMS loops. Bounds on the tolerable variance in the correction parameters necessitate small loop coefficients µ1 and µ₂, which in turn limits the achievable tracking speed. A minor issue is that the calibration technique needs an extra one-bit resolution for the sub-ADC. The extra resolution doubles number of comparators used in the sub-sub-ADC. For pipelined architecture, it is not an issue since the resolution of the sub-ADC is low. But for two-step architecture, the extra resolution for the sub-ADC causes additional power dissipation.