Conclusions and Suggestions for Future Research
8.2 Suggestions for Future Research
For the ULSI process, polysilicon is not only used in the gate electrode but also the interconnector which need to deposite silicide on it. The stacked polysilicon process can improve the surface roughness of polysilicon film, it should also can improve the adhesion between polysilicon and silicide of a interconnector. In addition, the stacked polysilicon film should be a good barrier to improve the boron penetration issue of gate oxide for PMOS device.
For the oxide-mediated silicidation method, it is still absent to the electrical data.
Hence, to form a simple MOSFET device by this method for the source/drain contact resistance and leakage current test then compare to conventional method is necessary.
In addition, the diffusion coefficient of Co in SiOx also is a direction for future research.
For pyramid-like nanostructure of Co, the application of field-emission flat panel displays and nanotube may be a continuous study direction.
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Table
Table 6-1: Free enthalpies of oxide formation at 1030 K in kJ/mol O2.
TiO2 SiO2 CoO
-1069 -1020 -714
Figures
Fig. 1-1: A simple schematic representation of a MOSFET device.
Fig. 2-1 AFM contact mode images and corresponding line scans of doped a-Si films eposited at (a) 540 and (b) 560 °C; of (c) doped poly-Si films deposited at 630 °C d
and (d) stacked poly/poly-Si/a-Si films. X-ray diffraction results for the stacked poly/poly-Si/a-Si films are presented in (e).
Fig. 2-2 TEM cross-section micrographs of (a) doped poly-Si and (b) doped stacked poly-Si (c) the magnified image of (a) around the grain boundary region. A schematic representation of the interface is detailed in (d).
-4 -3 -2 -1 0 1 2 3
62 64 66 68 70 72 74
Breakdown Voltage (V) Weibull cumulative distribution function ln[-ln(1-F)](Arb. Units)
Polysilicon, 630C
Dual Polysilicon, 630C + 560C Doped poly-Si films Doped stacked poly-Si films
Fig. 2-3: Weibull plots of electrical characteristics of doped stacked poly-Si film versus conventional poly-Si film.
Fig. 3-1: A bright-field TEM cross sectional image of the as-deposited sample.
Fig. 3-2: TEM Bright-field plan-view images and diffraction patterns of the samples upon annealing with the TiN capped layer, unreacted cobalt and SiOx removed, where the annealing conditions are (a) 600 °C 90 sec (b) firstly 460 °C 120 sec and then 600
°C 120 sec.
0
Fig. 3-3: Grain size distribution between one-step annealing (600 °C 90 sec) and two-step annealing (firstly 460 °C 120 sec and then 600 °C 120 sec).
0.002 0.007 0.012 0.017
900 950 1000 1050 1100 1150 1200 Wavenumber, cm -¹
Absorbance 460 °C annealing
600 °C annealing
Fig. 3-4: FTIR spectra of the SiOx layer after 460 and 600 °C annealing for 5 min.
Fig. 3-5: (a) TEM Bright-field plain-view images with diffraction pattern and (b) the grain size distribution of the sample upon annealing with TiN capped layer, unreacted cobalt and SiOx removed where the annealing conditions are firstly 460 °C 60 sec and then 600 °C 60 sec.
Fig. 4-1: (a) A cross-sectional TEM image of the sample without Si implantation annealed at 600 °C for 90 sec, with ESI elemental maps for (b) Co and (c) Si.
Fig. 4-2: A bright-field plan-view TEM image and diffraction pattern of the reactive silicide of the sample without Si implantation upon annealing at 600 °C for 90 sec.
Fig. 4-3: A cross-sectional TEM image of the sample without Si implantation for the annealing condition of 600 °C for 90 sec.
SiOx Si
2 nm CoSi2
Fig. 4-4: A bright-field cross-sectional TEM image of the sample without Si implantation for the annealing condition of 600 °C for 60 sec.
Fig. 4-5: A bright-field plan-view TEM image of the reactive silicide of the sample without Si implantation upon annealing at 600 °C for 60 sec.
Fig. 4-6: A bright-field cross-sectional TEM image of the sample without Si implantation for the annealing condition of 460 °C for 120 sec.
24800
Fig. 4-7: (a) XPS results from two samples with and without Si implantation in the Si substrate with unreacted TiN, Co and SiOx removed, where the annealing condition was 460 °C for 60 sec followed by 600 °C for 60 sec annealing. The deconvolution of the main peak in (a) is shown in (b) for the sample with Si implantation and (c) for the sample without Si implantation.
Fig. 5-1: (a) A TEM bright-field plan-view image with the corresponding diffraction pattern and (b) nucleus size distribution of the sample upon annealing at 600 °C for 120 sec with the TiN capped layer, unreacted cobalt,Ti and SiOx removed.
Fig. 5-2: (a) and (b) TEM bright-field cross-sectional images from two different areas of the sample upon 600 °C 120 sec annealing.
Fig. 5-3: TEM bright-field plain-view images of the samples upon annealing with the TiN capped layer, unreacted cobalt,Ti and SiOx removed, where the annealing condition are (a) 600 °C 240 sec (b) firstly 460 °C 240 sec and then 600 °C 240 sec;
(c) nucleus size distribution for one-step annealing (600 °C 240 sec) and two-step annealing (firstly 460 °C 240 sec and then 600 °C 240 sec)
Fig. 5-4: FTIR spectra of the as-deposited SiOx layer and that upon 460 °C annealing for 4 min.
Fig. 5-5: (a) A TEM bright-field plan-view image and (b) Nucleus size distribution of the sample upon annealing at 460 °C for 120 sec followed by 600 °C 240 sec with TiN capped layer, unreacted cobalt and SiOx removed.
Fig. 6-1: A bright-field TEM cross sectional image of the as-deposited Ti/Co/SiOx
sample.
Fig. 6-2: (a) A bright-field TEM cross sectional image of the Ti/Co/SiOx sample after annealing at 460 °C for 120 sec. (b) The magnified high resolution TEM image of (a).
Fig. 6-3: A bright-field TEM cross sectional image of the Ti/Co/SiOx sample after annealing at 460 °C for 300 sec.
Fig. 6-4: (a) A bright-field TEM cross sectional image of the TiN/Co/Ti/Co/SiOx/Si multilayered sample after 600 °C 240 sec annealing. (b) A bright-field TEM
plain-view image and diffraction pattern of the reactive silicide of the sample in (a) with all the other layers removed. (c) AES depth profiles of the sample in (a).
Fig. 6-5: A bright-field TEM cross sectional image of the Ti/Co/SiOx sample after annealing at 460 °C for 300 sec followed by 600 °C 300 sec.
Fig. 7-1: SEM plan-view images of Co thin films as a function of substrate bias for (a) –30 V (b) – 40 V (c) – 50 V (d) – 60 V.
Fig. 7-2: SEM plan-view images of Co thin films as a function of applied power for (a) 40 W (b) 50 W (c) 60 W (d) 70 W.
Fig. 7-3: SEM cross-sectional images of Co thin films as a function of applied power for (a) 40 W (b) 50 W (c) 60 W (d) 70 W.
Fig. 7-4: TEM cross-sectional image and diffraction pattern of the pyramid-like nanostructures.
Fig. 7-5: TEM bright-field image and diffraction patterns of Co thin films deposited at (a) dts = 6 cm, for ε-Co (hcp), (b) dts = 10 cm, for α-Co (fcc).
Fig. 7-6: SEM plan-view images showing faceted planes of the pyramid-like nanostructures on Co thin films for (a) type I and (b) type II; (c) Schematic diagram of two types of nanostructures with detailed indices assigned for the faceted planes and edge directions.
0 0.5 1
(10-10) (0002) (10-11) (11-20)
- 25 V - 50 V - 75 V - 100 V - 125 V
Intensity ratio
Main diffraction plane
Fig. 7-7: XRD diffraction intensity ratio for four main different planes as a function of substrate bias for a fixed applied power of 50 W.
Fig. 7-8: SEM plan-view images of Co thin films as a function of thickness for (a) 1260 nm (b) 1080 nm (c) 900 nm (d) 720 nm.
Fig. 7-9: SEM plan-view images of Co thin films deposited as a function of applied power for (a) 60 W (b) 70 W (c) 80 W (d) 90 W at the deposition distance of 10 cm.
Fig. 7-10: SEM plan-view images of Co thin films deposited on Si (111) substrates, as a function of applied power for (a) 75 W (b) 125 W.