Chapter 4 Switching Mechanism of 1R and 1T1R Resistive Memory
4.3 Resistance Switching Mechanism of RRAM
4.3.3 Summary
The “forming” is to produce a channel through the switching layer by oxygen vacancy movement and companion with the SBD in the dielectric. We believe that the conducting path which consists of oxygen deficient TiOx is nucleated through the resistance switching layer, and it explains when the thickness of HfO2 is decreased to 3nm, the predominant soft breakdown procedure (forming) is not necessary.
When the percolation of oxygen vacancies goes deeply into the HfO2 layer, it goes to a low resistance state of RRAM, and then the metallic density of states are empty, companion with the increasing current. This phenomenon could be confirmed with SCLC theory by fitting the I-V data measured at the low resistance state. On the other hand, when we add a negative polarity voltage on the top electrode, the oxygen vacancies leave from the deep of HfOx, then the metallic density of states are filled with these oxygen states, followed by the decreasing current, and the channel between the bottom electrode and the switching layer become incomplete. Therefore, the resistance state of RRAM goes to high resistance state.
The multi-levels which were achieved by pulse operation may be the result of the many intermediate resistance states caused by the tiny multi filament between the resistive switching layer.
Depending on the movement of oxygen vacancies, the conductive path is either formed or disappeared.
This is the suggested resistive switching mechanism for the binary metal oxide based resistive random access memory.
In high resistance state, lots of oxygen vacancies concentrate between the interface of Ti buffer layer and HfO2 switching layer. It is well known that defects of transition metal oxide thin films generate impurity states in the band gap. Therefore, ample trap sites within the interface result to RTN in high instead of low resistance state.
When reversing the operation mode, oxygen vacancy instead of digging into HfO2 switching layer would move into TiOx high-k layer. It results to conductive path from soft breakdown. It could explain the larger forming voltage and a worse resistance switching performance when reversing the operation mode.
Fig. 4.1 Schema illustrating the three different occurrences of the breakdown (HBD, SBD, PBD).
0 100 200 300 400 500 10
-310
-210
-1Current , I ( μΑ )
Stress time, t (second)
Physical thickness = 2 nm V
stress= 2.4 V
High-K MOSC
Fig. 4.2 Current-Voltage characteristic under constant voltage source stress of the high- κMOSC. The physical thickness of the dielectric layer is 2 nm. And, we can
see a clear soft breakdown phenomenon.
0 2 4 6 8 10 -20.0
0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0
Cur rent, I ( μΑ )
Voltage, V (V) MOSC
Forming
Fig. 4.3 The current-voltage characteristic of high-κ MOSC after the predominant step-forming.
The forming voltage is about 9.2V.
0.0 0.5 1.0 1.5 2.0 0.0
0.1 0.2 0.3 0.4
Current , I ( nA )
Voltage, V (V) MOSC
Fig. 4.4 The current-voltage curve of high-κ MOSC under resistive switching test. There is no hysteresis phenomenon when we sweep the voltage from 0V to 2V, and then back to 0V.
0 100 200 300 400 500
Fig. 4.5 After constant voltage stress 2.4V for 500 seconds, the soft breakdown phenomenon of resistive switching memory device is observed. The physical thickness of the HfO2 is 5 nm. (a) Linear scale (b) Log scale.
0 500 1000 1500
Fig. 4.6 Current-Voltage characteristic of RRAM by constant voltage stress 2.4V for 1500 seconds. The physical thickness of the dielectric layer is 5 nm. And the forming-like phenomenon is found.
-1.5 -1.0 -0.5 0.0 0.0
0.5 1.0 1.5 2.0 2.5 3.0
Current, I
(mA
)Voltage, V (V)
Fig. 4.7 The current-voltage curve of RRAM under resistive switching test. There is no hysteresis phenomenon when we sweep the voltage from 0V to -1.6V, and then back to 0V.
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -20
0 20 40 60 80 100 120 140 160
C u rrent, I
(μΑ
)Voltage, V (V)
Fig. 4.8 The effect of resistive switching characteristic by reverse operation. The forming is about 3.2V, when we exchange the electrodes.
-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5
Fig. 4.9 The scheme of multi-read operation. (a) resistance-voltage (b) current-voltage.
0 200 400 600 800 1000 0.0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Resist an ce, R
(ΜΩ
)Stress Time, t (second)
Vstress = 1 V
-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5
Fig. 4.11 The multi read characteristics when the resistance is 800KΩ at +0.1V and -0.1V. (a) resistance- voltage curve. (b) current-voltage curve
-1.0 -0.5 0.0 0.5 1.0
Fig. 4.12 The multi read characteristics when the resistance is 500KΩ at +0.1V and -0.1V. (a) resistance- voltage curve. (b) current-voltage curve
-1.0 -0.5 0.0 0.5 1.0
Fig. 4.13 The multi read characteristics when the resistance is 300KΩ at +0.1V and -0.1V. (a) resistance- voltage curve. (b) current-voltage curve
-1.0 -0.5 0.0 0.5 1.0
Fig. 4.14 The multi read characteristics when the resistance is 6KΩ at +0.1V and -0.1V. (a) resistance- voltage curve. (b) current-voltage curve
1 2 3 4 5 6 7
Fig. 4.15 RTN current waveform of high resistance state transition metal oxide thin film based resistive switching memory. The fluctuation amplitude increases slightly as the voltage increase from 0.5V to 0.8V. If the voltage is high than 0.8V or lower than 0.5V, there is no RTN signal.
0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.01
0.014 0.015 0.024 0.0243 0.025 0.027
Percentage ( %)
Voltage, V (V)
Fig. 4.16 The percentage of RTN signal fluctuation amplitude. As the voltage increase from 0.5V to 0.8V, the fluctuation amplitude increase too.
Fig. 4.17 The band diagram of an electrode and transition metal oxide in LRS. The metallic state is located above the Fermi level.
Fig. 4.18 The band diagram of an electrode and transition metal oxide in HRS. The metallic state is located below the Fermi level.
Chapter 5 Conclusion
In this thesis, we investigate the basic operation of RRAM and some important reliability issues.
At first, we study the effect of electrode area on resistive switching properties, multi-level operation, data retention time, program/erase cycling endurance, read disturb immunity and temperature effect on RRAM. Then we discuss the resistive switching mechanism through the operation procedure.
In the “forming” step, it not only causes soft breakdown of the dielectric but also oxygen vacancy in the dielectric. From RTN operation, we suggest that the percolation of oxygen vacancy is the main mechanism for resistive switching. By the reverse operation (changing the top electrode with the bottom electrode), we confirm our proposed mechanism for RRAM. The resistive switching mechanism can be described in terms of SCLC in LRS, and percolation of oxygen vacancy in HRS.
The resistive switching behavior takes place near the interface between TiOx and HfOx rather than the entire bulk region of HfOx .
In the “Multi read” step, we find that the transition metal oxide thin film based resistive switching memory device possesses the potential of being a non-linear resistance and the relationship with RTN measurement. The non-linear characteristic is the fundamental principle for the memristor-the suggested fourth fundamental circuit element.
Although it seems reasonable from our suggestion, but there are still some questions needed to be solved. Further studies are necessary to reveal the bipolar high speed switching mechanism. The transistor in 1T1R architecture is used as the ideal current limiter; however, this transistor limits the scaling potential of RRAM, and this is another problem needed to be solved.
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