Temperature measurement by infrared microscopy

An Infrared microscope(Quantum Focus Instrument) as shown in Figure 12(a) was

employed to measure the temperature in the Al trace during current stressing. The temperature distribution inside the bumps when powered by electric current was detected by a thermal infrared microscope, which has the resolution of 0.1 °C in temperature sensitivity and 2.8 μm in spatial resolution. The current stressing of the specimen was performed on a hot plate in ambient air, which has heating capacity up to 120℃. Prior to the current stressing, the emissivity of the specimen was calibrated at 100 °C. After the calibration, the bumps were

powered by a desired current stressing condition. Then, temperature measurement was performed to record the temperature distribution after the temperature reached a steady state.

Figure 12(b) shows the schematic diagram for experimental setup, in which the Si side faced the infrared microscope.Since the 250 μm Si is transparent to infrared,the corresponding penetration depth is larger than 2m and much larger than the thickness of the silicon wafer.

Therefore, the absorption can be ignored.[28] The temperature distribution in the Al traces and in the Al pad directly above the solder bumps during current stressing can be measured.

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1. Cooling chamber 2. CCD Sensor 3. Cantilever -X 4. Cantilever -Y 5. Cantilever -Z 6. Camera 7. IR detector

8. Heating apparatus 9. Heater

10. Heater stage 11. Stage Figure 12(a) Infrared microscope

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Figure 12(b) Infrared microscope schematic diagram for experimental setup, in which the Si side faced the infrared microscope.

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2.4 Microstructure examination

A JEOL 6500 scanning electron microscope (SEM) and energy dispersive spectroscopy (EDS) were used to observe the microstructure and composition of the solder joints in the flip chip package. The cross-sectional samples were prepared by polishing laterally until the contact opening was visible. Figure 13 shows the cross-sectional SEM image for the fabricated samples. Due to the large opening in the substrate side, the bump height was as small as 25 μm. Both the electroplated and elctroless Ni layers reacted with the solder to form Ni3Sn4 intermetallic compounds (IMCs), and the average thickness of the IMCs was 1 μm.

SEM was also employed to examine the voids in the cross-section of the solder bumps. Then, an etching solution consisting of glycerin, nitric acid and acetic acid at ratio of 1 : 1 : 1, was used to selectively etch the tin. Thus, the morphology of intermetallic compound (IMC) and the whole contact opening could be observed clearly after the selective etching.

Figure 13. The cross-sectional SEM image for the fabricated samples.

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2.5 X-ray microscope

In this study, void formation during electromigration was monitored by an x-ray

microscope. A DAGE XL-6500 x-ray microscope with the Si side facing the x-ray detector, which has 2 μm in spatial resolution. The corresponding current density was 6.5×10³ A/cm². The operation voltage was set at 95 kV in this study. Since voids form in the bump with electron flow from the chip side to the substrate side, only the bumps with this stressing direction were examined. The solder joints were stressed by 0.8 A at 150°C for a desired time.

Figure 14 shows the cross-sectional schematic for the solder joint used in this study. The dimension of the Al trace was 1.5 μm thick and 100 μm wide, while the dimension of the Cu lines on the substrate was 25 μm thick and 100 μm wide. The UBM consists of 0.1-μm Ti, 5-μm Cu, and 3-μm Ni layers. The diameter of the UBM and the passivation openings was 120 μm and 85 μm, respectively. Electroplated SnPb solder bumps were mounted on a FR4 substrate to form flip-chip joints. Non-solder-mask-defined process was used in this structure.

The dimension of the Cu pad opening was 300 μm in diameter. Owing to the large opening in the substrate side, the bump height was as small as 25 μm. With the low bump height, the voids in the solder bump would be much clearly seen in an x-ray microscope.

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Figure 14. Cross-sectional schematic diagram of the samples used in this study.

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2.6 3-D thermo-electrical simulation by finite element analysis

On the basis of the experimental results, a three-dimensional (3-D) simulation was carried out by finite element analysis. The schematic diagram for the package is shown in Figure 12(b). Two solder bumps had electrical current applied through the circuit shown in the Figure.

The electrical and thermal resistivities for the materials used in this modeling are listed in Table I. The effect of temperature coefficient of resistiviy (TCR) was considered, and the TCR values for the metals are also listed in Table I. In addition, 3-D coupled thermal-electric simulation was conducted to predict the steady state temperature distribution using the ANSYS software package developed by ANSYS, Inc. The model used in this study was a SOLID69 8-node hexahedral coupled field element. All the boundary conditions followed the experiment setup, shown in Figure 12(b). The whole flip chip package with meshization is illustrated in Figure 15. The area of the Si chip was 10.0 mm × 6.0 mm and the thickness was 290 μm, whereas the BT (Bismaleimide Triazine) substrate was 4.75 mm wide, 7 mm long, and 350 μm thick.

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Table I. Thermal conductivities, electrical resistivities, and temperature coefficients of resistivity for the materials used in the simulation model.

Material Thermal conductivity (W/m-°C)

UBM(Ti+Cr/Cu+Cu) 147.61 5.83 4.9

SnAg3.5 33.00 12.3 4.6

Note : The materials not given in electric resistivity are assumed to be electrical insulators.

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Figure 15. Flip-chip package with meshization.

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2.7 Bump resistance measured by Kelvin bump probes

In this study, we employed Kelvin bump probes to monitor the bump resistance change during electromigration. A bump resistance change as small as 0.1 mΩ could be detected. The

corresponding void formation causing the increase in bump resistance can be examined at different stages. We have designed and fabricated Kelvin probes for flip-chip eutectic SnPb solder joints. Figure 16(a) shows the plan-view schematic for the structure. The test structure consisted of four bumps, in which an Al trace connected all of them together. The four bumps were labeled as Bump 1 though Bump 4, respectively. The dimension of the Al trace was 1.5 μm thick and 100 μm wide. The pitch for the solder joints was 1 mm. Six Cu lines on the FR4

substrate connected to the four bumps, and they were labeled as node 1 through 6, as shown in the Figure. The dimension of the Cu lines was 30 μm thick and 100 μm wide. Through these six Cu lines, various experimental setups can be performed to measure the bump resistance for Bump 2 or Bump 3, or the resistance for the middle segment of the Al trace. In this study, the current was applied through nodes 3 and 4, i.e. electrons flowing from the chip side to the substrate for Bump 2, and the opposite direction for Bump 3, as illustrated in Figure 16(b). The voltage change in the Bump 2 was monitored through nodes 1 and 2, whereas the voltage change in the Bump 3 was supervised though nodes 5 and 6. Therefore,

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the change in bump resistance during electromigration for the two bumps with opposite direction of electron flow can be monitored simultaneously. In general, voids initiate in the chip side of the Bump 2 due to serious current crowding effect. Hence, we will present the results for Bump 2 only in this study. The power supply used in this measurement was Keitheley 2400, which has a 0.1 μV resolution in voltage measurement. The error in measuring resistance in this study was estimated to be 1 to 10 μΩ.

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Figure 16 (a) Cross-sectional schematic of the layout design. The Al trace connected all the four solder bumps together. (b) Schematic structure for the solder bump used in this study.

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Chapter III Results and Discussion

3.1 Temperature measurement of Al-trace in flip chip solder joints under

current stressing (I)

In this study, we used thermal infrared (IR) microscopy to measure the temperature

distribution in the Al trace at various stressing conditions. Temperature increase in the Al trace due to current stressing was measured from the whole bumps. Before the current stressing, calibration was performed on a hot plate maintained at 70 °C. The temperature distribution

without current stressing is shown in Figure 17(a). The circuit of the Al trace can barely be seen since the Si substrate is transparent to infrared radiation. The temperature was calibrated to 70 °C. Furthermore, the circuit can be clearly observed in the radiant mode, as shown in Figure 17(b). The Al trace, UBM and passivation openings are labeled in the Figure. Figure 17 (c) shows the temperature increase for the Al trace in the package when stressed by 0.59 A at the ambient temperature of 70 °C. The current path is indicated by two of the arrows in the

Figure. There were two solder bumps located directly below the two circular Al pads/UBMs, as labeled in the Figure. It is noteworthy that the Al trace has much higher temperature than the circular Al pads, which were directly connected to the UBM and the solder bumps. The maximum temperature was as high as 134 °C, which occurred approximately at the middle of the Al trace, whereas the temperature was only about 105 °C for the Al pads above the solder

bumps. It is expected that the solder near the circular Al pad had the same temperature as the

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circular Al pad, since these metals are good heat conductors and the total thickness of the Al and the UBM layer was less than 3 μm, as shown in Figure 17(a). The solder served as a heat

sink, and thus the temperature in the circular Al pad was much lower than that in the isolated Al trace. Figure 17(d) shows the enlarged image of one of the bumps in Figure 17(c). The inner circle represents the passivation opening, whereas the outer circle corresponds to the UBM opening of the solder joint.

Furthermore, whether a hot spot exists inside the solder is of interest for electromigration study. The solder directly below the Al trace near the entrance point may have higher temperature than the rest of the solder. Figure 17(e) illustrates the temperature profile along the 75 μm long dashed line in Figure 17(d). The points A and B in Fig. 17(e) represent the edges of the UBM and the passivation openings, respectively. The temperatures at points A and B were approximately 118.2 °C and 109.7 °C, respectively, which are much higher than the average temperature of 105.2 °C in the Al pad. The average temperature was calculated by averaging the temperatures in a 10 μm × 10 μm square in the center of the passivation

opening. Since there was solder below this segment of the Al trace, the temperature in this solder may be higher than the rest of the solder. In addition, there is a thermal gradient since the temperature at the Al pad near the entrance of the Al trace was higher than that at the opposite end. The gradient in this junction was as high as 1700 °C/cm.

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Figure 17(a) Temperature distribution in the package before current stressing, showing a uniform temperature in the package.

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Figure 17(b) Radiance image for the same location in (a). Circuit of the Al trace can be clearly observed.

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Figure 17(c) Temperature distribution in the Al trace measured by the IR microscope when powered by 0.59 A

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Figure 17(d) Enlarged image for the temperature distribution in one of the solder joints in (a).

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Figure 17(e) Temperature profile along the white line in 16(d).

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3.2 Distribution of current density and temperature in flip chip solder joints

Figure 18(a) shows the simulated temperature distribution in the Al trace and in the solder joints when stressed by 0.59 A. The simulation results fit the experimental results very well.

The temperature distribution inside the solder in one of the cross sections near the entrance of the Al trace is shown in Figure 18(b). As for the temperature distribution in the solder bump, Figure 18(a) shows the distribution in the solder bump only, in which the Al pad, UBM, IMC layer, and the BT substrate were excluded. It is clear that there is a hot spot near the entrance point of the Al trace, as indicated by the arrow in the Figure. Figure 18(b) shows the

distribution in the center cross-section of the bump, in which the temperature distribution across the solder bump can be clearly seen. The average value was obtained by averaging the values in the area of 70×70 μm², as labeled in the Figure. The occurrence of the hot spot may be mainly attributed to the local Joule heating effect, since there is serious current crowding effect in the hot-spot region.[16] This gradient play important role in the thermomigration in the solder joints.[18, 24]

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Figure 18 (a) The temperature distribution of a bump. A hot spot exist at the entrance points of the Al trace into the solder at the passivation opening.

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Figure 18 (b) The temperature distribution in the solder bump. the average temperature in the solder bump was obtained by averaging the temperatures in a square of 70 μm × 70 μm in the center of the solder.

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Figure 19(a) shows the simulated temperature distribution in the Al trace and in the solder joints when stressed by 0.59 A. The simulation results fit the experimental results very well.

The temperature distribution inside the solder in one of the cross sections near the entrance of the Al trace is shown in Fig. 19(b). A hot spot existed in the solder adjacent to the entrance points of the Al trace into the solder at the passivation opening. The temperature at the spot was 95.6 °C, which was 4.5 °C higher than the average value in the solder. The temperature on the chip side was higher than that on the substrate side. In addition, the vertical thermal gradient was measured to be 276 °C/cm, whereas the horizontal thermal gradient was

calculated to be 634 °C/cm at this stressing condition. The thermal gradient is denoted in this letter as the subtraction of the temperature in the hot spot by the temperature at the opposite end of the solder, then divided by the distance between the two locations. Under this stressing condition, the current density in the Al trace was 1.1 x 10⁶ A/cm². The average current density in the joint was 5.2 x 10³ A/cm² based on the UBM opening. In the hot spot, the maximum current density was 1.7 x 10⁵ A/cm2, whereas the average current density involved in a volume of 5 μm x 5 μm x 5 μm was estimated to be 1.4 x 10⁵ A/cm².

The Joule heating effect was also inspected at various applied currents. Figure 20(a) depicts the temperature in the hot spot and the average temperature in the solder as a function of applied current up to 0.8 A. Both of them increased rapidly with the increase of applied current. The difference in these two temperatures increases as the applied current increases,

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and it may be as high as 9.4 °C when stressed by 0.8 A. Figure 20(b) shows the vertical and horizontal thermal gradients as functions of the applied current. They also increase with the increase in stressing current. Moreover, the horizontal thermal gradient rose more quickly than the vertical one, reaching 1320 °C/cm under the stressing of 0.8 A.

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Figure 19 (a) Simulated temperature distribution in the stressing circuit when powered by 0.59 A. The distribution matched the experimental data in Figure 18(a).

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Figure 19 (b) Temperature distribution inside the solder bump. A hot spot was found in the entrance point of the Al traces.

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Figure 20 (a) Depicts the temperature in the hot spot and the average temperature in the solder as a function of applied current up to 0.8 A.

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Figure 20 (b) Vertical and horizontal thermal gradients as functions of the applied current.

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3.2.1 Joule heating effect in flip chip solder joints 3.2.1.1 Hot spot in solder joint during electromigration

The existence of the hot spot may be attributed to two reasons. First, it may be due to the local Joule heating inside the solder itself. The heating power can be expressed as (2.1).

In our simulation model, the total resistance of the Al trace was about 900 mΩ, and the resistance of the solder bump was about 10 mΩ. Therefore, the Al trace generated most of the heat. Due to the serious current crowding in the solder joint, the current density in the vicinity of the Al entrance into the solder joint is typically one to two orders higher than the average value,[9, 18, 19] causing local Joule heating there. Second, the Al trace has higher Joule heating effect, and the hot spot was close to the Al trace. At lower stressing current, the hot spot is not obvious because there is less heat generation. However, it became more

pronounced as the applied current increased due to large heat generation and difficulty in heat dissipation. The solder in the hot spot was the most vulnerable part in the solder joint during electromigration testing, since it may experience much larger electron wind force due to the higher current density and the higher diffusivity owing to the higher temperature as well as it’s low melting point. Hence, voids start to form at this spot.

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3.3 Temperature measurement of Al-trace with various dimensions in

flip chip solder joints under current stressing (II)

Electromigration test was performed for the above solder joints to examine the effect of Joule heating on electromigration failure time. For the solder joints with the 40-μm-wide Al trace, they failed instantly at and above 0.6 A at 100 °C. The SnPb solder may be melted at these stressing conditions. Nevertheless, the failure time was 18 hours when applied by 0.6 A for the solder joints with the 100-μm-wide Al trace in Figure 11(b). For the solder joints with the 100-μm-wide Al trace in Figure 11(d), the electromigration failure time was 35 hours when a current of 1.0 A was applied through bumps B1 and B4 at 100 °C. The corresponding current density was 7.1 × 10³ A/cm² on the basis of the UBM opening. However, when the same amount of current was applied through bumps B1 and B3, the failure time was 1700 hours. When the current was applied through Bump B1 and B2, the joints did not fail after 3000 hours. Therefore, the dimension of the Al-trace has huge effect on the electromigration failure time. Table II summarizes the above results.

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Table II. Failure time of the solder joints with various lengths of Al traces under current stressing.

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Since the current-density distribution was the same for the three stressing conditions for solder joints with 100-μm-wide Al trace, the difference in failure time was mainly attributed

to the difference in Joule heating effect. To examine the Joule heating effect in the solder joints, the temperature distribution in the Al trace and in the Al pad was measured using the IR microscope. Figure 21(a) shows the IR radiant image of the bump B1 with a 100-μm wide Al trace shown in Fig. 11(d). The Al trace and Al pad can be clearly observed in the Figure.

Figure 21(b) shows the temperature distribution before the current stressing when the package was placed on a hotplate that was maintained at 100 in air ambient. The temperature ℃ distribution was quite uniform. When the solder joint was stressed by the current, the temperature in the Al trace and in the Al pad can be measured based on the calibration in Figure 21(b). Figure 21(c) to 21(f) show that the temperature increases in the Al pad for the bump B1 in Fig. 11(d) when stressed by 0.4, 0.6, 0.8 and 1.0 A through bumps B1 and B4. In this paper, the average temperature in the Al pad was obtained by averaging the temperatures in a square of 40 μm × 40 μm in the center of the pad, as illustrated by the dotted lines in Fig.

21(b). The average temperature increase due to the current stressing was as high as 65.1 . ℃ Joule heating effect in the solder joints with different lengths of Al traces was investigated using the test structure in Figure 11(d). The current may be applied through bumps B1 and B2, or through bumps B1 and B3, or through bumps B1 and B4. Thus, current flows through Al traces of T1, (T1+T2), and (T1+T2+T3), respectively, for the above three

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current-stressing setups. The corresponding lengths of the Al traces are 850 μm, 1700 μm, and 2550μm, respectively. Figure 22 shows the temperatures in the Al pad of the bump B1 as a

function of applied currents up to 1.0 A for the three stressing setups. At a lower stressing currents below 0.2 A, there was no obvious difference in temperatures for the three stressing conditions. However, it became more pronounced as the applied current is increased. When

function of applied currents up to 1.0 A for the three stressing setups. At a lower stressing currents below 0.2 A, there was no obvious difference in temperatures for the three stressing conditions. However, it became more pronounced as the applied current is increased. When