Chapter 2 Principle of MIS Solar Cells 9
2.2 Transport Mechanism of MIS Junctions
In 1938, Walter H. Schottky suggested that a potential barrier could arise from a metal-semiconductor also diode known as Schottky diode. The current transportation for a Schottky diode is mainly due to majority carrier as opposed to minority carrier in p-n junction. The current density can be represented as
J = J e / − 1
where JS is the reverse saturation current density, q = 1.6 ×10-19 C is the fundamental unit of charge, n is the ideality factor, k = 1.38 ×10-23 J/K is the Boltzmann's constant, and T is the absolute temperature. The above equation is identical in the form to the equation of the p-n junction. However, the thermionic emission current is mainly due to majority carrier while p-n junction is due to minority carrier.
Therefore, a smaller turn-on voltage can be expected in Schottky diode. For solar cell application, low turn-on voltage and the interface states of a Schottky diode will
degrade cell performance, so a thin insulating layer is introduced into the interface.
In the following paragraphs, seven regions of the J-V characteristics of an MIS solar cell with p-type semiconductor in dark and under illumination will be explained with Jm (current density flows from metal to semiconductor by thermionic emission), Js
(current density flows from semiconductor to metal by thermionic emission) and Je
(photo electron tunneling current density with help of traps).
(a) Dark — forward bias (negative bias at metal)
When the MIS diode is under forward bias, band near the junction bend upward.
This band bending causes an accumulation of majority carriers (holes) near the oxide-semiconductor interface. For Schottky barrier diode, the thermionic emission current can easily pass through MS junction and result in high dark current. However, these carriers should pass the oxide with the assistance of traps existed in the oxide or tunneling for MIS junction with sufficient thin oxide. Therefore, exponential rising of the current with applied forward bias can be expected. As shown in Fig 2.3(a), the total current density
J = J − J ≅ J ∝ e /
Fig
Fig 2
Fig 2.5: (a) Band diagram and current flow of a MIS solar cell under reversed bias in dark (b) Charge distribution at inversion region
(d) Illuminated —large forward bias
When the MIS solar cell under illumination is forward biased, the Js and Jm flow as same as that in dark. Besides, photo-generated electrons will flow into semiconductor along with the direction of electric field. The electrons in metal can also pass through the oxide under the assistance of the traps in the oxide. This current component is denoted as Je as shown in Fig 2.6. Under such condition, the total current is increased by Je and then total current density
J = J − J + J ≅ J + J
F
Fi
Fig 2.8: Band diagram and current flow of a MIS solar cell which is zero biased under illumination
(g) Illuminated — reverse bias
When the MIS solar cell is under reverse bias, JS decrease due to the reduced thermionic emission probability. The total current
J = J − J − J = J − J
The current density Jm will reach saturation while if the intensity of the illumination increases, Je increases. The energy band diagram under this condition is shown in Fig 2.9.
Fi
respe
Chapter 3 Properties of p-type MIS solar cells
In this chapter, we focus on the research on MIS solar cells with p-Si substrate.
Different from conventional MIS solar cells, we deposit thin tunneling oxide with magnetic sputter instead of thermal oxide. The advantages of sputter oxide are the film thickness and large tuning range of film quality. However, ion bombard effect will produce large amount of defect at the interface and in the oxide film, so some post annealing have to be done to passivate defects after oxide deposition
3.1 Photovoltaic Properties with Annealing Process
As show in Fig 3.1 and Table 3.1, cell with poor photovoltaic characteristic is obtained without post-oxidation annealing. From the J-V curve under AM1.5g irradiation, a low Voc and Jsc indicated that there is probably a great quantity of recombination centers in the oxide film. According to the researches[14,15], high temperature post-oxidation annealing reduces the defect density in thin tunneling oxide and lowers leakage current in MIS diodes. In order to reduce the recombination centers in the tunneling oxide, a post-oxidation annealing is introduced in our fabrication process. In Fig3.1 and Table3.1, solar cells under illumination with annealing at 500℃
for 1hr in hydrogen atmosphere are shown. Because hydrogen can easily diffused into oxide film and can passivate Si dangling bonds by formation of Si-H bonds, samples
annealing at 500℃ in hydrogen atmosphere exhibit good photovoltaic properties with higher Voc, Jsc and FF (Table 3.1). From the capacitance-voltage (C-V) measurement shown in Fig 3.2, with no post annealing, C-V curve have abnormal rapid drop at accumulation region, corresponding to large leakage current due to defects in ultra-thin oxide film with sputter. However, after high temperature H-annealing, the C-V curve only have small drop at accumulation region, indicating the suppression of recombination in oxide film, and an evidence of defect passivation is attain as same as which in J-V curve.
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 -8
-4 0 4 8 12 16 20
Curren t Density (m A/cm2)
Voltage (V)
as-dep.
H-annealing
Al 15nm/20mT SiO2 160s/p-Si
Fig 3.1: Photovoltaic properties of cells with and without H-annealing
Post Annealing Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
as-dep. 207 0.96 28.8 0.06%
H2 500℃ 1hr 471 13.0 67.8 4.16%
Table 3.1: Photovoltaic properties of cells with and without H-annealing
-3 -2 -1 0 1 2 3
0.0 0.2 0.4 0.6 0.8 1.0
Al 15nm/20mT SiO2 160s/p-Si
C/Cmax
Voltage (V)
as-dep.
H-annealing
Fig 3.2: C-V measurement of cells with and without H-annealing
3.2 Photovoltaic Properties with Different Oxide Thickness
In order to increase the Voc, a thin tunneling insulating layer is a must for MIS solar cells. Once the insulator is too thick, the tunneling probability reduce significantly, and then photo carriers cannot be collected by electrodes. According to the simulation
thicker than 2nm and cells show no photovoltaic properties[16]. Therefore, the oxide thickness for the performance of MIS solar cell is critical. With the increasing oxide thickness, the voltage drop on insulator increases, and hence decrease the electric field at the surface of semiconductor. Moreover, a thicker oxide will also lower the tunneling probability of minority carriers, so the drop of current in the J-V curve starts from forward bias.
From Fig 3.3 and Table 3.2, we can also see the tendency of fill factor decreasing while thickness becomes thicker. The J-V curve of sample with sputtered 389s drop at small forward bias, confirmed with above discussion. Although Jsc with sample of sputtered oxide 389s is nearly no change due to slightly decreasing in electric field and tunneling probability at zero bias, low fill factor decreases cell efficiency dramatically and a further decrease with thicker oxide is expected.
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 -4
0 4 8 12 16
Cur rent Density (m A/cm
2)
Al 15nm/20mT SiO2/p-Si
Voltage (V)
160s 389s
Fig 3.3: Photovoltaic properties of cells with varying thickness
Sputter Time (s) Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
160 463 12.5 71.9 4.18%
389 422 12.1 26.2 1.34%
Table 3.2: Photovoltaic properties of cells with varying thickness
3.3 Photovoltaic Properties with Different Working Pressure
Since we use magnetic sputter to deposit the tunneling oxide on cells, several parameters can be tuned to change the film quality like gas flow rate, working pressure,
out how the film quality changed with different working pressure.
As shown in Fig 3.4 and Table 3.3, the best Voc reaches 475mV at the working pressure 20mT. As working pressure increases, the Voc decreases to 350mV at working pressure 40mT. From C-V measurement shown in Fig. 3.5, a curve shift toward zero with the increasing working pressure reveals the reduced barrier height at MIS junction.
Furthermore, the small rising at point A indicates defects which are induced by increasing ion bombards probability in oxide film. Therefore, smaller Voc are obtained because of lower barrier height and lager defect density with the increasing working pressure.
-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6
-10 -5 0 5 10 15
20
Al 10nm/ SiO2 /p-Si
Current Density (mA/cm2 )
Voltage (V)
20mT 30mT 40mT
Fig 3.4: Photovoltaic properties of cells with varying working pressure
Pressure (mTorr) Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
20 475 16.8 64.3 5.15%
30 386 16.3 68.3 4.31%
40 350 14.8 66.8 3.45%
Table 3.3: Photovoltaic properties of cells with varying working pressure
-3 -2 -1 0 1 2 3
0.0 0.2 0.4 0.6 0.8 1.0
Al 10nm/ SiO2 /p-Si
C/C
maxVoltage (V)
20mT 30mT 40mT
Fig 3.5: C-V measurement of cells with varying working pressure
3.4 Photovoltaic Properties with Different Metal Thickness
In our MIS solar cells, due to fabrication simplicity, metal electrodes are thermal A
collection efficiency, as shown in Fig 3.6 and Table 3.4 with no thin metal film. To overcome this problem, a thin metal film for carrier collection is introduced into our cells. Although a thick metal film has good carrier collection efficiency, the reflection is also increase with the increasing metal thickness. Hence, the tradeoff between transparent and carrier collection efficiency is important.
In our work, with decreasing metal film from 15nm to 10nm, an apparent enhancement of Jsc from 13 to 16 mA/cm2 is shown in Fig 3.5 and Table 3.4.
-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6
-8 -4 0 4 8 12 16
20
Al/20mT SiO2 160s/p-Si
Current Density (mA/cm2 )
Voltage (V)
Al 15nm Al 10nm No metal
Fig 3.6: Photovoltaic properties of cells with varying thickness of Al film
Metal Thickness (nm) Voc (mV) Jsc (mA/cm2) FF(%) Efficiency
No metal 411 0.44 64.8 0.12%
10 475 16.9 64.3 5.15%
15 463 12.5 71.9 4.18%
Table 3.4: Photovoltaic properties of cells with varying thickness of Al film
3.5 Summary
In this chapter, works on MIS solar cells with p-Si have been discussed at different cases. From the data shown above, post-oxidation annealing in hydrogen atmosphere is a must for cells with sputter oxide due to the high defect density in film. Although film quality can be modified by post annealing, the thickness and sputtering working pressure are also key factors in MIS solar cells, and the best case is sputtered 160s with RF power 50W and working pressure 20mTorr. Finally, we change the thin collecting metal thickness and analyze its properties; cells with aluminum thickness 10nm in our structure have highest efficiency. Although there is only a slightly enhancement in Voc
with decreasing metal thickness from 15nm to 10nm, higher efficiency because of higher Jsc do help the performance of MIS stacked solar cells.
solar
4.1 Photovoltaic Properties with Annealing Process
In p-type MIS solar cells, post-oxidation annealing is necessary to get good photovoltaic characteristics (Fig 3.1 and Table 3.1), so the same annealing process annealing at 500 for 1hr in hydrogen atmosphere is also done. Better photovo℃ ltaic characteristics as shown in Fig4.2 after H-annealing are obtained without doubt.
Different from p-type MIS solar cells, the cell with no treatment has a not bad fill factor 50.7%, still lower than that with H-annealing though. With C-V analysis (Fig.4.3), the curve drop of as-dep. sample at accumulation region is not as much as that of p-type sample, so n-type MIS solar cells without annealing have better photovoltaic properties.
After H-annealing process, though the curve still has a small drop at accumulation region, the right shifted curve indicates the rise of barrier height due to passivation by the formation of Si-H bonds, and then the Voc after H-annealing increases from 313mV to 422mV. However, this value is still lower than that of p-type cells because of the smaller barrier height mentioned in the beginning of chapter4.
-0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 -4
0 4 8 12
16
Au 20nm/20mT SiO2 389s/n-Si
Current Density (m A/cm
2)
Voltage (V)
as-dep.
H-annealing
Fig 4.2: Photovoltaic properties of cells with and without H-annealing
Post Annealing Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
as-dep. 313 13.4 50.7 2.13%
H2 500℃ 1hr 422 14.4 58.4 3.55%
Table 4.1: Photovoltaic properties of cells with and without H-annealing
-3 -2 -1 0 1 2 3 0.0
0.2 0.4 0.6 0.8 1.0
Au 20nm/20mT SiO2 389s/n-Si
C/ C
maxVoltage (V) As-dep.
H-annealing
Fig 4.3: C-V measurement of cells with and without H-annealing
4.2 Photovoltaic Properties with Different Oxide Thickness
As discussed in section 3.2, insulating thickness is critical for cell efficiency. We change the sputter time to control the same film thickness as what we do on p-type cells.
As shown in Fig4.4 and Table4.2, the tendency from 389s to 778s exhibit lowering tunneling probability and a large voltage drop on thick oxide. The increase in Voc from 160s to 389s can be explained by the increasing Schottky barrier height with the increasing oxide thickness[18-20] and better interface defect passivation.
The best tunneling oxide thickness of n-type MIS solar cells is sputtered 389s (Fig4.4 and Table4.2), thicker than that of p-type in our work. Try to explain this huge
difference with the transport mechanism, in p-type MIS solar cells under illumination, the majority carrier holes are easily blocked by thin oxide due to lower diffusion constant in Si and minority carrier electrons are tunneling through oxide film to produce light current. On the contrary, in n-type MIS solar cells, majority carriers are electrons which are more difficult to be blocked with higher diffusion constant. Therefore, a thicker oxide is needed in MIS solar cells on n-Si.
-0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6
-4 0 4 8 12
16
Au 20nm/20mT SiO2/n-Si
Current density (m A/cm
2)
VA (V)
160s 389s 583s 778s
Fig 4.4: Photovoltaic properties of cells with varying thickness
Sputter Time (s) Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
160 295 14.0 54.7 2.25%
389 366 13.4 56.4 2.76%
583 346 11.6 35.9 1.44%
778 320 11.1 22.3 0.80%
Table 4.2: Photovoltaic properties of cells with varying thickness
4.3 Photovoltaic Properties with Different Working Pressure
In Fig. 4.5 and Table 4.3, the tendency of Voc of n-type cells with increasing working pressure is the same as that of p-type. However, in Fig. 4.6, the C-V curves shift is not apparent between 30mT and 40mT, indicating almost the same barrier heights and Voc. However, cells with working pressure 20mT show no rising at point A and steep slope in transition from inversion to accumulation, demonstrating lower defect density in oxide film and interface. Therefore, the Voc of n-type cells with working pressure 20mT reach 422mV, which is the best value in our work, greatly larger than cells with 30mT and 40mT.
-0.1 0.0 0.1 0.2 0.3 0.4 0.5 -4
0 4 8 12 16
20
Au 20nm/SiO2/n-Si
Current Density (mA/cm2 )
Voltage (V)
20mT 30mT 40mT
Fig 4.5: Photovoltaic properties of cells with varying working pressure
Pressure (mTorr) Voc (mV) Jsc(mA/cm2) FF(%) Efficiency
20 422 14.4 58.4 3.55%
30 339 14.7 55.5 2.77%
40 313 14.2 59.9 2.66%
Table 4.3: Photovoltaic properties of cells with varying working pressure
-3 -2 -1 0 1 2 3 0.0
0.2 0.4 0.6 0.8 1.0
Au 20nm/SiO2/n-Si
C/C max
Voltage (V) 20mT
30mT 40mT
Fig 4.6: C-V measurement of cells with varying working pressure
4.4 Photovoltaic Properties with Different Metal Thickness
As discussed in section 3.4, the thickness of metal film is a tradeoff between collection efficiency and reflection. In n-type cells, we use gold as front electrode to form MIS junctions. Since the reflection of gold is different from aluminum, the optimum thickness is also different. As shown in Fig 4.7 and Table 4.4, Jsc reaches about 14.3mA/cm2 with 15nm gold film, and keeps no change while increasing to 20nm.
Therefore, an optimum thickness between 15nm and 20nm of gold film on n-type MIS solar cells can be expected. However, there is 40mV difference between 15nm and 20nm, which is not present in p-type solar cells (Fig 3.6 and Table 3.4). This phenomena
A
result from the nickel deposited on the gold film, which lowers the work function of gold while gold is thinner than 20nm. Since the barrier height is lowered by the lower work function, the Voc is reduced.
-0.1 0.0 0.1 0.2 0.3 0.4 0.5
-4 0 4 8 12 16
20
Au/20mT SiO2 389s/n-Si
Current Density (mA/cm2 )
Voltage (V)
20nm 15nm 10nm 5nm
Fig 4.7: Photovoltaic properties of cells with varying thickness of Au film
Metal Thickness (nm) Voc (mV) Jsc (mA/cm2) FF(%) Efficiency
5 196 0.91 36.6 0.07%
10 329 7.17 40.7 0.96%
15 381 14.3 54.0 2.95%
20 422 14.4 58.4 3.55%
4.5 Summary
In this chapter, n-type MIS solar cells are realized and analyzed with different parameters. The best tunneling oxide thickness is sputtered 389s with working pressure 20mTorr, thicker than that of p-type cells, and this phenomena can be explain with transport mechanism discussed in section 2.2.
As same as the tendency with the change of annealing process, oxide thickness, metal thickness and working pressure, we get the optimum fabrication parameters and achieve the Voc 422mV.
Chapter 5 Experiments of MIS Stacked Solar Cells
5.1 Tunneling Diode 5.1.1 General Description
Tunneling diode also referred as Esaki diode[21-23], is one of the most important issues affecting stacked solar cell performance. The problem of tunnel junction formation is related to the demand of obtaining uniformly highly doped layer without defects which result in carrier recombination and leakage current in depletion regions.
In a common tunneling diode, degenerate semiconductors[17,24] are used to increase tunneling probability through depletion region.
E − E = kT ln (Eq. 5.1) E − E = kT ln (Eq. 5.2)
Where Nc and Nv are referred to as effective density of states, n0 and p0 are doping density. From Eq. 5.1 and Eq. 5.2, degenerate semiconductor can obtain with n0 and p0
lager than Nc and Nv.
The current-voltage properties of a tunneling diode is shown in Fig 5.1, different from conventional p-n junction, the I-V curve is ohmic at small voltage while negative differential resistance (NDR) appears with increasing forward bias. The current-voltage characteristic of a tunneling diode can be explained using the band diagram and J-V characteristic shown schematically in Fig 5.1. When a reverse bias is applied, Fig 5.1(a),
current flows by electron tunneling from occupied states on the p-side valence band into unoccupied states in the n-side conduction band. In equilibrium, with no applied bias, shown in Fig 5.1(b), the net tunneling current is zero. With a small forward bias, current flow by electron tunneling gives rise to a peak current Ip at voltage Vp, as labeled in Fig 5.1(c). When the conduction band minimum on the n side is raised above the valence band maximum on the p side, the valley current Iv results at a voltage Vv in Fig 5.1(d).
With further increase in the voltage, the current increases due to tunneling through defect states in the depletion layer and thermionic emission over the diode internal barrier, Fig 5.1(e).
Fig 5.1: Schematic energy band diagram and current-voltage property of tunneling diode with varying bias (From Y. Yan[25])
In a tunneling diode, the doping profile is key point for the performance[25-27]. Once an abrupt doping profile is obtained, the resistance at the junction is decreased. In other words, less voltage loss in a stacked solar cell with a higher Voc could be achieved. On the contrary, the broadening of the abrupt doping profiles increases the tunneling diode depletion region and significantly reduces the tunneling probability through depletion region. Consequently, stacked solar cell performance will dramatically be degraded.
With ion implantation, a common way to achieve tunneling diode, the doping profile of junction is hard to control. Therefore, we use direct wafer bonding to realize a good tunneling junction between two MIS solar cells.
5.1.2 Bonding Theorem
Direct wafer bonding generally refers to a process which two cleaned wafers adhere to each other without intermediate medium. If two polished wafers are brought into close sufficiently, attractive forces could pull the two bodies together into intimate contact so that bonds can form across the interface. Nevertheless, the bonding force is too weak that wafer would debond during suffering a small shear force. To strengthen the bonds across the interface, the room temperature bonded wafers have to undergo a high temperature annealing, and then two wafers can adhere to each other permanent.
Direct wafer bonding depends on types of interaction: van der Waals forces,
hydrogen bonds or strong chemical bonds of metallic, ionic or covalent may mediate the adhesion. At room temperature, the attraction between two contacted cleaned wafers is seen as a van der Waals forces or hydrogen bonds[28]. After the subsequent heat treatment, the chemical bonds will be formed gradually at the interface, increasing the bonding energy.
The bonding energy is determined by substrate, annealing temperature, surface cleaning, and surface treatments and so on. Among these process parameters, surface cleaning is the most important. In the research, a particle with diameter 0.5um makes diameter 2.5 mm unbounded areas, so wafer cleaning in clean-room before bonding is a better way to enhance the yield and bonding quality. In reality, the bonding strength and electrical properties can even close to a bulk material with carful cleaning process and high temperature annealing.
5.1.3 Fabrication of Tunneling Diodes
The fabrication processes of a tunneling diode by direct wafer bonding are listed as follows
(1) Wafer are cleaned with RCA clean (2) Ion implantation at the polished side
(3) Dopants activated with rapid thermal annealing (RTA) 1050 30s℃ (4) Furnace 600 30 min in N2 to reco℃ very implantation damage
5.1
damage, the lower current is attained without doubt. Moreover, the forward bias current is lower than reversed bias current. After furnace annealing, current raises at least two orders at reversed bias and about four orders at forward bias (Fig 5.3), and J-V curves shows no NDR in tunneling diode but a typical characteristic of a diode with large reversed saturation current.
-1.2 -0.8 -0.4 0.0 0.4 0.8 1.2
1E-6 1E-5 1E-4 1E-3 0.01 0.1 1
Curre nt De ns ity (A/c m2 )
Foward Bias (V)
RTA
RTA+Furnace
J-V Properties of Bonding Junction
Fig 5.3: Current-Voltage properties of bonded samples in dark with and without furnace annealing
To explain these strange J-V properties, we measure the junctions between ion implantation regions and wafers. From Fig 5.4, we can conclude that without furnace annealing, the junctions between ion implantation regions and wafers, corresponding to
n-n+ and p-p+ internal junctions, dominate the J-V properties and exhibit the opposite trend. With Furnace annealing, junctions vanished due to dopants diffusion and an ohmic curve with large current density are obtained because of defects diminishing.
-1.2 -0.8 -0.4 0.0 0.4 0.8 1.2
1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1
Current Density (A/cm2 )
Forward Bias (V)
RTA
RTA+Furnace
Fig 5.4: Current-Voltage properties of single wafer under dark with and without furnace annealing
Although the bonded sample shows no NDR in J-V curve (Fig 5.3), indicating
Although the bonded sample shows no NDR in J-V curve (Fig 5.3), indicating