2.3.1 Warning Signal Generation
In general, the ion implanter will be stopped whenever there is a warning signal so as not to damage the subsequent wafers. However, this reaction will be justified only when the warning signal is absolutely correct; otherwise, the throughput will be degraded. Thus, to minimize the probability of false alarms should be one of the objectives. On the other hand, thousands of wafers may be damaged if any fault is not detected. Thus, to minimize the probability of overlooking a fault is another objective. In general, a matched classification result implies (i) the machine is in normal condition, or (ii) the actual implantation has been wrong due to a machine fault but a misclassification makes the classified recipe match the destined one. Case (ii) indicates a fault situation that cannot be observed from the matched result. We let denote the misclassification rate of recipei i, which can be calculated by the following
i j
i (j)m(i| j)
(2.8)
where ( j) denotes the prior probability of recipe j and m(i| j) denotes the misclassification rate of classifying recipe j to be recipe i. If case (ii) occurs to recipe i, then the probability of a series of n such events occur is . This indicates thein probability of an undetected machine fault will be extremely small provided that isi small, and n is large. This also implies that the matched recipe will eventually mismatch provided that the matched result is due to a misclassification. Real values of for alli i based on HCT will be given through the tests presented in Section 2.4. This addresses the comment cited in Section 2.1 that we need not check the existence of a machine fault when the classified recipe matches the destined one, and the cost of such a reaction is at most n damaged wafers, where n is a positive integer that makes extremely small. This alsoin indicates when the classified recipe matches the destined one, we can continue for next wafer as shown in Figure 2.2. Thus, using the classification accuracy of the HCT as the basis of generating a warning signal, our objective can be simplified to minimizing the probability of false alarm.
There are two causes of false alarms. One is the electrical spike and the other is the classification error. Both cases will cause the classified recipe mismatch the destined one and require the checking of warning signal generation criteria as indicated in Figure 2.2. To minimize the probability of false alarm due to an electrical spike, we should distinguish an electrical spike from a machine fault. The electrical spike is only temporary, which may affect one or two wafers only, while the machine fault will last until it is fixed. Thus, an easier way to distinguish them is checking whether a series of classification errors occur. In other words, if there are more than, say,four consecutive classification errors, the causes of the errors should not be the electrical spikes. Similar reasons apply to the classification errors. We let q denote the classification error rate, which is defined as (number ofi misclassified wafers/number of test wafers)*100%, of recipe i obtained using k-fold cross validation. Then the probability of the occurrence of n consecutive classification errors is
n
q )i
( , which decreases sharply when n increases. Thus, an easier way to distinguish the classification error from the machine fault is also checking whether a series of classification
errors occur. To achieve this, we can predetermine a very small positive real number , a probability indication of an event that is almost not possible to occur. Then if (q )i n , we can conclude that the cause of mismatched recipe is not classification errors. Thus we can state ourwarning signal generation criteria as follows.
Let the classification error rate of recipe i obtained using k-fold cross validation be denoted by q , and leti n denote the number of consecutive working wafers, then the proposed criteria for generating a warning signal is:
Assume the classified recipe of the (l1)th wafer matches the destined one, while the l th, (l1) th,…,(ln) th wafers do not, the warning signal will be generated at the (ln)th wafer provided that the following two conditions hold:
( 1) ( )
)
(l q 1 l q l n
qil il il n (2.9)
and
1, n
n (2.10)
where i denotes the destined recipe of thel lth wafer, qi(l) denotes the qi of the l th wafer, is a very small positive real number, and n1 denotes the maximum number of consecutive wafers that can be affected by the electrical spikes.
If condition (2.9) holds, we can exclude the possibility of false alarm due to classification errors. If condition (2.10) holds, we can exclude the possibility of false alarm due to the electrical spikes.
2.3.2 Fault Isolation
To eliminate the machine fault, we need to isolate the fault first. In general, when there is
a fault in a subsystem, the attribute (or attributes) corresponding to that subsystem may become abnormal. Thus, the basic idea of our fault isolation scheme is to find the attribute(s) that causes the classification errors, and this can be easily done in a single-tree classifier like CART and HCT, which is their biggest advantage, the interpretability. In fact, the tree-structure of HCT is much simpler than CART, because it largely reduces the tree size of CART by using the clustering tree to separate the whole data set into several TCs. Thus, if the misclassified recipe and the destined recipe belong to different TCs, we can use the clustering tree to find the faulty attribute. While if they belong to the same TC, we will use the corresponding CART to find the faulty attribute. Considering that the machine fault may occur abruptly or develop gradually, and there may be single or multiple faulty attributes, we will find the faulty attribute(s) for each misclassified wafer by the aid of its tree path and the tree paths of several latest correctly classified wafers of the same destined recipe. Thus, once a warning signal is generated, our fault isolation scheme will proceed as follows.
Step 1: Collect the m consecutive misclassified wafers that cause the warning signal, i.e.1 )
, max( 1
1 n n
m such that conditions (2.9) and (2.10) hold.
Step 2: Collect the latest m2 correctly classified wafers, which have the same destined recipes as the m wafers in Step 1.1
Step 3: For each of the m wafers in Step 1 and each of the1 m2 wafers in Step 2, we will find the faulty attribute(s) that causes the misclassification as follows.
3.1 Suppose the two wafers belong to different TCs, say TC andi TC , we will usek the clustering tree to find the faulty attribute by tracing the tree paths backward from the corresponding TCs. These two paths will meet at a node whose splitting attribute will be the faulty attribute. As illustrated in Figure 2.9, the faulty attribute is k .1
3.2 Suppose the two wafers belong to the same TC, and they lie in two different terminal nodes of the corresponding CART, we can find the faulty attribute in a similar manner as in Step 3.1 using the classification tree of CART.
Step 4: List all the different faulty attributes found from the m1m2 searches in Step3 and calculate the corresponding probability, based on the frequency of occurrences.
Indicate the corresponding subsystem of the faulty attributes and calculate the corresponding probability by adding the probabilities of the faulty attributes in this subsystem.
TCi TCk
k1
k2 k3
. . . .
. . .
Figure 2.9. Using clustering tree to find the faulty attribute.