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THlB-2

A Resonant Flip-Chip Design with Controllable Transition Band

-1:

m:

Chun-Long Wang, Chieh-Tsao Hwang, Ruey-Beei Wu and Chun-Hsiung Chen Department of Electrical Engineering

National Taiwan University, Taipei, Taiwan, ROC Abstract-This paper proposes a new flip-

chip structure which uses resonanting dual bumps to achieve best transition. By simply changing the distance between the two bumps, we can control the band of minimum reflection in the desired frequency band. The bandwidth over which the return loss is smaller than -20dB is 20-30%. The corresponding insertion loss in this band is less than -1.5dB. All results presented below are simulated with the FDTD method combined with PML.

I. Introduction

The coplanar waveguide has found increasing application in MMIC at millimeter wave frequencies. Emerging commercial markets request a greater demand in low cost, reliable property, and good performance in packaging structure. Comparison with the wire bond has encouraged the use of flip-chip for the chip connection. It has been shown that the flip- chip can yield better performance and lower surface wave loss [1],[2]. For single chip transition, lower reflection has been achieved by increasing the width of via or reducing its length, and the conductor on the mother board below the chip should be avoided [3]. Some efforts were made to investigate the influences on the transition characteristics due to the via positions or cross sections, and the shape of the metal [4],[5].

Although the method proposed in [3]-[5] could enhance the performance of transition, no obvious rule for tuning these parameters has been established to achieve an optimum performance. Based on the idea of resonance, this paper proposes new designs for the flip-

chip transition.

11. Statement of Problem

The basic flip-chip structure under analysis is illustrated in Fig.1 where Fig.l(a) is a three- dimensional view, Fig. 1 (b) is the side view, and Fig.l(c) is the top view. The transmission lines in both layers, e.g., chip and board layers, are coplanar waveguides (CPW). They are connected by vias of width L and length H,. For simplicity, the vias are assumed to be of square shape. The substrates of the upper and lower layers are the same, of dielectric constant E,.,=E,.~,

while the transition happens in free space, i.e., &,.,=I. It is worthy mentioning that the flip-chip connection requires no via hole, no wafer thinning process, and no backside processing of the wafer. In the simulation, the metals are assumed perfect conductors (PEC) and of negligible thickness. To discuss the circuit performance of the transition, the numerical method of FDTD combined with PML is applied here to extract the scattering parameters, and the results are shown in the following section.

111.

Numerical Results

A) Conventional Design

Transition property of flip-chip interconnects has been investigated in the literature, e.g., the survey paper [6]. The configuration is shown in Fig. 1. The solid curve in Fig.2 shows the calculated return loss (RL) versus frequency by using FDTD. The calculated results with solid line are in excellent 1423

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dielectnc conductor conductor bump

layer layer

in the upper in the lower

(a) I .. -~ I Hi I E r 3 f -€ Hz - Y _- (c)

Fig. 1 The configuration of traditional flip-chip transition. (a) three-dimensional view (b) side view and (c) top view. Hi=H,=0.36mm, H2=0.12mm, W=S=L=O.I2mm, g,=12.9, ~ , ~ = l , ~,=12.9.

agreement with those reprinted from [ 6 ] . As

shown in Fig.2, it can be seen the €U becomes larger as the frequency increases. The traditional transition design suffers from larger reflection in the high frequency range.

B) Staggered Design

A staggered structure of flip-chip transition

-15 . m, Y 3 - 2 0 .

5

8 5 a -25 . -3 O 0 - 10 20 30 40 Frequencv IGHZ)

Fig.2 Frequency response of return loss in the conventional flip-chip design.

is proposed to overcome the high reflection in the high frequency range [ 5 ] . Fig.3(a) displays the top view of the staggered structure, where other parameters are the same as Fig. 1. Fig.3(b) shows the calculated RL versus frequency with staggered length L,vtg as a parameter. The results with solid and dashed lines are calculated by the present analysis, while the dots are reprinted from [5] and included for comparison. Although the results calculated by the two methods show noticeable discrepancy, the staggered design can improve the transition property . at high

frequencies. For the present case, it seems that

L,qtg=0.24rnrn can yield the best transition in 60-

70 GHz range. However, it is hard to obtain a concise rule for the choice of the best staggered length at an arbitrary desired frequency band.

C)

Single Resonance Design

A new design of flip-chip transition, which

adopts the idea of resonance, is presented in this paper. The top view of the structure is shown in

Fig. 4(a). One salient feature distinguished from

the staggered design is the presence of two via connections along the signal line. The scattering from the two vias will interfere with each other and optimum transition may be achieved when the two vias are in suitable resonant separation.

Fig.4(b) shows the frequency response of

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-5

t

1

6 -10- 9

3

-15. U)

-

s

a" -20- 0 i 0 20 30 40 50 60 70 00 Frequency (GHz) (b)

Fig.3 The staggered flip-chip transition design. (a) top view (b) return loss versus frequency with staggered

length L,ylg as a parameter.

the return loss with different lengths of L,vlg

while all other parameters are the same as Fig. 1. A good pass band can be noticed in the figure with the center frequency (first notch)

fo

varying with the length L,vlg. The relative bandwidth over which the return loss is smaller than -20dB, or the 20dB BW in brief, is about 20-30%.

Similar procedure can be employed to calculate the insertion loss versus frequency with the lengths L,slg considered in Fig.4(b). Although not shown in this paper, the insertion loss is less than -1.5dB in the 20dB pass band, and -0.8dB at

fo

no matter what length L,y, is.

This can be compared with the insertion loss in staggered design with an optimum L,, of

0.24mm, which is -2dB. J

.

0 -5 1 cg -10 U)

-

3 -15 E

E

-20 -25 0 10 20 30 40 50 60 70 00 Frequency (GHz) (b)

Fig.4 The single resonance flip-chip transition design. (a) top view (b) return loss versus frequency with L , as a parameter.

Fig.5 displays the half free space wavelength &/2=c *fo/2 versus the resonance length (L,?,*2+S). A nearly linear relationship between &/2 and (L,,*2+S) verifies that this occurrence of optimum transition is a resonance phenomenon. Given the desired operating frequency

fo,

the figure can be employed to determine the via separation for the optimum transition design.

0)

Dual Structure

Another design of flip-chip transition, which is dual to the single resonance design, is shown in Fig.6(a). Fig.6(b) shows the calculated RL versus frequency with staggered length L,s,

as a parameter. The results also reveal a slight resonance phenomenon. A more detailed

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10 I 1

0

0 0.5 1 1.5 2 2.5 3

Resonant Length (mm)

Fig.5 Half free space wavelength ;lo/2=c*fJ2 versus optimum via separation (L,v,g*2+s) for the single resonance flip-chip transition design.

i - ’ Y t X b ’ i r * s L>& Ls@=O.24mm

-

L s ~ A 8 m m --- Lstg=O.96mm .:.:Is, -5 Frequency (GHz) (b)

Fig.6 The dual structure flip-chip transition design (a) top view (b) return loss versus frequency with L,s,K as a parameter.

analysis will be presented at the symposium.

IV. Conclusion

To sum up, a concise rule can be found for the design of the new flip-chip transition. We can control the frequency of pass band by adjusting the separation between the via connections. Simulation results demonstrate that the proposed structure can achieve a good transition design of 20-30% bandwidth over which the return loss is smaller than -20dB and the insertion loss is less than -1 SdB.

Reference

:

[l] G. Baumann, H. Richter, A. Baumgiirtner, D. Ferling, R. Heilig, D. Hollmann, H. Muller, H. Nachansky, and M. Schlechtweg, “51 GHz

fkontend with flip chip and wire bond interconnections from GaAs MMICs to planar patch antenna”, Proc. IEEE MTT-Symp. Dig,, 1995, Orlando, FL, pp. 1639-1642.

T. Krems, W. H. Haydl, H. Massla, and J. Rudiger, “Advantages of flip chip technology in millimeter- wave packaging”, Proc. IEEE MTT-Symp. Dig.,

1997, Denvor, CO, pp. 987-990.

[3] W. Heinrich, A. Jentzsch, and G. Baumann, “Millimeterwave characteristics of flip-chip interconnects for multi-chip modules,” lEEE M7T-

Symp. Dig., 1998, pp. 1083-1086.

[4] N. Iwasaki, F. Ishitsuka, and K. Kato, “High performance flip-chip technique for wide-band modules,” IEEE MTT-Symp. Dig., 1996, pp. 207- 209.

H. H. M. Ghouz and E. EL-Aharawy, “Finite- difference time-domain analysis of flip-chip interconnects with staggered bumps,” IEEE Trans.

Microwave Theory Tech., vo1.44, pp.963, June 1996.

H. H. M. Ghouz and E. EL-Aharawy, “An accurate equivalent circuit model of flip chip and via interconnects,” IEEE Trans. Microwave Theory

Tech., vo1.44, pp.2550, Dec. 1996. [2]

[5]

[6]

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