IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 8, AUGUST 2014 823
Built-in Effective Body-Bias Effect in
Ultra-Thin-Body Hetero-Channel
III–V-on-Insulator n-MOSFETs
Chang-Hung Yu, Student Member, IEEE, and Pin Su, Member, IEEE
Abstract— This letter reports a built-in effective body-bias
effect in ultra-thin-body (UTB) hetero-channel III–V-on-insulator n-MOSFETs. This effect results from the discrepancies in elec-tron affinity and the effective density-of-states of conduction band between the III–V and conventional Si channels. Our study indicates that, in addition to permittivity, it is the built-in effective body-bias effect that determbuilt-ines the drabuilt-in-built-induced- drain-induced-barrier-lowering characteristics of the hetero-channel devices. This intrinsic effect has to be considered when one-to-one comparisons among various UTB hetero-channel MOSFETs regarding the electrostatic integrity are made.
Index Terms— Ultra-thin-body (UTB), III-V, hetero-channel, drain-induced-barrier-lowering (DIBL), electrostatic integrity (EI).
I. INTRODUCTION
H
IGH-MOBILITY III-V materials such as InxGa(1−x)Ashave been proposed as hetero-channels (high-mobility channel with Si-substrate) for post-Si CMOS devices because of their superior carrier transport properties [1]–[6]. How-ever, one intrinsic drawback of these III-V compounds is their higher permittivity and worse device electrostatic integrity (EI) [6]. Ultra-thin-body (UTB) structure with thin buried oxide (BOX) has been regarded as promising device architectures to mitigate the EI problem [7], [8]. In addition to better gate control and smaller random dopant fluctuation (due to undoped or lightly-doped channel [9], [10]), the UTB with thin BOX structure also enables more efficient threshold-voltage (VT) modulation and power/performance optimization
through body bias (VBS) [7], [8]. Besides the permittivity,
whether there is any other intrinsic mechanism determining the EI of UTB hetero-channel III-V-on-insulator (III-V-OI) devices is an important question. In this letter, with the aid of TCAD simulation, we report a built-in effective body-bias effect in UTB III-V-OI n-MOSFETs. Its impacts on the
Manuscript received May 15, 2014; revised May 28, 2014; accepted May 31, 2014. Date of publication June 20, 2014; date of current version July 22, 2014. This work was supported in part by the Ministry of Science and Technology, Taiwan, under contracts MOST 102-2221-E-009-136-MY2 and MOST 103-2911-I-009-302 (I-RiCE), and in part by the Ministry of Education in Taiwan under ATU Program. The review of this letter was arranged by Editor J. A. del Alamo.
The authors are with the Department of Electronics Engineering, Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan (e-mail of corresponding author: [email protected]).
Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2014.2328628
drain-induced-barrier-lowering (DIBL) characteristics of vari-ous hetero-channel devices have also been investigated.
II. RESULTS ANDDISCUSSION
In this letter, the UTB devices are designed with 50nm nom-inal gate length (i.e., L= 50 nm unless otherwise specified), 50nm gate width (W), 1nm equivalent oxide thickness (EOT), 15nm channel thickness (Tch), and 15nm BOX thickness
(TBOX). The channel, source/drain, and Si-substrate (p-type)
doping concentrations are 1015 cm−3, 5×1019 cm−3, and 1018 cm−3 [7], respectively. Abrupt junction between source/ drain region and channel region is assumed. The trans-port model we employ is the classical drift-diffusion model with constant mobility model [11], [12], and the impact of interface trap is not considered. In this letter, the threshold voltage (VT) is determined at a given current:
[100 nA×(W/L)]×(μchannel/μSi) where μchannelrepresents the
carrier mobility of the high-mobility channel [12].
Using TCAD simulation [11], Fig. 1(a) compares the DIBL characteristics for UTB SOI, GeOI, and In0.53Ga0.47As-OI
n-MOSFETs. It can be seen that the GeOI device exhibits larger DIBL than the SOI counterpart because of its higher permittivity. However, the In0.53Ga0.47As-OI device exhibits
worse DIBL than the GeOI counterpart ever though it has smaller dielectric constant (εr = 13.9) than Ge (εr = 15.8).
Fig. 1(b) further compares the DIBL characteristics for the In0.53Ga0.47As-OI, In0.53Ga0.47As-OI with εr = 11.7 (the
same dielectric constant as Si), and SOI devices under various body biases. It can be seen that, although the DIBL of In0.53Ga0.47As-OI can be improved by reducing the dielectric
constant from 13.9 to 11.7, it is still significantly larger than that of SOI for a given VBS. Note that in Fig. 1(b) the DIBL
increases with more positive VBS because more positive VBS
pulls the electron profile toward the back interface and thus reduces the gate control [13].
The anomalous DIBL characteristics shown in Fig. 1 can be explained by Fig. 2, which compares the profiles of the conduction band edge (EC) along the channel-thickness
direction between long-channel UTB In0.53Ga0.47As-OI and
SOI devices at VBS = 0V and VGS = VT. As indicated in
Fig. 2, the slope of EC(and thus the vertical electric field) in
the channel region for the In0.53Ga0.47As-OI device is smaller
than the SOI counterpart. This result infers that there exists an effective built-in forward body-bias in the In0.53Ga0.47As-OI 0741-3106 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
824 IEEE ELECTRON DEVICE LETTERS, VOL. 35, NO. 8, AUGUST 2014
Fig. 1. (a) Comparison of the DIBL characteristics for UTB SOI, GeOI, In0.53Ga0.47As-OI n-MOSFETs. (b) Merely considering the impact of
per-mittivity cannot explain the discrepancy in the DIBL versus VBScharacteristic
between In0.53Ga0.47As-OI and SOI devices.
Fig. 2. Comparison of the EC distributions along the channel-thickness
direction showing the difference in vertical field (slope of EC) between the
In0.53Ga0.47As-OI and SOI n-MOSFETs. The two devices possess identical
threshold voltage. This profile is extracted at the location where the minimum potential occurs for carrier flow along the channel-length direction (∼L/2).
device (relative to the SOI device). This built-in effective body-bias (VBS,eff) is intrinsic to hetero-channel MOSFETs
with Si-substrate and can be expressed as (under classical approximation) VB S,ef f = 1 q χI I I−V ch − χ Si ch +kT q ln NCI I I,ch−V NCSi,ch (1)
Fig. 3. After considering the impacts of permittivity and built-in effective body-bias effect, the channel electron profile for the In0.53Ga0.47As-OI device
coincides with that of the SOI device. The electron density is evaluated at the location where the minimum potential occurs for carrier flow along the channel-length direction.
where kT/q is the thermal voltage, χch the electron affinity
for channel, NC,ch the effective density-of-states of
con-duction band for channel, and the superscripts III-V and
Si represent the III-V-OI and SOI devices, respectively.
Since χch = 4.5 eV and NC,ch = 2.08×1017 cm−3 for
In0.53Ga0.47As [12] and χch = 4.07 eV and NC,ch =
2.85×1019 cm−3 for Si, there exists a 0.3V built-in forward body bias in the In0.53Ga0.47As-OI device at room temperature
based on Eqn. (1).
Fig. 3 compares the electron density distribution along the channel-thickness direction for the In0.53Ga0.47As-OI and
SOI devices. It can be seen that the electron centroid of the In0.53Ga0.47As channel is closer to the back interface (solid
upper triangle), and the impact of dielectric constant is modest (open upper triangle). However, if the built-in VBS,eff =
0.3V is further compensated by external body biasing, the electron profile of the In0.53Ga0.47As-OI channel (open square)
shows a fairly good agreement with that of SOI. This validates the accuracy of Eqn. (1) and demonstrates that, in addition to permittivity, it is the built-in VBS,eff that determines the
electron profile and thus the electrostatic integrity of the In0.53Ga0.47As-OI device.
Fig. 4 investigates and compares the impacts of the built-in VBS,eff on the DIBL of various high-mobility
hetero-channel devices (InP, In0.53Ga0.47As, In0.7Ga0.3As, InAs,
InSb, and Ge). The built-in VBS,eff of these hetero-channel
devices are calculated by Eqn. (1) and listed in Fig. 4. It can be seen that while the VBS,eff = 0.3V for In0.53Ga0.47As-OI
nFET, the GeOI nFET possesses a reverse VBS,eff = −0.1V.
This explains why in Fig. 1(a) the In0.53Ga0.47As-OI device
exhibits worse DIBL than the GeOI counterpart in spite of its smaller permittivity. Another anomalous DIBL characteristic is that the InSb-OI device exhibits smaller DIBL than the InAs counterpart even though its permittivity is larger. This can also be explained by the difference of their built-in effective body bias (VBS,eff = 0.349V for InSb while VBS,eff = 0.705V for
InAs). Fig. 4 indicates that the impact of VBS,eff on DIBL
characteristics can be larger or comparable to the impact of permittivity for III-V-OI n-MOSFETs.
YU AND SU: BUILT-IN EFFECTIVE BODY-BIAS EFFECT IN UTB HETERO-CHANNEL III–V-ON-INSULATOR n-MOSFETs 825
Fig. 4. Dissection of DIBL for various hetero-channel n-MOSFETs. The open square is obtained by applying external body biasing (with−VBS,eff) to compensate the impact of the built-in VBS,eff. The gap between solid circle and open square indicates the impact of VBS,eff, while the gap between open
square and blue cross indicates the impact of permittivity.
Fig. 5. Dissection of DIBL for the In0.53Ga0.47As-OI device under the
quantum-mechanical condition. The gap between solid circle and open circle indicates the impact of permittivity (εr), the gap between open circle and the
triangle indicates the impact of quantization effective mass (m∗), while the gap between the triangle and the cross indicates the impact of VBS,eff.
The built-in effective body-bias effect, albeit reported in this letter under classical condition, is still present under the quantum-mechanical condition. In Fig. 5, we dissect the DIBL for the In0.53Ga0.47As device by solving the
Poisson-Schrödinger equations [11] (the quantization effective mass m∗ = 0.043m0with m0 the free electron mass and the
nonparabolicity factorα = 1.24eV−1 [14]). It can be seen that the higher DIBL of the InGaAs device (as compared with the Si device) results from itsεr, m∗and the built-in VBS,eff, and
the relative impacts ofεr, m∗ and VBS,eff are 36.9%, 6% and
57.1%, respectively. Note that without knowing the existence of the built-in effective body-bias effect, one can never explain the excess DIBL of the InGaAs device (the gap between the triangle and the cross).
It should be noted that for a given built-in VBS,eff, a
part of it may fall over the BOX and substrate depletion region. Therefore, its impact on DIBL may decrease for devices with thick BOX or light substrate doping. Besides, using Al2O3 (high-K) as the BOX material will increase
the impact of the built-in VBS,eff on DIBL as compared
with SiO2.
III. CONCLUSION
We have reported a built-in effective body-bias effect in UTB hetero-channel III-V-OI n-MOSFETs. This effect results from the discrepancies in electron affinity and the effective density-of-states of conduction band between the III-V and conventional Si channels. In addition to permittivity, it is the built-in effective body-bias effect that determines the DIBL characteristics of the hetero-channel devices. This effect has to be considered when one-to-one comparisons among various UTB hetero-channel MOSFETs regarding the electrostatic integrity are made.
REFERENCES
[1] (2014). International Technology Roadmap for Semiconductor (ITRS) [Online]. Available: http://www.itrs.net/
[2] M. Radosavljevic et al., “Advanced K gate dielectric for high-performance short-channel In0.7Ga0.3As quantum well field effect tran-sistors on silicon substrate for low power logic applications,” in Proc.
IEEE IEDM, Dec. 2009, pp. 319–322.
[3] S. H. Kim et al., “Sub-60 nm deeply-scaled channel length extremely-thin body InxGa1−xAs-on-insulator MOSFETs on Si with Ni-InGaAs metal S/D and MOS interface buffer engineering,” in Proc. Symp. VLSIT, Jun. 2012, pp. 177–178.
[4] M. Yokoyama et al., “Extremely-thin-body InGaAs-on-insulator MOS-FETs on Si fabricated by direct wafer bonding,” in Proc. IEEE IEDM, Dec. 2010, pp. 46–49.
[5] Y. Sun et al., “High-performance In0.7Ga0.3As-channel MOSFETs with
high-k gate dielectrics andα-Si passivation,” IEEE Electron Device Lett., vol. 30, no. 1, pp. 5–7, Jan. 2009.
[6] H.-C. Chin et al., “III–V multiple-gate field-effect transistors with high-mobility In0.7Ga0.3As channel and epi-controlled retrograde-doped fin,”
IEEE Electron Device Lett., vol. 32, no. 2, pp. 146–148, Feb. 2011.
[7] L. Grenouillet et al., “UTBB FDSOI transistors with dual STI for a multi-Vt strategy at 20nm node and below,” in Proc. IEEE IEDM, Dec. 2012, pp. 64–67.
[8] C. Fenouillet-Béranger et al., “Efficient multi-VT FDSOI technology with UTBOX for low power circuit design,” in Proc. Symp. VLSIT, Jun. 2010, pp. 65–66.
[9] O. Weber et al., “High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding,” in Proc. IEEE IEDM, Dec. 2008, pp. 245–248.
[10] K. Cheng et al., “Fully depleted extremely thin SOI technology fabri-cated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain,” in Proc. Symp. VLSIT, Jun. 2009, pp. 212–213.
[11] Sentaurus TCAD, G-2012.06 Manual, Synopsys, Inc., Mountain View, CA, USA, 2012.
[12] Y. A. Goldberg and N. M. Schmidt, Handbook Series on Semiconductor
Parameters, vol. 2. M. Levinshtein, S. Rumyantsev and M. Shur, Eds.
London, U.K.: World Scientific, 1999, pp. 62–88.
[13] M. K. Md Arshad et al., “Extended MASTAR modeling of DIBL in UTB and UTBB SOI MOSFETs,” IEEE Trans. Electron Devices, vol. 59, no. 1, pp. 247–251, Jan. 2012.
[14] B. R. Nag and S. Mukhopadhyay, “Energy levels in quantum wells of nonparabolicity semiconductors,” Phys. Status Solidi B, vol. 175, no. 1, pp. 103–112, 1993.
