Optimized FPGA design, verification and implementation of a neuro-fuzzy controller for PMSM drives

MathematicsandComputersinSimulation90(2013)28–44

Original

article

Optimized

FPGA

design,

verification

and

implementation

of

a

neuro-fuzzy

controller

for

PMSM

drives

Hsin-Hung

Chou

,

Ying-Shieh

Kung

,

Nguyen

Vu

Quynh

,

Stone

Cheng

a_{DepartmentofMechanicalEngineering,NationalChiao-TungUniversity,1001UniversityRoad,EastDistrict,HsinchuCity300,Taiwan,ROC}

b_{DepartmentofElectricalEngineering,SouthernTaiwanUniversity,1Nan-TaiStreet,Yong-KangDistrict,TainanCity710,Taiwan,ROC}

Received24October2011;receivedinrevisedform22June2012;accepted23July2012 Availableonline3August2012

Abstract

Theworkpresentsaneuralfuzzycontroller(NFC)forspeedloopofpermanentsynchronousmotor(PMSM)drivesbasedon thetechnologyoffieldprogrammablegatearray(FPGA).Firstly,amathematicmodelofthePMSMdriveisderived;thento increasetheperformanceofthePMSMdrivesystem,afuzzycontroller(FC)whichitsparametersareadjustedbyaradialbasis functionneuralnetwork(RBFNN)isappliedtothespeedcontrollerforcopingwiththeeffectofthesystemdynamicuncertainty. Secondly,veryhighspeedIChardwaredescriptionlanguage(VHDL)isadoptedtodescribethebehaviorofthespeedcontroller ofPMSMdriveswhichincludesthecircuitsofspacevectorpulsewidthmodulation(SVPWM),coordinatetransformation,NFC, etc.Besides,toreducetheresourceusagewhileimplementinginfieldprogrammablegatearray(FPGA),asequentialexecution usingfinitestatemachine(FSM)isapplied.Thirdly,basedonelectronicdesignautomation(EDA)simulatorlink,asimulation workisconstructedbyMATLAB/SimulinkandModelSimco-simulationmodewhichthePMSM,inverterandspeedcommand areperformedinSimulinkaswellasthespeedcontrollerofPMSMdrivesisexecutedinModelSim.Finally,someco-simulation resultsvalidatetheeffectivenessoftheproposedNFC-basedspeedcontrollerforPMSMdrives.

©2012IMACS.PublishedbyElsevierB.V.Allrightsreserved.

Keywords:PMSM;Neuralfuzzycontrol;VHDL;FPGA;ModelSim;Finitestatemachine;Simulink;Co-simulation

1. Introduction

PMSMhasbeenincreasinglyusedinmanyautomationcontrolfieldsasactuators,duetoitsadvantagesofsuperior powerdensity,high-performancemotioncontrolwithfastspeedandbetteraccuracy.Butinindustrialapplications, thereare many uncertainties, such as system parameteruncertainty, external loaddisturbance,friction force, and unmodeleduncertainty,whichalwaysdiminishtheperformancequalityofthepre-designofthemotordrivingsystem. Tocopewiththisproblem,inrecentyears,manyintelligentcontroltechniques[1,5,7,11,17],suchasfuzzycontrol, adaptivePIDcontrol,neuralnetworkscontrol,adaptivefuzzycontrolandothercontrolmethod,havebeendeveloped andappliedtothespeedcontrolofservomotordrivestoobtainhighoperatingperformance.Althoughfuzzycontrol hasbeensuccessfullyappliedinseveralindustrialautomation,however,itisnotaneasytasktoobtainanoptimalset offuzzymembershipfunctionsandrulesinFC.Inthispaper,aneuralfuzzycontroller(NFC)isproposedwhichRBF

∗_{Correspondingauthor.}

E-mail addresses: [email protected] (H.-H. Chou), [email protected] (Y.-S. Kung), [email protected] (N. Vu Quynh),

[email protected](S.Cheng).

0378-4754/$36.00©2012IMACS.PublishedbyElsevierB.V.Allrightsreserved. http://dx.doi.org/10.1016/j.matcom.2012.07.012

NNisfirstlyusedtoreal-timeidentifytheplantdynamic(Jacobiantransformationterm:(∂ωr/∂i∗q))andprovidedmore

accuracyplantinformation;thenbasedonthegradientdescentmethodandthereal-timeidentifiedplantinformation, parametersofFCcanbetunedtoanear-optimalcondition.

Inimplementation,althoughtheexecutionofNFCrequiresmanycomputations,FPGAcanprovideasolutionin thisissue.Especially,FPGAwithprogrammablehard-wiredfeature,fast computationability,shorter designcycle, embedding processor, low power consumption and higher density is very suitable for the implementation of the digitalsystem[14–16].Althoughthedigitalsignalprocessor(DSP)isanothersolutiontoprovideaflexibleskillin theintelligentcontroltechnique,it suffersfromalongperiodof developmentandexhaustsmanyresources ofthe CPU[18].However,FPGAimplementationofaRBFNNhasbeendevelopedinliteratures[2,6].Brassaietal.[2]

appliedtheRBFNNintheareaofroboticsandcontrol.ThecomputationsofneuronsinhiddenlayerofRBFNNand weightadaptionmoduleadopttypicalparallelimplementationonFPGA.Inaddition,tablelookupmethodisusedto developtheactivationfunction.Kimetal.[6]firstlydevelopafloating-pointprocessoronFPGA.Thenbasedonthis floating-pointprocessor,amicroprogramiswrittentoimplementtheRBFNNwithon-linelearningback-propagation algorithm.The Taylorseriesis consideredtocompute theGaussianfunction.However, afloating-pointprocessor consumesFPGAresourcesandtheexecutingspeedmightbeslow.Further,inthehardwarerealizationofanintelligent controlalgorithm,excepttheparallelprocessingmethod,thesequentialexecutionmethodisalternative.Theformer methodwithcontinuousandsimultaneousoperationhastheadvantageoffastcomputationability,butconsumesmuch moreFPGAresources.Thelattermethodseparatestheoverallcomputationwithseveralstepsandtheresourceswith samefunctionineach stepwillbecommonuse;thereforeitcangreatlysavemuchFPGAresources.Inthispaper, amethodmixedwithparallelprocessingandsequentialexecutionisadoptedtocomputetheNFCalgorithm.Except thatthecomputationofneuronsinthehiddenlayerofRBFNNisappliedbytheparallelprocessingmethod,others computation,such astheGaussianfunction,weightadaption moduleandJacobianfunctioninRBFNNas wellas thefuzzycontrolalgorithmareallpresentedbythesequentialexecutionmethod.Althoughthesequentialexecution methodneedstospendmorecomputationtime,itdoesnotlossanycontrolperformanceduetothefastcomputation powerinFPGA.Inthispaper,finitestatemachine(FSM),whichbehavioriseasytodescribebyVHDL,isappliedto modelthecomputationprocessofsequentialexecutionmethod.

Recently,aco-simulationworkbyelectronicdesignautomation(EDA)simulatorlinkhasbeengraduallyappliedto verifytheeffectivenessoftheVerilogandVHDLcodeinthemotordrivesystem[3,4,8–10].TheEDAsimulatorlink

[12]providesaco-simulationinterfacebetweenMALTABorSimulinkandHDLsimulators-ModelSim[13].Using

ityou canverifyaVHDL,Verilog,ormixed-languageimplementationagainstyour Simulinkmodel orMATLAB

algorithm[12].Therefore,EDAsimulatorlinkletsyouuseMATLABcodeandSimulinkmodelsasatestbenchthat generatesstimulusforanHDLsimulationandanalyzesthesimulation’sresponse[12].Inthispaper,aco-simulation byEDAsimulatorlinkisapplied.ThePMSM,inverterandspeedcommandareperformedinSimulinkandthe NFC-basedspeedcontrollerdescribedbyVHDLcodeisexecutedinModelSim.Finally,somesimulationsresultsvalidate theeffectivenessoftheproposedNFC-basedspeedcontrollerofPMSMdrives.

2. SystemdescriptionofPMSMdriveandspeedcontrollerdesign

The simulationarchitectureof NFC-basedspeedcontrol for PMSMdriveis showninFig.1.Themodeling of PMSMandthealgorithmoftheneuralfuzzycontrollerareintroducedasfollows.

2.1. MathematicalmodelofPMSM

ThetypicalmathematicalmodelofaPMSMisdescribed,intwo-axisd–qsynchronousrotatingreferenceframe, asfollows did dt =− Rs Ldid+ωe Lq Ldiq+ 1 Ldvd (1) diq dt =−ωe Ld Lqid− Rs Lqiq−ωe λf Lq+ 1 Lqvq (2)

Fig.1.ThesimulationarchitectureofNFC-basedspeedcontrolforPMSMdrive.

wherevdandvqarethedandqaxisvoltages;idandiq,arethedandqaxiscurrents;Rsisthephasewindingresistance;

LdandLqarethedandqaxisinductance;ωeistherotatingspeedofmagnetflux;andλfisthepermanentmagnetflux

linkage.

The current loopcontrol of PMSM drive inFig. 1 isbased on avector control approach.That is, if the id is

controlledto0inFig.1,thePMSMwillbedecoupledandcontrollingaPMSMliketocontrolaDCmotor.Therefore, afterdecoupling,thetorqueofPMSMcanbewrittenasthefollowingequation,

Te=3P

4 λfiqKtiq (3)

with

Kt =3P

4 λf (4)

Consideringthemechanicalload,theoveralldynamicequationofPMSMdrivesystemisobtainedby Jmd

dtωr+Bmωr =Te−TL (5)

whereTe isthemotortorque,Kt istorqueconstant,Jmistheinertialvalue,Bmisdampingratio,TL istheexternal

torque,andωrisrotorspeed.

2.2. Designofneuralfuzzycontroller(NFC)

ThedashrectangularareainFig.1presentsthearchitectureofanNFCforthePMSMdrive.ItconsistsofaFC,a referencemodelandaRBFNNbasedparameteradjustingmechanism.Detaileddescriptionoftheseisasfollows. 2.2.1. Fuzzycontroller(FC)

TheFCinthisstudyusessingletonfuzzifier,triangularmembershipfunction,product-inferenceruleandcentral averagedefuzzifiermethod.InFig.1,thetrackingerroreandtheerrorchangedearedefinedby

e(k)=ωm(k)−ωr(k) (6)

de(k)=e(k)−e(k−1) (7)

whereufrepresentstheoutputoftheFCandωmistheoutputofreferencemodel.ThedesignprocedureofFCalgorithm

c00 dE 1 A0 A1 A2 A3 A4 A5 A6 0 e E de de μμ(e) μμ (d e) 1 μA₃(e) μA₄(e)=1- μA₃(e) μB1 (d e) μB2 (d e)=1-μB1 (de) 0

Fuzzy Rule Table

Input of e (for i=3)

In pu t of de (f or j=1 ) A0 A1 A2 A3 A4 A5 A6 c₀₁ c₀₂ c03 c04 c05 c06 c₁₀ c11 c12 c13 c14 c15 c16 c₂₀ c21 c22 c23 c24 c25 c26 c₃₀ c₃₁ c₃₂ c33 c34 c35 c36 c₄₀ c41 c42 c43 c44 c45 c46 c₅₀ c₅₁ c₅₂ c₅₃ c₅₄ c₅₅ c₅₆ c₆₀ c61 c62 c63 c64 c65 c66 B0 B1 B2 B3 B4 B5 B6 B0 B1 B2 B3 B4 B5 B6 e de3 de2 de1 -d e3 -d e2 -de 1 e3 e2 e1 -e1 -e2 -e3

Fig.2.Thesymmetricaltriangularmembershipfunctionofeanddeandfuzzyruletable.

respectively.EachlinguistvalueofEanddEisbasedonthesymmetricaltriangularmembershipfunction,whichis showninFig.2.Secondly,thecomputationofthemembershipdegreeforeanddearedone.Fig.2showsthattheonly twolinguisticvaluesareexcited(resultinginanon-zeromembership)inanyinputvalue,andthemembershipdegree isobtainedby

μAi(e)=

ei+1−e

ei+1−ei

and μAi+1(e)=1−μAi(e) (8)

SimilarresultscanbeobtainedincomputingthemembershipdegreeμBj(de).Thirdly,theselectionoftheinitial

FCrulesreferstothedynamicresponsecharacteristics,suchas,

IFeisAi and eisBj THENuf is cj,i, (9)

whereiandjarefrom0to6,AiandBjarefuzzynumbers,andcj,iistherealnumber.Finally,toconstructthefuzzy

systemuf(e, de),thesingletonfuzzifier,product-inferencerule,andcentralaveragedefuzzifiermethodis adopted.

Althoughtherearetotal49fuzzyrulesinFig.2willbeinferred,actuallyonly4fuzzyrulescanbeeffectivelyexcited togenerateanon-zerooutput.Therefore,ifanerroreislocatedbetweeneiandei+1,andanerrorchangedeislocated

betweendej anddej+1,onlyfourlinguisticvaluesAi,Ai+1,Bj,Bj+1andcorrespondingconsequentvaluescj,i,cj+1,i,

cj,i+1,cj+1,i+1canbeexcited,andtheoutputofthefuzzysystemcanbeinferredbythefollowingexpression:

uf(e,de)= _i+1 n=i _j+1 m=jcm,n[μAn(e)×μBm(de)] _i+1 n=i _j+1 m=jμAn(e)×μBm(de)  i+1  n=i j+1  m=j cm,n×dn,m (10)

wheredn,mμAn(e)×μBm(de).Andthosecm,nareadjustableparameters.Inaddition,byusing(8),itisstraightforward

toobtaini+1_n=ij+1_m=jdn,m=1in(10).

2.2.2. Radialbasisfunctionneuralnetwork(RBFNN)

TheRBFNNadoptedhereisathree-layerarchitecturewhichisshowninFig.3andcomprisedofoneinputlayer, onehiddenlayerandoneoutputlayer.

Σ

ω

ω

ω

w

w

h

w

h

h

Input layer Hidden layer Output layer

) (k r ω nn

e

-Fig.3.ThearchitectureofRBFNN.

TheRBFNNhasthreeinputsbyi∗_q(k),ωr(k−1),ωr(k−2)anditsvectorformisrepresentedby

X=[i∗_q(k),ωr(k−1),ωr(k−2)]T (11)

Furthermore,themultivariateGaussianfunctionisusedastheactivatedfunctioninhiddenlayerofRBFNN,andits formulationisshownasfollows.

hr=exp  −||X−cr||2 2σ2 r  , r=1,2,3,4,...p (12)

wherecr=[cr1,cr2,cr3]T,pisthenumberofneuroninhiddenlayer,σrdenotesthenodecenterandnodevarianceof

rthneuron,and||X−cr||isthenormvaluewhichismeasuredbytheinputsandthenodecenterateachneuron.And

thenetworkoutputinFig.3canbewrittenas ωrbf =

p



r=1

wrhr (13)

whereωrbfistheoutputvalue;wrandhraretheweightandoutputofrthneuron,respectively.

Theinstantaneouscostfunctionisdefinedasfollows. J=1 2(ωrbf−ωr) 2 1 2e 2 nn (14)

Accordingtothegradientdescentmethod,thelearningalgorithmofweights,nodecenterandvarianceareasfollows:

wr(k+1)=wr(k)+ηenn(k)hr(k) (15) crs(k+1)=crs(k)+ηenn(k)wr(k)hr(k)Xs(k)−crs(k) σ2 r(k) (16) σr(k+1)=σr(k)+ηenn(k)wr(k)hr(k)||X(k)−cr(k)|| 2 σ3 r(k) (17) wherer=1,2,...p,s=1,2, 3andηisalearningrate.Further, the(∂ωr/∂i∗q)isJacobiantransformationandcanbe

derivedfromFig.3and(12) ∂ωr ∂i∗_q ≈ ∂ωrbf ∂i∗_q = p  r=1 wrhr cr1−i∗q(k) σ2 r (18) 2.2.3. Referencemodel(RM)

SecondordersystemasfollowsisusuallyconsideredastheRMintheadaptivecontrolsystem ωm(s) ω_r∗(s) = ω_n2 s2_+2ςω ns+ω2n (19)

whereωnisnaturalfrequencyandςisdampingratio.Furthermore,applyingthebilineartransformation,(19)canbe

transformedtoadiscretemodelby ωm(z−1)

ω∗_r(z−1) =

θ0+θ1z−1+θ2z−2

1+φ1z−1+φ2z−2

(20) andthedifferenceequationiswrittenas.

ωm(k)=−φ1ωm(k−1)−φ2ωm(k−2)+θ0ω∗_r(k) +θ1ω∗_r(k−1)+θ2ω∗_r(k−2) (21)

2.2.4. AdjustingmechanismofFC

Thegradientdescentmethodisused toderivetheNFClearninglawinFig.1.TheadjustingmechanismofFC parameters is to minimize the square error between the rotor speed and the output of the reference model. The instantaneouscostfunctionisfirstlydefinedby

Je  1 2e 2₌ 1 2(ωm−ωr) 2 (22) andtheparametersofcm,nareadjustedaccordingto

cm,n∝− ∂Je

∂cm,n =−α

∂Je

∂cm,n

(23) whereαrepresentslearningrate.Secondly,thechainruleisused,andthepartialdifferentialequationforJe in(22)

canbewrittenas ∂Je ∂cm,n =−e ∂ωr ∂uf ∂uf ∂cm,n (24) Further,from(10)andusingtheJacobianformulationfrom(18),wecan,respectively,get

∂uf(k) ∂cm,n(k) =dn,m (25) and, ∂ωr ∂uf ≈(KP+Ki )∂ωrbf ∂i∗_q =(KP+Ki) p  r=1 wrhr cr1−i∗q(k) σ2 r (26) Therefore,substituting(25)and(26)into(24),theparameterscm,noffuzzycontrollerdescribedin(10)canbeadjusted

bythefollowingexpression.

cm,n(k)=αe(k)(Kp+Ki)dn,m p  r=1 wrhr cr1−i∗q(k) σ_r2 (27) withm=j,j+1andn=i,i+1.

3. DesignofFPGA-basedspeedcontrollerforPMSMdrive

TheinternalarchitectureoftheproposedFPGA-basedspeedcontrollerforPMSMdriveisshowninFig.4.The inputsof thiscontrollerare speedcommand ω_r∗,rotor speedωr, fluxangle θe,measured three-phasecurrents(ia,

ib,ic), andthe output isPWM command.The speed controller mainlyincludesa NFC-basedspeed controller, a

currentcontrollerandcoordinatetransformation(CCCT),aSVPWMgeneration,frequencydivider,etc.Thesampling frequencyofcurrentandspeedcontrolisdesignedwith16kHzand2kHz,respectively.Theinputclockis50MHzand thefrequencydividergenerates50MHz(Clk)and12.5MHz(Clk-step)clocktosupplyallmodulesoftheFPGA-based speedcontroller.AllmodulesinFig.4aredescribedbyVHDLandsimulatedinModelSim.TheFPGAresourceusages ofCCCT,SVPWMandNFCcontrollerinFig.4,withtheexampleofAltera–CycloneEP2C70,need647LEs(logic

Clk [11..0] [11..0] Frequency divider CK PWM 1 PWM 2 PWM 3 PWM 4 PWM 5 PWM 6

FPGA-Based Speed Controller

Current controllers

and coordinate transformation (CCCT) e θθ [11..0] * q i [11..0] a i b

i

i

ω

ω

ω

ω

ModelSim

Fig.4.InternalcircuitoftheproposedFPGA-basedspeedcontrollerforPMSMdrive.

designsofCCCTandSVPWMreferto[7].Thefollowingparagraphsfocus onthedescriptionof circuitdesignin NFCwithdetail.

3.1. Finitestatemachine(FSM)method

Toreducetheuseofthehardwareresource,finitestatemachine(FSM)isadoptedtomodelthecomputingprocess ofalgorithm.Herein,thecomputationofthesumofproduct(SOP)shownbelowistakenasanexampletopresentthe

advantageofFSM.

Y =a1×x1+a2×x2+a3×x3 (28)

TwokindsofdesignmethodarepresentedtorealizethecomputationofSOP.Thereareparallelprocessingmethodand sequentialexecutionmethod.ParallelprocessingwiththedesignedSOPcircuitisshowninFig.5(a),whichwilloperate continuouslyandsimultaneously.TheSOPcircuitrequires2 adders,3multipliers,andmerelynearoneclocktime tocompletetheoverallcomputation.Withtheadvantageoffastcomputationability,theparallelprocessingmethod, however,consumesmuchmoreFPGAresources.Tosolvethisproblem,asequentialexecutionmethodusingFMSto modelSOPcircuitisadoptedandshowninFig.5(b).TheFSMmethodusesoneadder,onemultiplierandmanipulates 5steps (or 5clocks time)machinetocarryoutthe overall computationofSOP. Compared toparallelprocessing method,theFSMmethodrequiresmoreoperationtime(ifoneclocktimeis80ns,5clocksneeds0.4␮s)inexecuting SOPcircuit;nevertheless,itdoesnotlossanycomputationpower.Asaresult,themorecomplicatedcomputationin algorithm,themoreFPGAresourceswillbesavedbyapplyingFSMmethod.Besides,thestatediagraminFig.5(a) iseasytobedescribedbyVHDL.

x

x

x

a

x

a

x

a

x

+

+

y

xx

xx

xx

a

x

a

x

a

x

++

++

y

x s₂ s3 r 12 a + 11 a x s₄ s₅ r + 10 a x s6 s7 r + 9 a x s₈ s9 r + 8 a x s₁₀ s11 r + 7 a x s₁₂ r x s₁₄ s₁₅ 1 y + 5 a x s16 s17 r + 4 a x s₁₈ s₁₉ r + 3 a x s₂₀ s₂₁ r + 2 a x s₂₂ s₂₃ r + 1 a x s24 s25 r + 0 a 1 y r SL(4) r h s₂₆ u u≥4 SR(2) Y N s₁₃ + 6 a 0 = r h s₀ s₁ s₂₇ Fig.6.StatediagramofanFSMfordescribingtheexponentialfunction.

3.2. Behaviordescriptionofexponentialfunction

AccordingtothearchitectureofhiddenlayerinRBFNNin(12),itneedstocomputetheexponentialfunctionand isdefinedasfollows hr =exp  −||X−cr||2 2σ2 r   exp(−u) (29)

Tosimplifythecomputation,theinputofexponentialfunctionislimitedwithin0–4becauseifu≥4theoutput hr≤exp(−4)=0.0183willapproximatetozero,otherwiseif0≤u<4,(29)canbecomputedbyusingTaylorexpansion

series. hr =exp(−u)= ∝  n=0 (−1)nun n! ≈ 12  n=0 (−1)nun n! (30)

The12thorderisselectedin(30).Tonormalizetheinputvalue,wedefine(r=u/4)andtoavoidthenumericaloverflow conditionduringcomputation,(30)isdividedby16.Therefore,(30)becomes

hr =16exp(−4r) 16 ≈16 12  n=0 (−1)n4 n−2_rn n! 16 12  n=0 anrn (31) wherean(−1)n(4n−2/n!)bya0=0.00625,a1=−0.25,...,a12=0.00218909.

Sequentialexecutionishereinadoptedtoevaluatethepolynomialofdegreetwelvein(31),andwetransfertheform of(31)asfollowsforeasysequentialcomputation.

hr =16((((((((((((a12r+a11)r+a10)r+a9)r+a8)r+a7)r+a6)r+a5)r+a4)r+a3)r (32)

+a2)r+a1)r+a0)

FSMisemployedtomodelthepolynomialformin(32)anditisshowninFig.6,whichusesoneadder,onemultiplier, onecomparatorandtwoshiftersaswellasmanipulates28stepsmachinetocarryouttheoverallcomputation.The SR(2)andSL(4)inFig.6representrightshiftwith2-bitandleftshiftwith4-bit,respectively.Themultiplierandadder applyAlteraLPM(libraryparameterizedmodules)standard.TheFSMcanbeeasilydescribedbyVHDL.Moreover, theoperationofeachstepinFig.6canbecompletedwithin80ns(12.5MHzclock);thereforetotal28stepsonlyneed 2.24␮soperationaltimes.

3.3. BehaviordescriptionofaneuroninRBFNN

Afterdescribingthebehaviorofexponentialfunction,wefurtherapplyitinthebehaviordescriptionofcomputing aneuroninRBFNN.IneachneuroninFig.3,itneedstoperformthefunctionofcomputingthemutivariateGaussian

x

+

+

+

x

x

+

x

+

x

_x

x

x

₊

x

x

x

+

x

+

x

+

x

+

s

s

s

s

s

s

s

~s

s

s

s

s

s

s

s

s

s

s

s

s

s

s

s

s

s

s

Computation of norm value by the inputs

and node centers

Outputs of RBF NN and Jacobian

at rth_neuron

Update the weight

value

Update the variance Update the node center

Fig.7.StatediagramofanFSMfordescribingrthneuroncomputationinRBFNN.

functionin(12),individualnetworkoutputin(13),individualJacobianvaluein(18)andindividualparameterslearning in(15)–(17).Accordingtothisrequirements,FSMfordescribingrthneuroncomputationinRBFNNispresentedin

Fig.7whichtheinputsarei∗_q(k),ωr(k−1),ωr(k−2)andoutputsareOr(individualnetworkoutput)andJr(individual

Jacobian value).Further, inFig. 7, stepss0–s5 execute the computationof normvalue; steps s6–s35 describe the

computationofexponentialfunctionandtheoutputsofindividualnetworkoutputandJacobianvalue;stepss36–s38are

theweightupdate;stepss39–s41arethevarianceupdateands42–s51arethenodecenterupdate.Theoperationofeach

stepinFig.7canbecompletedwithin80ns(12.5MHzclock);thereforetotal52stepsonlyneed4.16␮soperational times.InFig.7,exceptexponentialfunction,thedividerisalsoacomplicatedcomponentinhardwareimplementation. Herein,wedirectlyadoptAlteraLPMstandardtorealizeit.Fig.8showsaVHDLexampletodescribethedivider computationofY=A/B.ThedataformatoftwoinputsA,BandoneoutputYallbelongtothe16bits,Q15andsigned number.Thedividercomponentadopts32bitsoperationwithsignedrepresentation.TheinputsA,Bfirstlyneedto sign-extensionto32bits, thensenttothedividercomponentandobtaina32bitsoutputof sat.Finally,thedivider outputofYisextractedfrom16thbitdownto1stofsat.Theresourceusageofa32bitsdividercomponentinFig.8, withtheexampleofAltera–CycloneEP2C70,needs980LEs.

3.4. BehaviordescriptionofNFC

AfterdescribingthebehaviorofaneuroninRBFNN,wefurtherapplyitinthebehaviordescriptionofcomputing aNFC.Intheproposedsystem,thenumberofneuroninhiddenlayerischosenbythree.TheFSMemployedtomodel theNFC-basedspeedcontrollerisshowninFig.9,whichusesoneadder,onemultiplier,threeneuroncomputational blocks(thedetailforeachoneisshowninFig.7),someregisters,etc.andmanipulates92stepsmachinetocarryoutthe overallcomputation.Thedatatypesaredesignedwith16-bitlength,twocomplementsandQ15format.Themultiplier

LIBRARY IEEE;

USE IEEE.std_logic_1164.all; USE IEEE.std_logic_arith.all; USE IEEE.std_logic_signed.all; LIBRARY lpm;

USE lpm.LPM_COMPONENTS.ALL; ENTITY DeviderIS

port ( clk,clk_D : IN STD_LOGIC;

A,B : IN STD_LOGIC_VECTOR(15 downto0); Y : OUT STD_LOGIC_VECTOR(15 downto0) ); END Devider;

ARCHITECTURE Devide_archOF DeviderIS

SIGNAL devideA,devideB :STD_LOGIC_VECTOR(31 downto0); SIGNAL sat :STD_LOGIC_VECTOR(31 downto0); SIGNAL CNT :STD_LOGIC_VECTOR(7 downto 0); BEGIN

m1: lpm_divide GENERIC

MAP (LPM_WIDTHN=>32, LPM_WIDTHD=>32, LPM_PIPELINE=>1,

LPM_NREPRESENTATION=>"SIGNED", LPM_DREPRESENTATION=>"SIGNED") PORT MAP (numer=>devideA,denom=>devideB,clock =>clk,quotient=>sat);

GEN:BLOCK BEGIN PROCESS(CLK_D) BEGIN

IF clk_D'EVENTand clk_D='1' THEN CNT<=CNT+1; IF CNT=X"00" THEN devideA<=A&X"0000"; IF B(15)='0' THEN devideB<=X"0000"&B; ELSE devideB<=X"FFFF"&B; END IF; ELSIF CNT=X"01" THEN Y<=sat(16 downto 1); CNT <=X"00"; END IF; END IF; END PROCESS; END BLOCK GEN; END Devide_arch;

Fig.8.ExampleofdividercomputationusingVHDL.

andadderapplyAlteraLPMstandard.AlthoughthealgorithmoftheNFCishighcomplexity,theFSMcangivea veryadequatemodelingandeasilybedescribedbyVHDL.InFig.9,stepss0–s5executethecomputationofreference

modeloutput;stepss6–s7areforthecomputationofspeederroranderrorchange;stepss8–s12executethefuzzification

andlook-upfuzzytable;s13–s21areforthedefuzzification;s22–s25arethecomputationofcurrentcommand;s26–s81

describethecomputationofRBFNNandJacobianvaluebyusingthreeparallelneuroncomputationalblock;finally s82–s91executethetuningoffuzzyruleparameters.TheoperationofeachstepinFig.9canbecompletedwithin80ns

(12.5MHzclock);thereforetotal92stepsonlyneed7.36␮soperationaltimes.Itdoesnotlossanycontrolperformance fortheoverallsystembecausetheoperationtimewith7.36␮sislessthanthesamplinginterval,500␮s(2kHz),ofthe speedcontrolloopinFig.1.Finally,theexecutiontimeofNFCinsoftwarebyusingNiosIIprocessorisevaluatedand itis1190.8␮s.ItshowsthatthecomputationalpowerinhardwareofFPGAisabout160timesfasterthaninsoftware byusingNiosIIprocessor.

4. Simulationresults

TheNFC-basedspeedcontrolblockdiagramforPMSMdriveisshowninFig.1anditsSimulink/ModelSim co-simulationarchitectureispresentedinFig.10.TheSimPowerSystemblocksetintheSimulinkexecutesthePMSM

andthe inverter.TheEDA simulator linkfor ModelSimexecutes theco-simulation using VHDL coderunning in

ModelSimprogramwithtwoworks.Thework-1ofModelSiminFig.10performsthefunctionofspeedloopneural fuzzy controller (NFC) andthe work-2 executes the function of current controller and coordinate transformation

(CCCT)andSVPWM.AllworksinModelSimaredescribedbyVHDL.Thesamplingfrequencyofcurrentandspeed

controlisdesignedwith16kHzand2kHz,respectively.Theclocksof50MHzand12.5MHzwillsupplyallworks ofModelSim.ThedesignedPMSMparametersusedinsimulationarethatpolepairsis4,statorphaseresistanceis 1.3,statorinductanceis6.3mH,inertiaisJ=0.000108kgm2andfrictionfactorisF=0.0013Nms.

Toevaluatetheeffectivenessoftheproposedcontrolalgorithm,threetestedcaseswithvariousPMSMparameters areconducted,inwhich

Case1:(normal-loadcondition)

J=0.000108, F =0.0013 (33)

CaseII:(light-loadcondition)

J=0.000108/3, F =0.0013/3 (34)

CaseIII:(heavy-loadcondition)

J=0.000108×3, F =0.0013×3 (35)

Theco-simulationiscarriedoutinFig.10.ThecontrolobjectiveistocontroltherotorspeedofPMSMtotrackthe outputof thereferencemodel.Inthe caseof theFCdesign,themembershipfunctionandthefuzzyruletableare

Fig.9.StatediagramofanFSMfordescribingtheNFCinspeedloopcontrollerofPMSMdrive.

designedinFig.11.Besides,theparametersofPIcontrollerinFig.1areselectedasKp=1andKi=0.025.Square

waveswithperiodof0.16sandmagnitudevariationfrom0to500rpmupto1000to1500rpmisadoptedasatested inputcommand.ToevaluatethetrackingperformanceofFCatvarioussystemconditions,thesystemparametersare initiallydesignedatthe normal-loadcondition (CaseI),andthe simulation resultisshowninFig. 12. Itpresents agoodspeedfollowingresponseinFig.12(a)andacompletecurrentdecoupledeffectinFig.12(b). Therefore,a desiredrotorspeedresponsewiththecharacteristicsofnoovershoot,0.017srisingtimeandzerosteady-statevalue, whichapproximatesthespeedresponsecurveinFig.12(a),isconsideredasacomparatorcurvewhilePMSMruns atdifferentcondition.However,whenthesystemparameterschangetothelight-load(CaseII)andheavy-load(Case

Fig.10.SimulinkandModelSimco-simulationarchitectureforNFC-basedspeedcontrolofPMSMdrive.

III)condition,thespeedandcurrentresponsesareshowninFigs.13and14.TherotorspeedresponseinFig.13lags behindthedesiredrotorspeedresponsewithalargeovershootconditionandinFig.14isaheadofthedesiredrotor speedresponsewithasmallovershootcondition.Itshowsthattherotorspeedresponseisgreatlyaffectedbysystem parametersvariationifthespeedcontrollerusesFConly.

Tocopewiththesystemuncertaintyproblem,aNFCisadoptedinFig.1.TheNFCconsistsofaFC,aRManda RBFNNbasedadjustingmechanism.TheRBFNNisappliedtoreal-timeidentifytheplantdynamicforprovidingan exactplantinformationtothelearningalgorithmofFC.Thedesiredrotorspeedresponsewiththecharacteristicsofno

Fig.12.SimulationresultswhenFCisusedandPMSMisoperatedatnormal-loadcondition.

Fig.13.SimulationresultswhenFCisusedandPMSMisoperatedatheavy-loadcondition.

Fig.15.SimulationresultswhenNFCisusedandPMSMisoperatedatheavy-loadcondition.

overshoot,0.017srisingtimeandzerosteady-statevalueinFig.12isconsideredtodesignthetransferfunctionofthe RM.Accordingtotherequiredspecifications,asecondordersystemwiththenaturalfrequencyof230rad/sandthe dampingratioof1ischosen.Then,afterapplyingthebilineartransformationwithsamplingfrequencyof2kHz,the parametersofthedifferenceequationin(21)areobtainedbyθ0=0.00295,θ1=0.0059,θ2=0.00295,φ1=−1.7825,

andφ2=0.7943.InNFCdesign,theinitialfuzzyparametersinFig.11isthesameastheFC,butthefuzzyparameters

ofthecm,ncanbetunedusing(27)iftheoutputofrotorspeedcannotfollowtheoutputofRM.Thelearningrateαisset

as0.3.TheinitialparametersinRBFNNarechosenbywr =10,σr=250,cr1=cr2=cr3=250,wherer=1,2,3.The

learningrateηinRBFNNissetas0.15.Insimulation,squarewaveswithmagnitudevariationfrom0to500rpmup to1000to1500rpmisadoptedasatestedinputcommandanditssimulationresultsunderheavy-loadandlight-load conditionare presentedinFigs. 15and16,respectively.In Fig.15,inthebeginningtime,theFCisappliedtothe speedloopofPMSMdrivesystemandtherotorspeedshowsalagandanovershootresponse.After0.14s,theNFCis adopted.Meanwhile,thecm,nparametersaretunedtoanadequatevalueforreducingtheerrorbetweentherotorspeed

andtheoutputofRM.Finally,therotorspeedcanaccuratelytrackwellafteronecyclelearning.InFig.15(b),itexhibits thatthecurrentiqneedtogeneratealargercurrentvaluetoforcethemotorrunningspeedtofasttracktheoutputof

RM.Similarresultsappearinthelight-loadconditioninFig.16.Additionally,twoanothertransitionconditions,which

Fig.17.SimulationresultswhenNFCisusedandPMSMisoperatedvaryingfromnormal-loadconditiontoheavy-loadcondition.

externloadischangedfromnormal-loadtoheavy-loadandfromnormal-loadtolight-loadcondition,areconsidered andevaluated,andthesimulatedresultsareshowninFigs.17and18.Intheformercase,thecontrolcurrent iqin

transitionconditionsof Fig.17(b)isapparentlyincreasedtospeedupthemotorrunning,butinthelattercase,the controlcurrentiqintransitionconditionsof18(b)isdecreasedtoslowdownthemotorrunning.However,itshows

thatduetothetuningofcontrolcurrentiqbyNFC,theoutputofrotorspeedinFigs.17(a)and18(a)cantrackthe

desiredspeedwell.Therefore,thesimulationresultsinFigs.12–18demonstratethattheproposedNFC-basedspeed controllerforPMSMdriveiseffectiveandrobust.

5. Conclusions

ThisstudyhaspresentedaFPGA-basedNFCcontrollerforPMSMdrivesandsuccessfullydemonstratedits per-formance through co-simulationby using SimulinkandModelSim.In control algorithm,tocopewiththe system uncertainty,aNFCisproposedandaRBFNNisusedtoidentifytheplantdynamicandprovidedmoreaccuracyplant informationforparameterstuningof FC.Inrealization,asequentialexecutionusingFSMisappliedtomodelthe computingprocessofNFCforreducingtheFPGAresourceusage.Undertheproposeddesignmethod,theexecution timeandFPGAresourceusageforcomputingaNFCspendonly7.36␮sand13,806LEs,respectively.Itnotonly does notlossany controlperformancefor theoverallsystem,butalso cangreatlysavethe FPGAresourceusage. Atlast,somesimulationresultsdemonstratethatinstepresponse,thespeedofPMSMcanfasttracktheprescribed dynamicresponseaccuratelyaftertheproposedcontrollerhasbeenconducted.However,afterconfirmingtheeffective

ofVHDLcodeofNFC-basedspeedcontrollerinco-simulationbyusingSimulinkandModelSim,theVHDLcode

exceptA/DandQEPinterfacecircuit,canbedirectlyusedintheexperimentalFPGA-basedPMSMdrivesystemfor furtherverifyingitsfunctioninthefuturework.

Acknowledgment

ThisworkwassupportedbyNationalScienceCounciloftheR.O.C.undergrantno.NSC100-2221-E-218-001.

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