Phase Feedforward Control for Single-Phase Boost-Type SMR
Hung-Chi Chen, Member, IEEE, Heng-Yi Li, and Ru-Shiuan Yang
Abstract—In this letter, a phase feedforward control (PFFC) for a single-phase boost-type switching-mode rectifier is addressed. In the conventional input voltage feedforward loop, the feedforward signal is fixed regardless of the load level. The proposed phase feedforward signal adjusts according to the load level without sens-ing the load current. The simulated and experimental results also demonstrate the effectiveness of proposed PFFC. Compared to a conventional feedforward signal, relatively small proportional gain can be used in the proposed PFFC without loss of current tracking performance, which would also increase the overall system immu-nity against noise.
Index Terms—AC–DC power conversion. I. INTRODUCTION
T
HE USE of switching-mode rectifier (SMR) with power factor correction (PFC) function is an effective mean to perform the qualified ac/dc conversion. In general, the PFC function includes the input current waveform shaping and the output dc voltage regulation.The boost-type SMRs are the most popular circuit topology among all the others for their continuous current in the front-end inductors [1]. In a boost-type SMR, large-scale input voltage variation can be seen as a disturbance. It follows that input voltage feedforward loops [2]–[6] for boost-type SMRs can be found often in the literature.
The concept of the input voltage feedforward loop is to gen-erate a “nominal duty ratio pattern” from the rectified input voltage. This nominal duty ratio pattern effectively produces an average voltage across the switch equal to the instantaneous rectified input voltage. However, it is noted that this nominal duty ratio pattern is fixed regardless of load condition [3]–[5], i.e., the conventional input feedforward signal at heavy load is the same as that at light load. It implies that the performance of current shaping function would be degraded at heavy load. To overcome it, several load feedforward loops without sensing load current had been proposed in [6], [7] where the load condi-tion is estimated from the reference current. The proposed phase feedforward control (PFFC) can be regarded as a combination of input voltage feedforward control and load feedforward control. In PFFC, the original phase feedforward signal is also gener-ated from the rectified input voltage and then delayed through
Manuscript received August 3, 2008; revised November 11, 2008, and January 6, 2009. Current version published May 15, 2009. This work was supported by the National Science Council in Taiwan under Grant NSC97-2221-E-009-184. Recommended for publication by Associate Editor J. Jatskevich.
The authors are with the Department of Electrical and Control Engineer-ing (ECE), National Chiao Tung University (NCTU), Hsinchu 30010, Taiwan (e-mail: [email protected]; [email protected]; [email protected]).
Digital Object Identifier 10.1109/TPEL.2009.2013953
Fig. 1. Power circuit of the boost-type SMR.
phase shifter according to the current reference magnitude. The larger the current magnitude is, the more the shifting phase of phase feedforward signal can be found. Compared to the conven-tional input voltage feedforward control, the proposed PFFC is able to adjust the feedforward signal according to the load level and relatively small proportional gain can be used to yield the desired current tracking performances and increase the overall system immunity against noise.
From the viewpoint of implementation, the proposed PFFC can also be seen as a combination of a phase shifter with varying phase and two “fixed gain” blocks. It is well-known that imple-menting a phase shifter with varying phase in analog circuit is significantly harder than that in a digital system [like DSP/field-programmable gate array (FPGA)]. Therefore, there is near-zero complexity added to the digital implementation of PFFC.
After the development of PFFC, we also find that the proposed PFFC can be seen as various implementations of the “full feedforward control,” and therefore, the performance improvement of PFFC is limited compared to [7]. However, implementing “full feedforward control” in analog circuits is easier than that in a digital system due to its calculation load of current loop, such as the PI current controller and derivative of the reference current. Therefore, “full feedforward control” is preferred in an analog circuit and the proposed PFFC is suitable for a digital PFC controller.
II. CONVENTIONALFEEDFORWARDCONTROL
Power circuit configuration of a boost-type SMR is shown in Fig. 1. The circuit mainly consists of a diode bridge rectifier and a boost-type dc/dc converter. The input voltage vs can be
ex-pressed by ˆVssin(2πfint), where finis the input line frequency.
To simplify the analysis, some assumptions are made.
1) The circuit components are lossless and the circuit in-cludes a reasonable bulk capacitor Cd.
2) The switching frequency ftri is significantly higher than
the line frequency fin. 0885-8993/$25.00 © 2009 IEEE
Fig. 2. Multiloop control with conventional feedforward loop.
As shown in Fig. 2, the multiloop control is composed of an inner current controller Gci(s) and an outer voltage controller
Gcv(s). In order to regulate the output voltage vd to desired command Vd∗, the reference input current peak ˆIs∗can be tuned by the voltage controller Gcv(s). Multiplying ˆIs∗ by the recti-fied sine signal s(t) =|sin(2πfint)| yields the desired inductor
current command i∗L as the reference current for inner current controller Gci(s). Then, the physical switching signal d(t) for
switch SW in Fig. 1 is generated by comparing the control sig-nal vcontand the triangular signal vtri at the comparator’s (+)
terminal and (–) terminal, respectively.
Because of the assumed bulk capacitor Cd and the use of an outer voltage controller, the output voltage vdin steady state can be assumed to be equal to the desired dc voltage vd = Vd∗. Thus, according to the state of the switch SW, the inductor voltage can be expressed by
vL =|vs| = ˆVssin(2πfint) , when SWON (1)
vL = ˆVssin(2πfint) − Vd∗, when SWOFF. (2) From Fig. 2, the conventional feedforward signal vcontf (i.e.,
the nominal duty ratio pattern) is formulated as
vcontf = 1−
ˆ
Vs
Vd∗|sin(2πfint)| . (3)
For the assumed significantly high switching frequency ftri,
the instantaneous value of |vs(t)| can be seen as fixed over each switching period. By considering the feedforward loop shown in Fig. 2, the control signal vcontnow is the sum of the
feedback control signal vcontband the input voltage feedforward
signal vcontf. Thus, the average duty ratio ¯d with conventional
feedforward loop now becomes ¯
d = vcontb+ 1−
ˆ
Vs
Vd∗|sin(2πfint)| . (4)
By using the time-averaging approach, the two aforemen-tioned equations can be combined to obtain the average induc-tor voltage through multiplying (1) by turning-ONtime ¯dTsand multiplying (2) by turning-OFFtime (1− ¯d)Ts, respectively.
vL = ˆVssin(2πfint) − (1 − ¯d)Vd∗. (5)
Fig. 3. Equivalent control model with conventional feedforward loop.
Fig. 4. Multiloop control with proposed phase feedforward loop.
Substituting (4) into (5) enables one to obtain the following simplified equation: vL = L diL dt = vcontbV ∗ d. (6)
Based on (6), the equivalent control model can be plotted in Fig. 3. It shows that the effect of large-scale input voltage variation had been removed from the control loop by introducing the feedforward signal vcontf. Obviously, the equivalent plant
model in the dashed line of Fig. 3 is a first-order model. It means that the simple proportion-type (P-type) controller can be used in the current controller Gci(s) = Kp. Then, the closed-loop transfer function of the inductor current becomes
iL(s) i∗L(s) = KpVd∗ KpVd∗+ Ls = 1 1 + (s/(KpVd∗/L)) . (7)
III. PROPOSEDPHASEFEEDFORWARDCONTROL
Fig. 4 shows the proposed PFFC for boost-type SMRs where its inner current controller is composed of a P-type feedback controller and a phase feedforward loop. Note that the phase feedforward signal vcontpf is generated from the input current reference magnitude ˆIs∗and the rectified signal s(t).
From Fig. 4, the phase signal θ varies with the input current reference magnitude ˆIs∗and can be expressed as
θ = 2πfinL
ˆ
Vs ˆ
Is∗. (8)
Then, the PFFC signal vcontpf now becomes
vcontpf = 1−
ˆ
Vs
Vd∗|sin(2πfint− θ)|
= 1− Vˆs
Fig. 5. Equivalent control model with proposed phase feedforward loop.
Assume that the phase θ in radians is near zero (θ≈ 0) and, therefore, sin θ≈ θ and cos θ ≈ 1. By applying the above as-sumption into (9), the phase feedforward signal vcontpf can be approximated as vcontpf ≈ 1 − ˆ Vs Vd∗|sin(2πfint)| + θVˆs Vd∗sgn(sin(2πfint)) cos(2πfint) (10)
where sgn(•) is the sign operator.
By replacing (3) and (8) into (10), we can approximate vcontpf
in terms of vcontf
vcontpf ≈ vcontf + ˆIs∗ 2πfinL
Vd∗ sgn(sin(2πfint)) cos(2πfint)
= vcontf + ∆vf (11)
where ∆vf denotes the difference between the proposed signal
vcontpf and the conventional signal vcontf. The average duty
ratio ¯d in Fig. 4 can now be expressed by
¯
d = (vcontb+ ∆vf) + vcontf. (12)
Then, we can substitute (12) into (5) and yield the following equation:
LdiL dt = V
∗
d(vcontb+ ∆vf). (13) Based on (13), the resulting equivalent current control dy-namic model is shown in Fig. 5, where the reference current amplitude ˆIs∗is also plotted. Compared to the conventional feed-forward loop, the proposed phase feedfeed-forward loop introduces an additional term ∆vf into the equivalent control model. As the output power increases, the reference current amplitude ˆIs∗also increases and thus, the proposed term ∆vf increases. It implies that the proposed PFFC can be referred to as a combination of input voltage feedforward control and load feedforward con-trol. Then, from Fig. 5, the closed-loop current tracking transfer function now becomes:
iL(s)
i∗L(s) = 1. (14)
By comparing (14) with (7), we can find that the performance of proposed PFFC has no relation to the current loop parameter. The proposed PFFC can be seen as a combination of a phase shifter and two “gain” blocks. In analog circuit, it is hard to
Fig. 6. Input currents for Kp= 0.597. (a) Without any feedforward loop.
(b) With conventional feedforward loop. (c) With proposed phase feedforward loop.
implement the phase shifter with varying phase. However, it is very easy to implement a phase shifter with varying phase in a digital system (like DSP/FPGA). Therefore, there is near-zero complexity added to the digital implementation of PFFC.
IV. SIMULATIONRESULTS
The circuit component values used are listed in Table I and a PI-type controller is used as the voltage controller to regu-late the output voltage. Substituting those parameters in Table I into (7) and choosing cutoff frequency fc= 5 kHz and fc =
0.5 kHz obtain the proportion gain of current controller Gci(s) =
Kp = 0.597 and Kp = 0.0597, respectively. For various propor-tion gain (i.e., various cutoff frequency), the simulated currents without any feedforward loop, with conventional feedforward loop, and with the proposed phase feedforward loop are plotted in Figs. 6 and 7, respectively.
Fig. 7. Input currents for Kp= 0.0597. (a) Without any feedforward loop.
(b) With conventional feedforward loop. (c) With proposed phase feedforward loop.
Obviously, we can find that the current waveforms are im-proved through including feedforward loops. When the cutoff frequency fc (=5 kHz) is far larger than the double line fre-quency 2fin (=100 Hz), the difference between the responses
of conventional feedforward loop and the proposed phase feed-forward loop is very small.
When the cutoff frequency fc (= 500 Hz) is close to the double line frequency 2fin(= 100 Hz), current responses in
Fig. 6(c) are very close to that in Fig. 7(c), which also shows the independence of proportion gain Kp on closed-loop response in (14). In addition, some current drops at zero-crossing points can be found in Fig. 7(b) and such current drops not only lead to the high current harmonics but also result in additional power loss from hard-switching of diode. Consequently, compared to a conventional feedforward signal, relatively small parameter Kp can be used in the proposed PFFC without loss of current track-ing performance, which would also increase the overall system immunity against noise.
V. EXPERIMENTALRESULTS
The proposed PFFC has been digitally implemented in a DSP-based system, where a PI-type voltage controller Gcv(s) is used.
The experimental circuit components had been listed in Table I. The sampling frequencies of the current loop and voltage loop are 25 kHz and 1 kHz, respectively.
A. Steady-State Performance
In order to illustrate the effectiveness of proposed PFFC, the load resistance RL = 80 Ω is chosen to deliver input power near 850 W and the parameter of the current controller is set
Fig. 8. Experimental input voltage and current for Kp≈ 0.0597. (a) With
conventional feedforward loop. (b) With proposed phase feedforward loop. TABLE II
MEASUREDTOTALCURRENTHARMONICDISTORTION(THDi) UNDER
VARIOUSLOADRESISTANCES ANDVARIOUSFEEDFORWARDLOOPS
Kp ≈ 0.0597. The measured input voltage vsand input currents
iswith conventional feedforward loop and with proposed phase feedforward loop are plotted in Fig. 8(a) and (b), respectively. By using digital power meter YOGOGAWA WT210, the measured total harmonic current distortion (THDi) values in Fig. 8(a) and (b) are 5.23% and 3.82%, respectively. It shows that with relatively low proportion gain, the proposed PFFC possesses better feedforward performance than the conventional one. The other measured THDivalues with various load resistances RL and various feedforward loops are tabulated in Table II.
Like the simulation, negligible difference of THDibetween two feedforward loops can be found by using a relatively high
Fig. 9. Measured waveforms during the load resistance change. (a) From
RL= 100 Ω to RL = 80 Ω. (b) From RL = 200 Ω to RL = 133 Ω (Top)
Output voltage. (Bottom) Input current and voltage.
proportion gain. But an obvious difference can be found with using smaller proportion gain Kp ≈ 0.0597, especially at high power (i.e., low load resistance). That is, small proportion gain
Kpcan be used in the proposed PFFC to increase the system im-munity against noise without loss of current dynamic response. In general, the quantized error of the input signal plays an important role in the experiment especially when the input signal is small. It follows that the quantized error of the inductor current at low load level is larger than it is at relatively high load level, which would result in the dependence of measured THDs on the load level.
In the conventional input voltage feedforward loop, the feed-forward signal is fixed regardless of the load level, but the pro-posed phase feedforward signal adjusts according to the load level. It follows that when the load level is small (i.e., light load), the differences between the two feedforward signals and their performances are small, which can be further confirmed from the close measured THD values at RL = 200 Ω.
Since the proposed feedforward signal changes according to the load level, we expect to obtain similar THD values at various load conditions. However, due to the decrease of the quantized error with the increase of load level, the measured THD value also decreases.
133 Ω (500 W) and then increases until RL = 100 Ω (675 W) due to the decrease of the quantized error with the increase of load level.
B. Transient Performance
To evaluate the transient performance of the proposed PFFC with Kp ≈ 0.0597, the measured waveforms during the load resistance change from RL = 100 Ω to RL = 80 Ω and during the change from RL = 200 Ω to RL = 133 Ω are plotted in Fig. 9(a) and (b), respectively. From Fig. 9, we can find that there is obvious voltage dip in the output voltage vd due to load change and then, the voltage controller regulates the output voltage to the voltage command V∗= 250 V by increasing the current magnitude ˆIs. It shows that the regulation performance of proposed PFFC is also acceptable.
VI. CONCLUSION
In this letter, the phase feedforward loop was proposed for digital implementation of PFC function. Based on the boost-type SMRs, the phase feedforward loop was derived in detail. By using the proposed phase feedforward loop, we can use a simple P-type current controller with relatively small gain and yield variable feedforward signals according to the load con-dition. Simulated and experimental results further demonstrate and confirm the benefits of the proposed PFFC, particularly for those applications whose current closed-loop cutoff frequency is close to the double line frequency.
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