Multiple Manufacturing Lines
Wen Lea Pearn, Yu Ting Tai, Chia Huang Wu, and Ching Ching Chuang
Abstract— In recent years, gold bumping process has been applied extensively for the package technology of liquid crystal display driver integrated circuit, which is an essential component in portable devices. Because the increasing requirement of high-definition display devices, the gold bumping process has become more difficult and it is requested to be of high quality with very low fraction of defectives. Unfortunately, conventional methods for product acceptance determination no longer work because any sample of reasonable size probably contains no defective gold bump product items. In addition, in the globally competitive manufacturing environment, gold bumping processes involving multiple manufacturing lines are quite common in the Science-Based Industrial Park in Hsinchu, Taiwan, because of economic scale considerations. In this paper, we provide analytical solutions to gold bump product acceptance determination, which provide both manufacturers and customers to reserve their own rights by compromising on a rule for gold bumping process with multiple manufacturing lines. For the convenience of inplant applications, we tabulate the number of required inspection units, the critical acceptance values for various manufacturer’s risks and consumer’s risks, and various number of manufacturing lines. For illustration purpose, a real application in a gold bumping factory, which is located in the Science-Based Industrial Park in Hsinchu, Taiwan, is included.
Index Terms— Gold bumping, manufacturing quality, process capability, product acceptance determination.
I. INTRODUCTION
L
IQUID crystal display (LCD) driver integrated circuit (IC) is a critical component in portable devices. In recent years, since increasing demand on higher resolution display in portable devices, such as smart phones and tablet PC, the requirement of precision process on display-related components have played an essential role. It is noted that the packaging technology of LCD driver IC has a significant influence on display performance [1]. For chip-on-glass (COG) package of LCD driver IC, gold bumping process is commonly used in many practical applications [2]. The COG technology Manuscript received May 1, 2013; revised August 6, 2013; accepted August 20, 2013. Date of publication September 23, 2013; date of current version October 28, 2013. Recommended for publication by Associate Editor B. Dang upon evaluation of reviewers’ comments.W. L. Pearn, C. H. Wu, and C. C. Chuang are with the Depart-ment of Industrial Engineering and ManageDepart-ment, National Chiao Tung University, Hsinchu 300-10, Taiwan (e-mail: [email protected]; [email protected]; [email protected]).
Y. T. Tai is with the Department of Information Management, Kainan University, Taoyuan 33857, Taiwan (e-mail: [email protected]).
Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TCPMT.2013.2279889
Fig. 1. Diagram of driver IC and bump.
Fig. 2. Bump cross-sectional configuration.
directly bonds the driver IC onto the thin film transistor glass substrate via anisotropic conductive adhesive Fig. 1 shows the part of a LCD driver IC and gold bump. To provide high-definition display devices, a sophisticated gold bumping process is applied to form fine pitch bonds in response to increased demands for more I/Os in smaller spaces. For instance, the LCD driver IC of full high definition (FHD, 1920× 1080 RGB) resolution needs 2200–2300 pads on outer lead bonding side and∼200 pads on inner lead bonding side. In gold bumping process, precise height of gold bump is needed to achieve high-resolution display [3]. While some pads with nonuniform gold bump heights, that should induce malfunction of display. Bump height is the height between the top of bump and the top of pad. The bump cross-sectional configuration is shown in Fig. 2. The stagger gold bumps in outer lead bonding side are shown in Fig. 3. Because the gold bumping process requires very low fraction of defectives in parts per million (ppm), traditional methods for calculating the fraction nonconforming no longer work. For instance, the required fraction for defectives of gold bump is often<0.01%. Hence, any sample of reasonable size will probably contain no defective product items.
Process capability indexes (PCIs) are the alternative meth-ods that have been popularly employed in manufacturing yield assessment and quality assurance when process requires very 2156-3950 © 2013 IEEE
Fig. 3. Diagram of stagger gold bumps.
low fraction of defectives and reaches ppm level. Capability measures for processes with a single manufacturing line have been investigated extensively [4]–[7]. In the gold bumping process, inevitable process variance changes or mean shifts may not be detected within short time. In [3] and [8], the yield assessment methods are incorporated the magnitudes of the undetected variance changes or mean shifts to avoid overestimating manufacturing yield. Additionally, gold bumps have multiple characteristics having effects on the process yield. To obtain accurate yield assessment [9] proposed a overall yield measure index CpkT , which is a generalization of the index Cpk, and a natural estimator ˆCpkT of CpkT. The existing literature on gold bumping processes is, however, restricted to discuss single manufacturing line. In most of the globally competitive packaging factories, a gold bumping process with multiple manufacturing lines is common, particularly, for the factories in the Science-Based Industrial Park in Hsinchu, Taiwan. In those packaging factories, a gold bumping process with multiple manufacturing lines consists of multiple parallel independent manufacturing lines, with each manufacturing line having a machine or a group of machines performing necessary identical job operations.
In this paper, we provide an analytical solution to product acceptance determination based on the exact yield index SpkM for the gold bumping process with multiple manufacturing lines because product acceptance determination is an important part of the supply chain management. This paper is organized as follows. The gold bumping manufacturing process is first presented in Section II. To be practical and convenient to obtain the analytic solution in product acceptance determina-tion for the gold bumping process with multiple manufacturing lines, we provide an implementation procedure and closed-form closed-formulas to obtain analytic solutions in Section III. In Section IV, to demonstrate the applicability of the method, we consider a real-world application taken from a gold bumping factory, which is located in the Science-Based Industrial Park in Hsinchu, Taiwan. Finally, Section V provides the conclusion.
II. GOLDBUMPINGMANUFACTURINGPROCESS In a gold bumping process, it uses thin film deposi-tion, photolithography, and electroplating processes to form gold bumps on pads. There are eight operations involv-ing RF clean, TiW/Au sputter, photoresist (PR) coatinvolv-ing, photo process, Au plating PR stripping, Au/TiW etching, and thermal anneal. Through these operations, the heights
Fig. 4. Diagrams of inconsistent bump height.
Fig. 5. Diagram of gold bump overhang.
Fig. 6. Side view of nonuniform bump height.
of gold bumps are decided. In the gold bumping manu-facturing process, bump height is one of the most critical specifications because pads with inconsistent heights of gold bump should induce malfunction of display and poor display performance.
Because high-definition display devices have become the current trend, the requirements of high-pin-count LCD driver ICs will increase the difficulties of gold bumping manufac-turing processes. In FHD 1920× 1080 RGB products, any pad of these 2200 pads with shorter or higher bump height would induce open failure while mounting the driver IC onto a glass substrate. Figs. 4 and 5 show the inconsistent bump heights and overhang, respectively. These situations may induce higher resistance. In addition, the cost of gold becomes more expensive in recent years. This phenomenon makes that the designers of LCD driver IC accelerate to reduce the cost of gold in gold bumping manufacturing process to be competitive. Therefore, specifications of gold bump height would set to be tighter (from 12 to 9 μm). This change also, however, enhances the difficulties of the gold bumping man-ufacturing process. Fig. 6 shows that nonuniform gold bumps occur.
To make sure thousands of bumps of a die being fall within the tighter specification, the customers (driver IC design house) desire that all the bumps are inspected. These requests, however, cause that gold bumping manufacturers pay more efforts. Then, the outsourcing fee may be raised. Therefore, to make sure the gold bump products to be of high quality with very low fraction of defectives to produce the qualified LCD driver IC for high-definition display devices with tighter spec-ifications, a more accurate product acceptance determination
paper, we focus on the product acceptance determination with multiple manufacturing lines for gold bumping manufacturing processes.
III. PRODUCTACCEPTANCEDETERMINATION FOR GOLDBUMPINGPROCESSWITHMULTIPLE
MANUFACTURINGLINES
Product acceptance determination is the problem of deter-mining whether the manufactured product should be accepted or rejected based on the inspected sample data, under the designated risks given by the manufacturer and the cus-tomer. Because bump height is an essential characteristic of a gold bumping process, which requires very low frac-tion of defectives in ppm, a well-designed sampling plan is significantly critical for product acceptance determination in global supply chain management. In the product accep-tance determination, it cannot avoid the manufacturer’s risk of rejecting good product (α-risk) or customer’s risk of accepting bad product (β-risk). For product quality protection and company’s considerations, both the manufacturer and customer would focus on two designated points on operat-ing characteristic (OC) curve to reflect their benchmarkoperat-ing risk [10].
Product acceptance determination has been widely dis-cussed and investigated by many quality assurance practi-tioners and has received substantial research attention. Suresh and Ramanathan [11] and Arizono et al. [12] presented the classical acceptance sampling plans. Pearn and Wu [13], [14] developed an effective procedure to deal with the product acceptance determination problem for normally distributed processes with one-sided and two-sided specifications. Wu and Pearn [10] presented a variables sampling plan based on Cpmk for product acceptance determination. The existing research has however, focused on processes with single manu-facturing line. Unfortunately, their results cannot be applied in the gold bumping process with multiple manufacturing lines directly.
A yield measurement index Spk for normal processes with single manufacturing line is provided in [15]. For exact manufacturing yield calculation, [16] proposed a new overall capability index (SpkM) for processes with multiple independent lines, which is defined as follows:
SpkM = 1 3 −1 ⎧ ⎨ ⎩ ⎡ ⎣1 k k j=1 (2(3Spkj) − 1) + 1 ⎤ ⎦2 ⎫ ⎬ ⎭ (1)
where Spkjis the Spkvalue of the j th lines for j = 1, 2, . . . , k and k is the number of manufacturing lines. The function is the cumulative distribution function of the standard normal distribution. It is noted that the exact distribution of the over-all yield index ˆSpkM defined above is analytically intractable. Tai et al. [16] used the Taylor expansion technique to obtain
pk shorter simple form as follows:
ˆSM pk ∼ N ⎛ ⎝SM pk, D2φ2(3D) 2k2nφ23SM pk ⎞ ⎠ (2) where D= 1 3 −1k23SM pk − 1− (k − 2) 2 . Because the gold bumping manufacturing process is com-monly with multiple manufacturing lines in factories, the SpkM index can be used as a quality benchmark for gold bump prod-uct acceptance. Consider a sampling plan for the gold bump products with the very low fraction of nonconforming parts. A gold bump acceptance determination procedure focuses on two designated points: 1) acceptable quality level (AQL, 1−α) and 2) lot tolerance percent defective (LTPD, β) on the OC curve. It should be noted that AQL and LTPD are levels of the product fraction of defectives that correspond to acceptable and rejectable quality levels.
Because the AQL is a standard that is used to determine whether the gold bump products should be accepted or not, it is hoped that the manufacturer’s process is considerable better than the AQL. To determine whether a given gold bumping process is capable, the null hypothesis with process fraction of defectives, H0: p ≤ AQL, is equivalent to test PCI with
H0: SpkM ≥ CAQL, where CAQLis the level of acceptable quality for SpkM index corresponding to the gold bumping process or process fraction of defectives AQL. For manufacturers and customers, two conditions are considered
Pr{Reject the gold bump product|p ≤ AQL} = PrReject the gold bump productSpkM ≥ CAQL
≤ α (3) Pr{Accepting the bump product|p ≥ LTPD}
= PrAccepting the bump productSpkM ≤ CLTPD
≤β (4) where CLTPD is the gold bump capability requirement corre-sponding to the LTPD on the basis of SM
pk index.
That is, the probability of rejecting acceptable gold bump products is no more than α. Simultaneously, the probability of accepting unqualified gold bump products is no more thanβ. Our purpose is to solve the two simultaneous equations mentioned earlier, and then obtaining the required inspection sample size n and the critical acceptance value c0of SpkM. These two conditions can be satisfied by the following two equations:
S1(n, c0) = ∞ c0 1 2π D2 1φ2(3D1) 2k2nφ2(3C AQL) × exp ⎡ ⎣
−
(
x−CAQL)
2 2 D21 φ2(3D1) 2k2nφ2(
3CAQL)
⎤ ⎦ dx −(1−α). (5)Fig. 7. (a) Surface plot of S1(n, c0). (b) Contour plot of S1(n, c0).
Fig. 8. (a) Surface plot of S2(n, c0). (b) Contour plot of S2(n, c0).
Fig. 9. (a) Surface plot of S1and S2. (b) Contour plot of S1and S2.
S2(n, c0) = ∞ c0 1 2π D22φ2(3D 2) 2k2nφ2(3C LTPD) × exp ⎡ ⎣
−
(x−CLTPD) 2 2 D22 φ2(3D2) 2k2 nφ2(3CLTPD) ⎤ ⎦ dx −β. (6)For CAQL = 1.33 and CLTPD = 1.00, Figs. 7(a) and (b) and 8(a) and (b) show the surface and contour plots of (5) and (6), respectively, with α-risk = 0.05 and β-risk = 0.01.
Fig. 9(a) and (b) shows the surface and contour plots of (5) and (6) simultaneously withα-risk = 0.05 and β-risk = 0.01, respectively. From Fig. 9(b), we can obtain that the interaction of S1(n, c0) and S2(n, c0) contour curves at level 0 is (n, c0) = (66, 1.1632), which is the solution to nonlinear simultaneous
(5) and (6). That is, in the case, the minimum required sample size n = 66 and critical acceptance value c0 = 1.1632 of the sampling plan based on the capability index SpkM. Using the approximate distribution of ˆSpkM, two conditions can be expressed as P ˆSM pk < c0| SpkM≥CAQL ≤ P ⎛ ⎝Z < c0− CAQL D1φ(3D1) √ 2k√nφ(3CAQL) ⎞ ⎠≤α (7) P ˆSM pk≥c0| SpkM ≤ CLTPD ≤ P ⎛ ⎝Z ≥ c0− CLTPD D2φ(3D2) √ 2k√nφ(3CLTPD) ⎞ ⎠≤β (8) where D1 and D2are the values of parameters D with SpkM =
Equations (7) and (8) imply that c0− CAQL D1φ(3D1) √ 2k√nφ(3CAQL) = Z1−α= −Zα (9) c0− CLTPD D2φ(3D2) √ 2k√nφ(3CLTPD) = Zβ. (10)
From (9) and (10), we have
c0− CAQL = −Zα D1φ(3D1) √ 2kφ(3CAQL) ×√1 n (11) c0− CLTPD = Zβ D2φ(3D2) √ 2kφ(3CLTPD) ×√1 n. (12) Subtracting (11) by (12) yields CAQL−CLTPD= 1 √ n ZαD1φ(3D1) √ 2kφ(3CAQL) +√ZβD2φ(3D2) 2kφ(3CLTPD) . (13) Therefore, from (13), we establish the required inspection sample size n and the corresponding critical
value c0 as n = ⎡ ⎢ ⎢ ⎢ ! Z αD1φ(3D1) √ 2kφ(3CAQL) + ZβD2φ(3D2) √ 2kφ(3CLTPD) CAQL− CLTPD "2⎤ ⎥ ⎥ ⎥ (14) c0= CAQL− Zα D1φ(3D1) √ 2kφ(3CAQL) ×$% 1 % % & ⎡ ⎢ ⎢ ⎢ ! Z αD1φ(3D1) √ 2kφ(3CAQL)+ ZβD2φ(3D2) √ 2kφ(3CLTPD) CAQL− CLTPD "2⎤ ⎥ ⎥ ⎥ . (15)
The symbol n means the ceiling function that obtains the least integer greater than or equal to n.
Table I shows (n, c0) values for α-risk = 0.01, 0.025, 0.05, 0.075, 0.1 and customer’sβ-risk = 0.01, 0.025, 0.05, 0.075, 0.1 with manufacturing lines k = 3 and various benchmarking quality levels, (CAQL, CLTPD) = (1.33, 1.00), (1.50, 1.33), (1.67, 1.50), and (2.00, 1.67). For practical purposes, we provide a useful procedure for the proposed sampling plan as follows.
Step 1: Decide process capability requirements (i.e., CAQL and CLTPD), manufacturer’s risk (α-risk), and customer’s risk (β-risk).
Step 2: Obtain required sample sizes (n) and critical accep-tance values (c0) based on the designated values ofα-risk, β-risk, number of manufacturing lines k,
CAQL, and CLTPD from Table I or (14) and (15). Step 3: Calculate the value of ˆSpkM from these n inspected
samples.
Step 4: Make a decision to accept the entire gold bump products if the estimated ˆSpkM value is greater than the critical value c0. Otherwise, we reject the entire products.
For example, if the benchmarking quality level (CAQL,
CLTPD) is set to (1.33, 1.00) with α-risk = 0.05 and β-risk = 0.01, the corresponding sample size and critical value can be obtained as (n, c0) = (66, 1.1632), which can be obtained in Table I. The gold bump product will be accepted if the 66 inspected product items yield measurements with
SpkM ≥ 1.1632, which is corresponding to the contour plots we
have mentioned above.
IV. APPLICATION FORPRODUCTACCEPTANCE DETERMINATION OFGOLDBUMPINGPROCESS
WITHTHREEMANUFACTURINGLINES
To demonstrate the applicability of the proposed prod-uct acceptance determination of gold bumping process with multiple manufacturing lines, we consider a factory application taken from a gold bumping factory located in the Science-Based Industrial Park at Hsinchu, Taiwan. For a newly mass production product, FHD1080H (FHD, 1920× 1080 RGB), a quality practitioner of IC design house employs a sampling plan for the gold bump product acceptance determination. Because the manufacturer’s factory involves three manufac-turing lines, the inspection data are collected from the lines separately. In current factory practices, five designate die sites are inspected on a wafer at the location of top, center, bottom, left, and right. In addition, four bump sites including left side of top, right side of top, left side of down, and right side of down are inspected on one die site.
The upper specification limit, target, and lower specification limit on bump height for the FHD1080H product we investi-gated are 10.5, 9, and 7.5 μm, respectively. An acceptance sampling plan is applied to decide the gold bump product is accepted or rejected. It is noted that if the character-istic data do not fall within the tolerance (USLLSL), the reliability of the product will decrease. In the contract, the
CAQL and CLTPD are set to 1.33 and 1.00, respectively, with α-risk = 0.05 and β-risk = 0.05. In Table I, we can obtain the acceptance critical value and inspected sample sizes of sampling plan (n, c0) = (48, 1.1344), which are obtained using the closed-form formulas shown in Section III. The inspected sample sizes and critical acceptance values are used to provide the desired levels of protection for both manufacturers and customers. In the case, the 48 observations of the bump height are collected from each manufacturing line in the gold bumping process. Table II shows the calculated statistics of the bump height in these three manufacturing lines. With the data, the quality practitioner would accept the entire products because the value of sample estimator
TABLE II
CALCULATEDSTATISTICS OF THETHREEMANUFACTURING
LINES(UNIT:μm)
ˆSM
pk = 1.1936, which is greater than the value of critical acceptance c0= 1.1344.
V. CONCLUSION
The gold bumping is an essential process that mainly affects the display performance of high-definition display devices, such as smart phones and tablet PC. Because the requirement of high-pin-count LCD diver IC chips would increase the difficulties of manufacturing the gold bumps, in this paper, we provided a useful product acceptance determination method for gold bumping process with multiple manufacturing lines. The proposed acceptance sampling plans are very practical and effective tools for quality assurance applications in gold bumping factories, which provide a feasible inspection policy. The policy can be applied to gold bumping process with multiple manufacturing lines. In this paper, we presented the closed-form formulas to obtain the required number of inspection sample size and the corresponding critical values based on commonly used manufacturer’s risks, consumer’s risks, and designated CAQL, CLTPDfor various numbers of gold bumping manufacturing lines. The results obtained could help the gold bumping practitioners to make more reliable decisions on whether the gold bump products are acceptable or not for the gold bumping processes with multiple manufacturing lines.
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Wen Lea Pearn received the Ph.D. degree in
oper-ations research from the University of Maryland, College Park, MD, USA.
He is a Professor of operations research and quality assurance with National Chiao-Tung Uni-versity (NCTU), Hsinchu, Taiwan. He was with Bell Laboratories, Murray Hill, NJ, USA, as a Quality Research Scientist before joining NCTU. His current research interests include process capa-bility, network optimization, and production man-agement. His publications have appeared in the Journal of the Royal Statistical Society, Series C, Journal of Quality Technol-ogy, European Journal of Operational Research, Journal of the Operational Research Society, Operations Research Letters, Omega, Networks and Inter-national Journal of Productions Research.
Chia Huang Wu received the Ph.D. degree in
indus-trial engineering and management from National Chiao-Tung University, Hsinchu, Taiwan.
He is currently a Post-Doctoral Researcher with National Chiao-Tung University. His current research interests include queueing theory, optimiza-tion theory, process capability index, and applied statistics.
Ching Ching Chuang received the M.S. degree
in industrial engineering and management from National Chiao-Tung University, Hsinchu, Taiwan.
She is an Engineer with the Taiwan Semiconduc-tor Manufacturing Company, Hsinchu. Her current research interests include process capability.
