light-emitting diode structure with double diffuse surfaces. The external quantum efficiency was demonstrated to be about 40%. The high performance LED was achieved mainly due to the strong guided-light scattering efficiency while employing double diffuse surfaces.
Index Terms—Extraction quantum efficiency, GaN, internal quantum efficiency, light-emitting diodes (LEDs).
I. INTRODUCTION
I
II-NITRIDE wide bandgap light-emitting diodes (LEDs) ranging from ultraviolet to the short-wavelength part over the visible spectrum have been intensely developed in the past ten years [1], [2]. Recently, as the brightness of GaN-based LEDs has increased, applications such as traffic signals, back-light for cell phone, and short-haul communications have become possible [3]. However, as for the replacement of con-ventional fluorescent lighting source with solid-state lighting, it still needs a great effort to improve the light-extraction efficiency as well as internal quantum efficiency of LEDs. In general, GaN-based LEDs are grown on the top of sap-phire substrates and a high dislocation density in the order of 10 –10 cm is induced owing to the large mismatch of lat-tice constants and thermal expansion coefficients between the epitaxial GaN films and the underneath sapphire substrates [4]. The large order of magnitude of dislocation density suppresses the further performance of GaN-based LEDs. Additionally, due to the significant difference of the refractive index between the GaN-based material and air, the light extraction efficiency is limited by the total internal reflection. Approximatelyof light from the active region can escape from the top and bottom of device, where denotes the refractive index of a semiconductor material [5]. Even though GaN has a lower refractive index ( ) than that of other semiconductor ma-terials, only about 4% of the total emitted light can be extracted from one face according to the above equation. Therefore, the Manuscript received July 15, 2006; revised November 15, 2006. This work was supported by the MOE ATU program and in part by the National Science Council, R.O.C., under NSC 95-2120-M-009-008, NSC 95-2752-E-009-007-PAE, and NSC 95-2221-E-009-282.
The authors are with the Department of Photonic & Institute of Electro-Op-tical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C. (e-mail: [email protected]; [email protected]; [email protected]; [email protected]).
Color versions of one or more of the figures are available online at http:// ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JDT.2007.894380
Fig. 1. Schematic drawing of epitaxial layers and device structure with chem-ical wet-etched patterned sapphire substrate (CWE-PSS).
major effort in fabricating high efficiency GaN-based LEDs is then how to grow LED wafers with high epitaxial quality and how to get photons that had been generated inside the active region out of semiconductor layers. In this paper, we will intro-duce two approaches to overcome the issues mentioned above. In the first part, we present a patterned sapphire substrate fabri-cated by a chemical wet etching technique. Through chemical wet etching techniques, the sapphire substrate exhibited a par-ticular crystallography-etched facet of {1–102} -plane with an inclined slope of 57 , facilitating a significant enhancement of the light extraction efficiency. Besides, according to the mea-surement results of the high-resolution X-ray rocking curves (HR-XRDs) and device reliability testing, an improvement of epitaxial quality was observed by adopting this scheme. In the second part of this article, we present a LED structure adopting double diffused-surfaces—one on-top transmitted diffuse sur-face and another diffuse omnidirectional reflector sursur-face on the bottom of the LED chip. According to this design, guided light scattered by bottom diffuse omnidirectional reflectors can be again scattered toward to angles inside the escape cone by top diffuse transmittance surfaces. Additionally, this novel structure with V-shaped active region providing a potential barrier around every defect, thus keeps carriers from recom-bining nonradiatively at the defect. Therefore, overall internal quantum efficiency of LED devices could be improved.
II. GAN-BASEDLEDSGROWN ONCHEMICALWET-ETCHED PATTERNEDSAPPHIRESUBSTRATES(CWE-PSS) The GaN-based LEDs used in this study were grown using a low-pressure metal-organic chemical-vapor deposition (Aixtron 2600G) system onto the C-face (0001) 2”-diamerter chemical wet-etched patterned sapphire substrates. The LED layer-struc-ture comprised a 30-nm-thick GaN nucleation layer, a 2- m -thick undoped GaN layer, a 2- m-thick Si-doped n-type GaN cladding layer, an un-intentionally doped active region emit-ting 450-nm wavelength with five periods of InGaN/GaN mul-tiple quantum wells (MQWs), and a 0.2- m-thick Mg-doped p-type GaN cladding layer. The as-grown wafer was then pat-terned with square mesas of 350 350 m in size by a standard 1551-319X/$25.00 © 2007 IEEE
Fig. 2. (a) and (b) SEM images of the CWE-PSS of the etching time of 90 and 120 s, respectively. (c) A top-view drawing depicts the evolution of CWE-PSS with the increasing of etching time.
photolithographic process and was partially etched until the ex-posure of n-GaN to define the emitting area and n-electrode; a 300-nm-thick indium–tin–oxide (ITO} was deposited as the transparent conductive layer and Cr–Au was then deposited as n- and p-electrodes and was alloyed at 200 C in atmos-phere for 5 minutes. Fig. 1 schematically depicts a cross-sec-tional structure of the GaN-based LED grown on the CWE-PSS. For fabricating the CWE-PSS, the film with hole-patterns of 3- m-diameter and 3- m-spacing was deposited onto the sapphire substrate by plasma-enhanced chemical-vapor deposi-tion (PECVD) to serve as the wet etching mask. The sapphire substrate was then wet etched using an H PO -based solution at an etching temperature of 300 C. The wet-etching rate for sapphire substrates was about 1 m min in this study and can be related to the H PO composition and etching temperature [6], [7]. Fig. 2(a) and (b) shows the SEM images of the pat-terned sapphire substrate of the etching time of 90 and 120 s, re-spectively. In Fig. 2(a), the crystallography-etched pattern of an (0001)-oriented sapphire substrate has a flat-surface of {0001} -plane with a triangle-shape in the center. Surrounding the tri-angle-shape -plane are three facets of {1–102} -plane with an angle of 57 against the [0001] -axis. However, due to the relative fast etching rate of -plane than that of -plane, the tri-angle-shape flat-surface of {0001} -plane in the pattern center finally vanishes with the increase of etching time. As shown
Fig. 3. High-resolution X-ray rocking curves (Bede D1 HR-XRD). Mea-surements over (a) wide range (04000 3000 arcsec) and (b) narrow range (0100 100 arcsec).
in Fig. 2(b), the {0001} -plane disappears and only {1–102} -plane is observed on the CWE-PSS with the etching time of 120 s. Fig. 2(c) shows the evolution of CWE-PSS with the in-crease of sapphire etching time. It should be noted that the di-ameter of the sapphire pattern also increases with the increase of etching time due to the side-etching effect; however, the period of the sapphire pattern was kept the same as 6- m. Additionally, the high slope (57 ) crystallography-etched facet of CWE-PSS is hard to fabricate by dry etching and it has been demonstrated in our previous work that this inclined facet was crucial for im-proving the light extraction efficiency [8].
For comparing the LED performances with different crys-tallography-etched facet patterns, the sapphire substrates of etching times of 0, 30, 60, 90, and 120 s were employed into this report. All of these CWE-PSSs were then grown and pro-cessed at the same time, eliminating any artificial issue during LED fabrication. The LED chips were packaged into TO-18 without epoxy resin for the subsequent measurement. The typical current-voltage ( - ) measurements were performed using a high current measure unit (KEITHLEY 240). The light output power of the LEDs was measured using an integrating sphere with a calibrated power meter.
In order to investigate the film quality of CWE-PSS LEDs, the epitaxial wafers were analyzed by the high-resolution X-ray rocking curves (Bede D1 HR-XRD). Fig. 3 shows the HR-XRDs of the (0002) reflection of the CWE-PSS LEDs. The measure-ments over wide range ( 4000 3000 arcsec) and narrow range ( 100 100 arcsec) are shown in Fig. 3(a) and (b), respectively. In Fig. 3(a), the same location of satellite-peaks over the wide measurement range for the conventional (sap-phire etching time of 0 s) and all CWE-PSS LEDs indicates
Fig. 4. (a) The measurement results of room-temperature output power (L-I curves) of the conventional and CWE-PSS LEDs (b) the enhancement factor on output power while comparing the CWE-PSS LEDs to the conventional LED under the driving current of 20 mA.
that the LED composition and growth rate were not associ-ated with the CWE-PSS. However, according to Fig. 3(b), the full-width at half-maximum (FWHM) of main peak was about 40 arcsec for the conventional LED and was about 30 arc sec for all CWE-PSS LEDs. An obvious broad shoulder was observed near the main peak for the conventional LED. It suggested that a better crystalline quality was achieved on CWE-PSS LEDs and was consistent with the well accepted concept that the growth on the pattern sapphire substrate exhibited a considerable improve-ment on internal quantum efficiency by reducing the threading dislocation density, no matter on dry etching or chemical wet etching patterned sapphire substrates [9]–[15].
Fig. 4(a) shows the measurement results of room tempera-ture output power ( - curve) of conventional and CWE-PSS LEDs as a function of the forward-bias current. In this figure, all the CWE-PSS LEDs demonstrate a significant improvement on output power as comparing to the conventional LED under our measurement condition up to 200 mA. The enhanced factor of output power of CWE-PSS LEDs compared to the conventional LED at a driving current of 20 mA is shown in Fig. 4(b). Ac-cording to this figure, the optimized CWE-PSS condition was achieved on the etching time of 90 s, corresponding to an en-hanced factor of 1.4. With the increase of etching time, the tri-angle-shape flat-surface of {0001} -plane in the pattern center finally vanishes, due to its relative fast etching rate than that of {1–102} -plane. The sustained {1–102} -plane has an in-clined crystallography-etched facet with a high slope of 57 , adding the opportunity of the guided light to meet the escape cone on the top of chip surface. Therefore, crystallography-etched patterns that evolving with the increasing of etching time of sapphire substrate affect the light extraction efficiency pro-foundly. Fig. 5 is a simple ray-tracing scheme of the CWE-PSS
Fig. 5. A schematic ray-tracing of the CWE-PSS LEDs with the increasing of sapphire etching time.
Fig. 6. The cross-section side-view SEM images of CWE-PSS LEDs with dif-ferent etching time of (a) 30 s, (b) 60 s, (c) 90 s, and (d) 120 s.
LEDs with the increase of sapphire etching time. In the case of the CWE-PSS LED with the large {0001} -plane pattern, i.e., a short period of sapphire etching time, the light emitting from the LED active region (MQW) was much easier to be guided inside the LED chip, as compared to that of the longer period of etching time, corresponding to the larger surface of high-slope crystallography-etched facets of {1–102} -plane. As shown in Fig. 5, more guided light can be extracted from the LED top sur-face, enhancing the total light output power.
The cross-sectional side-view SEM images of CWE-PSS LEDs with different etching time of (a) 30 s, (b) 60 s, (c) 90 s, and (d) 120 s were shown in Fig. 6. The crystallography-etched sapphire patterns can be buried completely by the GaN epitaxy in all CWE-PSS LEDs, except for the sample of the etching time of 120 s. As shown in Fig. 6(d), a void locating inside the sapphire pattern can be observed and this feature is repeatable in each etching pattern. After etching time of 120 s, there existed no -plane surface at the pattern center; on the other hand, large inclined crystallography-etched -plane surfaces were left. This cone-shape-like etching pattern without any -plane surface at the center could be relatively difficult for MOCVD to grow GaN films. Thus the depth of chemical wet etching patterns is a trade-off between the capability of light
Fig. 7. Reliability test of the conventional and CWE-PSS LEDs under stress condition of 55 C and 50 mA.
extraction and epitaxial quality. Therefore, a drop of light extraction efficiency was observed on the CWE-PSS LED and a void existed in each pattern when the etching time was 120 s. However, its epitaxial quality was still better than that of conventional samples. More solid evidence for above statement was exhibited in Fig. 7.
Fig. 7 shows an aging test result on the conventional and CWE-PSS LEDs under a driving current of 50 mA at 55 C. In Fig. 7, the electroluminescence (EL) intensity to the initial EL intensity is shown as a function of the aging time. According to this figure, all the aging samples exhibit the same degrada-tion trend. However, all the CWE-PSS LEDs present a gradual degradation in the EL intensity under our measurement condi-tion up to 600 hours. In general, the EL intensity of convencondi-tional and CWE-PSS LEDs were decayed by about 20% and 10%, re-spectively; indicating the improvement on the epitaxial quality could be achieved via grown on the CWE-PSS scheme. The better aging behavior of CWE-PSS LEDs could be due to the reduction of threading dislocations of the epitaxial layers. Typ-ically, by employing patterned sapphire scheme, the epitaxial mode would be shifted from the initial 3-D dominated mode to 2-D mode, enforcing threading dislocations bending toward to lateral directions, thus improving overall device performances [9]–[12]. To further identify whether the reduction of disloca-tion density or the enhancement of internal quantum efficiency that CWE-PSS scheme could be benefited from, detailed exper-iments, such as transmission electron microscope or direct mea-surement of internal quantum efficiency, will be investigated in the future.
III. GAN THINFILMLEDSWITHDOUBLEDIFFUSESURFACES Recently, Schubert et al. proposes a novel structure using diffuse omni-directional reflectors, enhancing the reflected power by two orders of magnitude for a roughened reflector surface compared with a planar surface [16]. According to their investigation, guided light is reflected diffusively by the roughened reflector, thus adding the light-extraction efficiency. In this work, we present a LED structure adopting double dif-fused-surfaces: one top transmitted diffuse surface and another diffuse omnidirectional reflector surface on the bottom of a LED chip. According to this design, guided light scattered by bottom diffuse omnidirectional reflectors can be again scattered
Fig. 8. Schematic cross section of a LED with double diffuse surfaces.
to angles inside the escape cone by top diffuse transmittance surfaces to achieve a high light external efficiency. A schematic cross-section image of a GaN-based LED with double diffuse surfaces is shown in Fig. 8. GaN-based LEDs used in this study were grown using a low-pressure metal-organic chem-ical-vapor deposition (Aixtron 2600G) system onto the C-face (0001) 2”-diamerter sapphire substrate. The LED layer-struc-ture comprised a 30-nm-thick GaN nucleation layer grown at 520 C, a 2- m-thick undoped GaN layer grown at 1050 C, 2- m-thick Si-doped n-type GaN cladding layer grown at 1050 C, an un-intentionally doped active region of 465-nm with five periods InGaN/GaN multiple quantum wells (MQWs) grown at 700 C, and a 0.4- m-thick Mg-doped p-type GaN cap-layer. Two different p-type GaN cap layers were used in this study. Sample A, and B were grown at 1050 C and 800 C, respectively. At such a low grown temperature of GaN layers (i.e., 800 C), large number of hexagonal pits can be seen on the top surface of the LED surface. The formation of these hexagonal V-shape pits could be attributed to the fact that Ga atoms might not have enough energy to migrate to proper sites [17], [18]. In order to measure the change of surface roughness of p-type GaN surface caused by grown temperature, atomic force microscopy (AFM) measurements were performed. Fig. 9 shows AFM images of p-type GaN surface grown at (a) 1050 C and (b) 800 C. With the varia-tion of grown temperature, the rms roughness of p-type GaN increases from (a) 2.3 to (b) 129.3 nm, respectively. According to Fig. 9(b), hexagonal V-shape pits distributed randomly and the surface density was estimated to be about 1.28 10 cm . Fig. 10(a) and (b) shows the cross-sectional transmission elec-tron microscope (TEM) images of sample A and sample B, respectively. In Fig. 10(a), the top surface of p-type GaN was quite flat, as can be seen in ordinary LEDs; however, lots of hexagonal V-shape pits was observed on p-type GaN surface of sample B, as shown in Fig. 10(b). The diameter of hexagonal V-shape pits ranged from 200 to 400 nm, and the depth of pits was about 300 nm. Therefore, light emitted from LED active region could be scattered due to these randomly distributed hexagonal V-shape pits. Fig. 10(c) is an enlarged TEM image of one hexagonal V-shape pit. As can be seen in this figure, the hexagonal V-shape pit originated from threading dislocations and enforced multi-quantum wells to grow along V-shape sidewalls. According to recent paper proposed by Hangleiter
Fig. 9. AFM images of p-type GaN surface grown at (a) 1050 C and (b) 800 C. RMS roughness is (a) 2.3 nm and (b) 129.3 nm.
et al. [19], hexagonal V-shaped pits decorating every threading
dislocation can be forced to exhibit sidewall quantum wells with reduced thickness and higher band gap thus leading to a potential barrier around every defect, and keeping carriers from recombining nonradiatively at the defect. Therefore, overall internal quantum efficiency of LED devices could be improved. After subsequent depositions of a 200-nm-thick in-dium-tin-oxide (ITO), at 465-nm) low-refractive-index layer and a 500-nm-thick Al mirror layer on top of LEDs, the p-side surface of sample A could be served as specular ODRs (flat p-type GaN/ ITO/ Al) [20] and that of sample B could be served as diffuse ODRs (roughened p-type GaN/ ITO/ Al) [16]. Thick Au was deposited on both samples followed by Sn evaporation in a thermal evaporator. The wafer was then flipped and bonded to an Au-coated Si submount at a temperature of 350 C, resulting in an alloy of Au and Sn to form adhesion between the LED wafers and Si submounts. A KrF excimer laser at a wavelength of 248 nm with a pulse width of 25 ns was
Fig. 10. Cross-sectional transmission electron microscope (TEM) images of (a) flat p-GaN surface (sample A) and (b) hexagonal V-shape roughened p-GaN surface (sample B). (c) is an enlarged TEM image of one hexagonal V-shape pit.
then used to remove the sapphire substrate. The laser with a beam size of 1.2 mm 1.2 mm was incident from the backside of the sapphire substrate onto the sapphire/GaN interface to decompose GaN into Ga and . In this process, the beam size of KrF laser was larger than that of the size of the LEDs. There-fore, the laser irradiation on the interface of sapphire and GaN was uniform. After laser lift-off process, the remaining GaN epitaxial film on the Si submount displayed an N-face (000–1) surface. The remaining Ga droplets on the transferred GaN surface were removed by etching in a HCl solution. Next, the transferred GaN was thinned until the Si-doped GaN was ex-posed. An n-contact composed of Ti–Al–Pt–Au was formed on the exposed N-face n-GaN and p-contact composed of Ti—Au was deposited on the Si-submount. Finally, in order to roughen the top of surface, dilute potassium hydroxide (KOH) was used as etching solution at 80 C. After wet etching, hexagonal cones can be observed on the N-face n-GaN surface. Fig. 11(a) shows the top-view scanning electron micrograph (SEM) image of
N-face n-GaN surface after KOH etching for 3 min. Shown in
Fig. 11(b) was SEM image taken at an angle of 70 deg from the perpendicular direction of the etched surface. According to this figure, the base and height of hexagonal cones are both about nm. It should be noted that surfaces of both sample A and B exhibit the same surface morphology since they were etched by KOH solution at the same time.Therefore, N-face n-GaN surfaces with hexagonal cones features were quite suit-able for serving as transmitted diffuse surfaces and an excellent transmitted capability of this roughened morphology had been demonstrated [21]. Both LEDs were fabricated with the size of
Fig. 11. SEM images of the N-face GaN etch morphology after an etch time of 3 min by KOH, 80 C. (a) Top-view and (b) is taken at an angle of 70 deg from the perpendicular to the etched surface.
Fig. 12. (a) Output power of sample A, B, and conventional LEDs measured by integrating sphere as a function of a forward dc current. (b) Light output patterns of sample A, B, and conventional LEDs.
350 350 m . Fig. 12(a) shows the light output power ( -curve) of sample A, and B. The conventional LEDs having a thin Ni–Au p-type electrode were also used as comparisons. Sample B, the LED with double diffuse surfaces, and sample A, the LED with flat omnidirectional reflectors, produced much higher light output as compared with that of conventional LEDs under all measurement conditions. For instance, the light output powers at 20 mA of sample A, sample B, and conventional LEDs are 13.6, 21.3, and 9 mW, respectively. Therefore, the light output at 20 mA of the sample B increases by 236% as compared with that of conventional LED and increases by 56% as compared with that of sample A. The calculated
Fig. 13. Simple optical ray diagrams in LEDs with (a) top transmitted diffuse surfaces and bottom flat omnidirectional reflectors and (b) with top transmitted diffuse surfaces and bottom diffuse omnidirectional reflectors.
external quantum efficiency of our proposal LEDs with double diffuse surfaces is about 40% at 20 mA ( nm), which could compete with structures of state of the art. Fig. 12(b) shows light output patterns of sample A, sample B and con-ventional LED at 20 mA. It is clear from the results that the EL intensities of sample B were larger than those of sample A and conventional LEDs. According to this figure, view angles (half-center brightness or 50% of the full luminosity) of sample A and sample B are almost the same, i.e., 120 ; however, the overall integrated area of EL intensities of sample B is still larger than that of sample A. Besides, although view angles of conventional LEDs is larger than that of sample A and sample B, i.e., 140 , due to the existing of transparent sapphire substrate; the enhancement of EL intensity by adopting double diffuse surfaces scheme is more remarkable, as compared that with conventional LEDs. The improvement in emitted light extraction efficiency could be considered as a consequence of high light scattering efficiency by employing double diffuse surfaces. To understand the light-output enhancement of the LEDs made with double diffuse surfaces, the propagation of light emitted is schematically shown in Fig. 13(a) and (b). Fig. 13(a) shows a simple optical ray diagram of a LED with transmitted diffuse surfaces on top and flat omnidirectional reflectors on bottom of LED chips, as the case of sample A. According to this figure, guided light could be extracted outside LED chips by scatterings at top transmitted diffuse surfaces; therefore in this case, the escaping probability of photons is larger as compared with that of conventional LEDs. However, the top surface could not be a perfect diffuser only using simple
Fig. 14. Leakage current as function of reverse voltage for sample B. All sam-ples are measured on TO-can without epoxy resin.
chemical wet etching, guided light would propagate inside LED chip and be partly extracted once impacting top transmitted dif-fuse surfaces. Under such circumstance, most energy of guided light was still depleted due to the absorption of active region or mirror loss. When we replace flat omnidirectional reflectors with diffuse or roughened surfaces, as shown in Fig. 13(b), the situation is quite different. In Fig. 13(b), guided light emitted towards to diffuse omnidirectional reflectors is scattered. The scattering light will be scattered again by top transmitted diffuse surfaces. Thus the light emitted from active region was randomized more effectively, adding total opportunities for photons to escape outside LED chips. Therefore, higher guided light scattering efficiency was achieved by adopting double diffuse surfaces scheme, as shown in Fig. 13(b). It’s one of the reasons why sample B demonstrate higher light output than that of sample A in all our measurement condition. However, since the structure dimension approached to the micro-cavity scale, other factors, such as emission lifetime variation affected by the distance between the MQW and the omnidirectional reflectors or affected by plasmonic coupling [22] in such a roughened p-surface scheme, should be investigated in the future.
As for the electrical characteristics, sample A and B demon-strate forward voltages of 3.2 V at 20 mA, which is a typical and acceptable value while comparing to other devices with same chip size (350 350 m ). Another important electrical property needed to certify is the reverse leakage current, since the roughened surfaces could easily induce leakage paths. Es-pecially at the procedure of fabricating diffuse ODRs (rough-ened p-type GaN/ITO/Al), leakage paths may penetrate through V-shape pits to MQWs, degrading LED performances. There-fore, in order to avoid electrical short circuit, specific control of epitaxial condition while growing hexagonal V-shape pits is important. Fig. 14 shows the reverse voltage versus current char-acteristics of sample B. It was found that the leakage currents of sample B at V was in the order of magnitude of 10 nA, indi-cating the roughening processes, no matter by epitaxial growth (hexagonal pits) or chemical wet etching (hexagonal cones), did not adversely affect the LED performance.
XRDs) and device reliability testing. Therefore, by using this novel CWE-PSS scheme, an overall enhancement of 40% on the quantum efficiency can be achieved. Secondly, we present a high light-extraction 465-nm GaN-based vertical light-emitting diode structure with double diffuse surfaces. One surface was a diffusive ODR consisted of an epitaxially roughened p-type GaN layer, an ITO layer, and an Al layer and another was a wet-chemical etched N-face n-GaN transmitted diffuse surface. The external quantum efficiency was calculated to be about 40%. The high performance LED was achieved due to the strong guided-light scattering efficiency while employing double dif-fuse surfaces. The forward voltages was 3.2 V at 20 mA and the leakage currents at V was in the order of magnitude of 10 nA, indicating the roughening processes, did not adversely affect the LED performance.
ACKNOWLEDGMENT
The authors would like to thank Prof. Pilkuhn of National Chiao Tung University, Hsinchu, Taiwan, R.O.C., Prof. S. Y. Lin of Rensselaer Polytechnic Institute, Troy, NY, Dr. T.C. Hsu and M. Hsieh of Epistar, Corporation, Hsinchu, Taiwan, R.O.C., for useful discussion and technical support.
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Ya-Ju Lee received the B.S. degree in physics
from National Central University, Taiwan, R.O.C., in 2000, and the M.S. degree in the institute of electro-optical engineering, National Chiao Tung University, Taiwan, R.O.C., in 2002, and where he is currently working toward the Ph.D. degree in the Department of Photonics & Institute of Electro-Op-tical Engineering.
He is also a Research Engineer in the R&D Depart-ment, Epistar Corporation, Hsinchu, Taiwan, R.O.C.
B.S. degree in physics from National Taiwan Univer-sity, Taiwan, R.O.C., the M.S. degree in electrical and computer engineering from Rutgers University, New Brunswick, NJ, in 1995, and the Ph.D. degree from electrical and computer engineering of University of Illinois-Urbana Champaign in 1999.
He has an extensive professional career both in research and industrial research institutions that includes: Research Consultant in Lucent Technolo-gies, Bell Labs (1993–1995); a Senior Research Engineer at Filtronic Solid State (1999–2000); and a Member of Technical Staff in Fiber-optics Division at Agilent Technologies (2000–2001) and LuxNet Corporation (2001–2002). Since October 2002, he joined National Chiao Tung University, Hsinchu, Taiwan, R.O.C., as a faculty member of Institute of Electro-Optical Engineering. His current research interests include semiconductor lasers, vertical cavity surface emitting lasers, blue and UV LED lasers, quantum confined optoelectronic structures, optoelectronic materials, and high speed semiconductor devices. He has authored and co-authored 80 internal journal papers. He holds four granted patents.
Dr. Kuo is a member of SPIE and MRS.
Shing-Chung Wang (M’79–LM’07) received the B.S. degree from National Taiwan University, Taiwan, R.O.C., the M.S. degree from National To-hoku University, Japan, and the Ph.D. from Stanford University, Palo Alto, CA, in 1971, all in electrical engineering.
He has an extensive professional career both in academic and industrial research institutions that includes: a faculty member at National Chiao Tung University (1965–1967); a Research Associate at Stanford University (1971–74); a Senior Research Scientist at Xerox Corporation (1974–1985); and a Consulting Scientist at Lockheed-Martin Palo Alto Research Laboratories (1985–1995). Since 1995 he rejoined National Chiao Tung University as a faculty member of Institute of Electro-Optical Engineering. His current research interests include semiconductor lasers, vertical cavity surface emitting lasers, blue and UV lasers, quantum confined optoelectronic structures, optoelectronic materials, diode-pumped lasers, and semiconductor laser applications.
Prof. Wang is a Fellow of the Optical Society of America and a recipient of Outstanding Scholar Award from the Foundation for the Advancement of Outstanding Scholarship.
